NL7315692A - - Google Patents
Info
- Publication number
- NL7315692A NL7315692A NL7315692A NL7315692A NL7315692A NL 7315692 A NL7315692 A NL 7315692A NL 7315692 A NL7315692 A NL 7315692A NL 7315692 A NL7315692 A NL 7315692A NL 7315692 A NL7315692 A NL 7315692A
- Authority
- NL
- Netherlands
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0877—Cache access modes
- G06F12/0886—Variable-length word access
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19722261586 DE2261586C3 (en) | 1972-12-15 | 1972-12-15 | Storage facility |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| NL7315692A true NL7315692A (en) | 1974-06-18 |
Family
ID=5864559
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| NL7315692A NL7315692A (en) | 1972-12-15 | 1973-11-15 |
Country Status (6)
| Country | Link |
|---|---|
| BE (1) | BE808638A (en) |
| DE (1) | DE2261586C3 (en) |
| FR (1) | FR2211146A5 (en) |
| GB (1) | GB1449877A (en) |
| IT (1) | IT1003258B (en) |
| NL (1) | NL7315692A (en) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR111566A (en) * | 1974-10-04 | |||
| US4075686A (en) * | 1976-12-30 | 1978-02-21 | Honeywell Information Systems Inc. | Input/output cache system including bypass capability |
| DE2837709C2 (en) * | 1978-08-30 | 1985-01-31 | Standard Elektrik Lorenz Ag, 7000 Stuttgart | Circuit arrangement for handling partial words in computer systems |
| DE2931122C2 (en) * | 1979-07-31 | 1981-07-30 | Siemens AG, 1000 Berlin und 8000 München | Circuit arrangement for selecting and providing the address of the next available memory section of a buffer memory, in particular for data processing systems |
| US4317168A (en) * | 1979-11-23 | 1982-02-23 | International Business Machines Corporation | Cache organization enabling concurrent line castout and line fetch transfers with main storage |
| EP0400851A3 (en) * | 1989-06-02 | 1992-10-21 | Hewlett-Packard Company | Efficient cache utilizing a store buffer |
| DE4323929A1 (en) * | 1992-10-13 | 1994-04-14 | Hewlett Packard Co | Software-managed, multi-level cache storage system |
-
1972
- 1972-12-15 DE DE19722261586 patent/DE2261586C3/en not_active Expired
-
1973
- 1973-11-15 NL NL7315692A patent/NL7315692A/xx not_active Application Discontinuation
- 1973-12-10 IT IT3207373A patent/IT1003258B/en active
- 1973-12-13 GB GB5775673A patent/GB1449877A/en not_active Expired
- 1973-12-13 FR FR7344505A patent/FR2211146A5/fr not_active Expired
- 1973-12-14 BE BE138866A patent/BE808638A/en unknown
Also Published As
| Publication number | Publication date |
|---|---|
| IT1003258B (en) | 1976-06-10 |
| DE2261586C3 (en) | 1979-08-09 |
| GB1449877A (en) | 1976-09-15 |
| FR2211146A5 (en) | 1974-07-12 |
| BE808638A (en) | 1974-06-14 |
| DE2261586B2 (en) | 1978-11-30 |
| DE2261586A1 (en) | 1974-06-20 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| BV | The patent application has lapsed |