GB1449877A - Electronic data storage arrangements - Google Patents
Electronic data storage arrangementsInfo
- Publication number
- GB1449877A GB1449877A GB5775673A GB5775673A GB1449877A GB 1449877 A GB1449877 A GB 1449877A GB 5775673 A GB5775673 A GB 5775673A GB 5775673 A GB5775673 A GB 5775673A GB 1449877 A GB1449877 A GB 1449877A
- Authority
- GB
- United Kingdom
- Prior art keywords
- buffer
- bytes
- data
- address
- store
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000013500 data storage Methods 0.000 title abstract 3
- 230000004048 modification Effects 0.000 abstract 3
- 238000012986 modification Methods 0.000 abstract 3
- 239000003795 chemical substances by application Substances 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0877—Cache access modes
- G06F12/0886—Variable-length word access
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
Abstract
1449877 Data storage system SIEMENS AG 13 Dec 1973 [15 Dec 1972] 57756/73 Heading G4A A data storage system is accessible for words of up to m bytes and includes a main store accessible for words of up to n m bytes and a smaller, faster buffer store to store a full or partial copy of a number of n m byte words and their corresponding main store addresses, the arrangement being such that to access a required word of up to m bytes the main store address of the corresponding n m byte word is used in an associative search through the buffer from which the required up to m byte word is accessed in. response to selection signals, there being means for transferring words of up to n m bytes between the main and buffer stores as appropriate. General.-Single words of up to four by tesare accessed in the buffer store which has 32 locations each for storing a double word of up to eight bytes, the main store address in an address field AT1 of the corresponding double word, an address parity bit PB, a selection field AT2 of eight bits each corresponding to one of the data bytes, a validity bit AR1, an "up to date bit" AR2 indicating that all eight data bytes are present, i.e. the copy is complete and a "new entry bit" R2. The "new entry bit" points to a location in buffer which is to be used when a new entry has to be made in the buffer. Two selection means are provided each providing a new entry for one of the locations in a respective portion of the store, e.g. on the basis of that location which has not been accessed for the longest period. One of the selection means, and hence one of the portions of the store, is selected on the basis of the type of data involved in an access. Operation, Write.-A double word address is used as a tag in an associative search through the address field AT1 of the buffer to determine whether the corresponding data is present. If it is present selection signals of the same form as the selection field select up to four data bytes into which data is written, the corresponding bits in the selection field being set to indicate that the copy in the buffer has been modified. If the data is not present in the buffer a signal NEZ from the accessing unit indicative of the type of data involved in the access selects one of the two selection means RZ. The selection field AT2 of the location selected by the "new entry bit" is then examined to determine whether the previous entry had been modified. If any AT2 bits are set the corresponding bytes in the old entry are written into the main store addressed by the address AT1 in the old entry to up-date the main store. The location thus freed in the buffer is then loaded at AT 1 with the new double word address, at AT2 with the selection signals, and with the (up to four). data bytes to be written. If the selection field AT2 of the old entry in the buffer indicated that no modification had occurred the new data is simply written into the buffer as above. Read.-The address field AT1 of the buffer is searched as in a write operation (above) to determine whether the corresponding data is present in the buffer. If it is present the "up to date bit" is examined to determine whether the copy is complete, e.g. in the write operation above the new entry contains only up to four data bytes. If the entry is complete the required (up to four) data bytes are read in accordance with selection signals. If the entry is not complete the selection signals are associatively matched with the selection field AT2 of the entry to determine whether all required bytes are present in the buffer. If they are present they are read as above. If they are not present the main store is accessed at the address given by the address field AT1 and those bytes corresponding to all AT2 bits not set are transferred into the buffer to complete the entry which is then read as above. If the initial search of the address field AT1 was unsuccessful one of the locations pointed to by a "new entry bit" is selected (see "Write" above) and its ATS field examined to determine whether the data has been modified. If any modification has occurred the corresponding bytes determined by ATZ are read into the main store at the address determined by AT1. The main store is then accessed at an address determined by the double word address for which the initial search failed and the corresponding (eight bytes of) data are loaded in the buffer at the freed location together with the main store address and the "up to date" bit is set. The appropriate bytes are read from the new entry in accordance with the selection signals. If the AT2 field of the old entry indicated that no modification had occurred the new entry is copied into the buffer and accessed as above. Further details-The read operation may be modified as follows. In a "read and mark" operation the data bytes read from the buffer are rewritten together with the selection signals which are written in the AT2 field to mark the bytes which were read. In a "read and erase" operation the read data bytes are rewritten as zero and the AT2 field loaded as above. Arrangements are provided to bypass the auxiliary store with an access request, e.g. where the request relates to fault words stored in the main store, or where the initial AT1 search in the buffer fails, subsequent transfer to the buffer (as described above) being omitted and the data accessed directly from the main store. The validity bits in the buffer store may be set, e.g. following a power failure, when the contents of the store cannot be guaranteed and reset following a further write operation into the buffer. The validity bits may also be set when a parity error occurs, e.g. the parity bit PB is used to check the parity of a double word address supplied to the buffer.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19722261586 DE2261586C3 (en) | 1972-12-15 | 1972-12-15 | Storage facility |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1449877A true GB1449877A (en) | 1976-09-15 |
Family
ID=5864559
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB5775673A Expired GB1449877A (en) | 1972-12-15 | 1973-12-13 | Electronic data storage arrangements |
Country Status (6)
Country | Link |
---|---|
BE (1) | BE808638A (en) |
DE (1) | DE2261586C3 (en) |
FR (1) | FR2211146A5 (en) |
GB (1) | GB1449877A (en) |
IT (1) | IT1003258B (en) |
NL (1) | NL7315692A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2271653A (en) * | 1992-10-13 | 1994-04-20 | Hewlett Packard Co | Multi-level cache system |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR111566A (en) * | 1974-10-04 | |||
US4075686A (en) * | 1976-12-30 | 1978-02-21 | Honeywell Information Systems Inc. | Input/output cache system including bypass capability |
DE2837709C2 (en) * | 1978-08-30 | 1985-01-31 | Standard Elektrik Lorenz Ag, 7000 Stuttgart | Circuit arrangement for handling partial words in computer systems |
DE2931122C2 (en) * | 1979-07-31 | 1981-07-30 | Siemens AG, 1000 Berlin und 8000 München | Circuit arrangement for selecting and providing the address of the next available memory section of a buffer memory, in particular for data processing systems |
US4317168A (en) * | 1979-11-23 | 1982-02-23 | International Business Machines Corporation | Cache organization enabling concurrent line castout and line fetch transfers with main storage |
EP0400851A3 (en) * | 1989-06-02 | 1992-10-21 | Hewlett-Packard Company | Efficient cache utilizing a store buffer |
-
1972
- 1972-12-15 DE DE19722261586 patent/DE2261586C3/en not_active Expired
-
1973
- 1973-11-15 NL NL7315692A patent/NL7315692A/xx not_active Application Discontinuation
- 1973-12-10 IT IT3207373A patent/IT1003258B/en active
- 1973-12-13 GB GB5775673A patent/GB1449877A/en not_active Expired
- 1973-12-13 FR FR7344505A patent/FR2211146A5/fr not_active Expired
- 1973-12-14 BE BE138866A patent/BE808638A/en unknown
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2271653A (en) * | 1992-10-13 | 1994-04-20 | Hewlett Packard Co | Multi-level cache system |
Also Published As
Publication number | Publication date |
---|---|
IT1003258B (en) | 1976-06-10 |
DE2261586C3 (en) | 1979-08-09 |
NL7315692A (en) | 1974-06-18 |
FR2211146A5 (en) | 1974-07-12 |
BE808638A (en) | 1974-06-14 |
DE2261586B2 (en) | 1978-11-30 |
DE2261586A1 (en) | 1974-06-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
PCNP | Patent ceased through non-payment of renewal fee |