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MY186501A - Universal surface-mount semiconductor package - Google Patents

Universal surface-mount semiconductor package

Info

Publication number
MY186501A
MY186501A MYPI2021001095A MYPI2021001095A MY186501A MY 186501 A MY186501 A MY 186501A MY PI2021001095 A MYPI2021001095 A MY PI2021001095A MY PI2021001095 A MYPI2021001095 A MY PI2021001095A MY 186501 A MY186501 A MY 186501A
Authority
MY
Malaysia
Prior art keywords
packages
laser beam
plastic
leadframe
die pads
Prior art date
Application number
MYPI2021001095A
Inventor
Keng-Hung Lin
Richard K Williams
Original Assignee
Richard K Williams
Adventive Tech Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US14/797,056 external-priority patent/US9576932B2/en
Application filed by Richard K Williams, Adventive Tech Ltd filed Critical Richard K Williams
Publication of MY186501A publication Critical patent/MY186501A/en

Links

Classifications

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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
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    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

In the fabrication of semiconductor packages, a leadframe is formed by masking and etching a metal sheet from both sides, and a plastic block (110A) is formed over a plurality of dice attached to die pads (1C, 10, 33B, 34D, 34O, 34R, 34S) in the leadframe. A laser beam (198A, 199A) is used to form individual plastic capsules (127B, 127C) for each package, and a second laser beam (198A; 199A) is used to singulate the packages by severing the metal conductors, tie bars (374, 414) and rails between the packages. A wide variety of different types of packages, from gull-wing footed packages to leadless packages, with either exposed or isolated die pads (1C, 10, 33B, 34D, 34O, 34R, 34S), may be fabricated merely by varying the patterns of the openings in the mask layers and the width of the plastic trenches created by the first laser beam (198A; 199A). The most suitable drawing: Fig. 11C.
MYPI2021001095A 2015-07-10 2016-07-06 Universal surface-mount semiconductor package MY186501A (en)

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US14/797,056 US9576932B2 (en) 2013-03-09 2015-07-10 Universal surface-mount semiconductor package
PCT/US2016/041169 WO2017011246A1 (en) 2015-07-10 2016-07-06 Universal surface-mount semiconductor package

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TWI810380B (en) * 2019-02-22 2023-08-01 南韓商愛思開海力士有限公司 System-in-packages including a bridge die
TWI690039B (en) * 2019-07-03 2020-04-01 矽品精密工業股份有限公司 Electronic package and manufacturing method thereof
CN111432554B (en) * 2020-03-13 2021-08-10 清华大学 Micro-system architecture
TWI736409B (en) * 2020-03-27 2021-08-11 美商矽成積體電路股份有限公司 Package structure
CN114839401A (en) * 2022-03-12 2022-08-02 江苏宝浦莱半导体有限公司 Accelerated life test experiment High-density layout aging board with gold finger plug-in structure

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US6909178B2 (en) * 2000-09-06 2005-06-21 Sanyo Electric Co., Ltd. Semiconductor device and method of manufacturing the same
US7588999B2 (en) * 2005-10-28 2009-09-15 Semiconductor Components Industries, Llc Method of forming a leaded molded array package
DE102006034679A1 (en) * 2006-07-24 2008-01-31 Infineon Technologies Ag Semiconductor module with power semiconductor chip and passive component and method for producing the same
US8071427B2 (en) * 2009-01-29 2011-12-06 Semiconductor Components Industries, Llc Method for manufacturing a semiconductor component and structure therefor
US20110115069A1 (en) * 2009-11-13 2011-05-19 Serene Seoh Hian Teh Electronic device including a packaging substrate and an electrical conductor within a via and a process of forming the same
US8575006B2 (en) * 2009-11-30 2013-11-05 Alpha and Omega Semiconducotr Incorporated Process to form semiconductor packages with external leads
CN101719759B (en) * 2009-12-04 2011-12-14 武汉盛华微系统技术股份有限公司 Method for adhering components and parts to packaging surface
US9831393B2 (en) * 2010-07-30 2017-11-28 Cree Hong Kong Limited Water resistant surface mount device package
KR101698932B1 (en) * 2010-08-17 2017-01-23 삼성전자 주식회사 Semiconductor Package And Method For Manufacturing The Same
US8513787B2 (en) * 2011-08-16 2013-08-20 Advanced Analogic Technologies, Incorporated Multi-die semiconductor package with one or more embedded die pads
JP6095997B2 (en) * 2013-02-13 2017-03-15 エスアイアイ・セミコンダクタ株式会社 Manufacturing method of resin-encapsulated semiconductor device

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MY183619A (en) 2021-03-03
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CN109478544A (en) 2019-03-15
CN109478544B (en) 2023-05-26
TW201712826A (en) 2017-04-01

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