KR980006804A - High swing cascode current mirror - Google Patents

Abstract

The high swing current mirror includes a cascode current source and a current source bias circuit. The current source includes first and second bias stages and an output stage. The bias circuit includes transistors M1, M2AM, M2B and M3A. Transistor M1 has a gate, a source and a drain whose gate is connected to the drain. Transistor M2A has a gate, a source and a drain, and a gate and a source of transistor M2A are connected to a gate and a source of transistor M1, respectively. Transistor M2B has a gate and a drain connected to the second bias stage when connected to each other, and a source is connected to the drain of transistor M2A. Transistor M3A has a gate and a drain connected to each other and connected to the first bias stage, and the source It is connected to the sources of the transistors M1 and M2A. The transistors in the cascode current source and current source bias circuits have a transconductance variable ratio so that the cascode current source remains saturated to provide the highest voltage swing at the output.

Description

High swing cascode current mirror

As this is a public information case, the full text was not included.

2 is a structural diagram for explaining a current mirror according to the present invention.

3 is a structural diagram of a double cascode current mirror according to the present invention.

4 is a schematic diagram of a single cascode current biasing circuit having a self-generated reference current in accordance with the present invention.

5 is a structural diagram of a current mirror having a single cascode biasing circuit according to FIG.

Claims (14)

A high swing current mirror comprising: a cascode current source having first and second bias stages and an output stage; And a bias circuit, the bias circuit having a gate, a source, and a drain, the drain having a transistor M1 connected to the gate, a drain, a gate and a source connected to the gate and the source of the transistor M1, respectively. A transistor M2A having a transistor, a gate and a drain connected and interconnected to the second bias terminal, a transistor M2B having a source connected to the drain of the transistor M2A, a gate and a drain connected to the first bias terminal, And a transistor M3A having a source connected to the sources of the transistors M1 and M2A. The method of claim 1; The transistor M1 has a device transconductance variable K _M1 and a drain current I _IN1 , the transistor M2A has a device transconductance variable K _M2A and a drain current I _IN2 , and the transistor M3A has a device transconductance variable K _M3A and a drain current. I _IN3 , wherein K _M1 , K _M2A , K _M3A , I _IN1 , I _IN2 and I _IN3 are relational expressions. High wing current mirror, characterized in that selected according to. 3. The cascode current source of claim 2, wherein the cascode current source comprises cascode connected transistors M4A and M4B connected in series with the output stage, wherein the transistor M4A has a gate forming the first bias stage, and the transistor M4B has the And a gate forming a second bias stage. The method of claim 3; The transistor M4A has a device transconductance variable K _M4A equal to the device transconductance variable K _M3A . 4. The method of claim 3 wherein the transistor M2B is the transport element has a variable conductance K _M2B, wherein the transistor is a high M4B swing current mirror, characterized in that elements having the same transconductance parameter K _M6B and the device transconductance K _M2B. The method of claim 2; The high swing current mirror has a gate, a source and a drain, the gate further comprising a transistor M3B connected to the gate of the transistor M2B, the gate of the transistor M3A connected to the drain of the transistor M3B, The drain of the transistor M3A is connected to the source of the transistor M3B. The method of claim 6; The transistor M2B has a device transconductance variable K _M2B and the drain current I _IN2 , and the transistor M3B has a device transconductance variable K _M3B and the drain current I _IN3 , wherein the K _M2B , K _M3B , I _IN2 and I _IN3 is a relational expression High swing current mirror, characterized in that selected according to. The method of claim 2; The high swing current mirror is connected to the drain of the transistor M1, and is connected to a first reference current source for generating the drain current I _IN1 that is a first current level, and to the drain of the transistor M2B, and the first current. A second reference current source for generating the drain current I _IN2 at a level and a third reference current source connected to the drain of the transistor M3A and for generating the drain current I _IN3 at a first current level The current mirror, characterized in that. The method of claim 2; The high swing current mirror includes the cascode current source and the bias circuit, the cascode current source further having a third bias stage, the bias circuit having a gate, source and drain, the gate being A transistor M5 connected to the drain, a gate, a source, and a drain, the gate and the source each having a transistor M6A connected to a gate and a source of the transistor M5, and a gate and a drain connected to the third bias terminal; A transistor M6B having a source connected to the drain of the transistor M6A, a gate connected to the gates of the transistors M1 and M2A, a source connected to the sources of the transistors M1 and M6A, and a source connected to the transistors M5 and 6A. Further includes transistor M7 with drain It is a high swing current mirror, characterized in annoying. The method of claim 9; The transistor M5 has a drain current I _IN4 , the transistors M6A and M6B have a drain current I _IN6 , and the transistor M7 has a relational expression. High swing current mirror, characterized in that it has an element transconductance variable KM7 in accordance with. The method of claim 9; The transistor M5 has a device transconductance variable KM5 and drain current I _IN4, the transistor M6A has a device transconductance parameter K _M6A and drain current I _IN5, the transistor M2B is a device transconductance parameter K _M2B and the drain current I I of the _IN2, the K _{M5, M6A} K, K _M2B, I _{IN4, IN5} I _IN2 and I is a relational expression High swing current mirror, characterized in that selected according to. 12. The method of claim 11; The bias circuit further includes a transistor M2C having a drain connected to the gate of the transistor M2B and a gate connected to the third bias stage, and cascode connected to the drain of the transistor M2B, wherein the transistor M6B comprises a device transformer. _{Having a} conductance K _M6B and the drain current I _IN2 , the transistor M2C has a device transconductance variable K _M2C and the drain current I _IN2 , where K _M6B , K _M2C , I _IN5 , and I _IN2 are relational expressions. High swing current mirror, characterized in that selected according to. 12. The method of claim 11; The bias circuit further includes a transistor M3C having a drain connected to the gate of the transistor M3A and a gate connected to the third bias stage, and cascode connected to the drain of the transistor M3A, wherein the transistor M6B comprises a device. _{Having a} transconductance variable K _M6B and the drain current I _IN5 , the transistor M3C has a device transconductance variable K _M3C and the drain current I _IN3 , where K _M6B , K _M3C , I _IN5 and I _IN3 are relational expressions. High swing current mirror, characterized in that selected according to. In an integrated circuit; A cascode current source having an output stage and a first and second bias stages; A current source bias circuit, the current source bias circuit having a gate, a source and a drain, the gate and drain comprising a first transistor and a second bias circuit portion connected to the first bias stage, the second The bias circuit has a gate, a source and a drain, wherein the gate and the drain are connected to each other and the source is connected to a source of the first transistor, a drain, a gate connected to a gate of the second transistor, And a third transistor having a source connected to the source of the second transistor, a source connected to the drain of the third transistor, and a fourth transistor having a drain and a gate connected to the second bias terminal. And swing current mirror.