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KR980006305A - DRAM semiconductor device and access method thereof - Google Patents

DRAM semiconductor device and access method thereof Download PDF

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Publication number
KR980006305A
KR980006305A KR1019960020357A KR19960020357A KR980006305A KR 980006305 A KR980006305 A KR 980006305A KR 1019960020357 A KR1019960020357 A KR 1019960020357A KR 19960020357 A KR19960020357 A KR 19960020357A KR 980006305 A KR980006305 A KR 980006305A
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KR
South Korea
Prior art keywords
cell array
dram
sram
sram cell
arrays
Prior art date
Application number
KR1019960020357A
Other languages
Korean (ko)
Inventor
장성욱
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019960020357A priority Critical patent/KR980006305A/en
Publication of KR980006305A publication Critical patent/KR980006305A/en

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Abstract

본 발명은 DRAM 반도체 장치 및 그 억세스 방법에 관해 게시한다. 종래의 DRAM은 SRAM에 비하여 억세스 타임이 길다. 그러나 본 발명은 DRAM 셀 어레이와 데이터 버퍼 사이에 다수의 SRAM 셀 어레이들을 구비함으로써 데이터 억세스 타임은 SRAM과 같이 빨라진다.(제2도)The present invention relates to a DRAM semiconductor device and an access method thereof. Conventional DRAMs have longer access times than SRAMs. However, the present invention provides a plurality of SRAM cell arrays between the DRAM cell array and the data buffer, so that the data access time is as fast as SRAM.

Description

디램(DRAM) 반도체 방치 및 그 억세스(access) 방법DRAM semiconductor leaving and access method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제 2도는 본 발명의 디램 반도체 장치의 블록도2 is a block diagram of a DRAM semiconductor device of the present invention.

Claims (4)

DRAM 셀 어레이; 및 상기 DRAM 셀 어레이와 데이터 전송이 가능한 다수의 SRAM 셀 어레이들을 구비하는 것을 특징으로 하는 DRAM 반도체 장치.DRAM cell arrays; And a plurality of SRAM cell arrays capable of transferring data with the DRAM cell array. 제1항에 있어서, 상기 SRAM 셀 어레이들은 SRAM셀 어레이들의 어드레스를 지정하는 SRAM 어드레스 버퍼를 더 구비하는 것을 특징으로 하는 DRAM.The DRAM of claim 1, wherein the SRAM cell arrays further comprise an SRAM address buffer that addresses the SRAM cell arrays. 제1항에 있어서, 상기 SRAM셀 어레이들과 DRAM 셀 어레이는 DRAM 셀 어레이와 SRAM셀 어레이들 사이의 데이터 전송을 제어하는 전송제어부를 더 구비하는 것을 특징으로 하는 DRAM.The DRAM of claim 1, wherein the SRAM cell arrays and the DRAM cell array further include a transfer control unit controlling data transfer between the DRAM cell array and the SRAM cell arrays. DRAM 셀 어레이에서 SRAM셀 어레이 또는 SRAM셀 어레이에서 DRAM 셀 어레이로 데이터의 전송을 허용하는 제1 제어신호가 인에이블되는 단계; DRAM셀 어레이와 SRAM셀 어레이 사이의 데이터 전송 방향을 지시하는 제2제어신호가 발생되는 단계; 다수의 SRAM셀 어레이들 중 하나를 선택하는 제3 제어신호가 발생하는 단계; 및 DRAM셀 어레이의 특정 로우 어드레스가 지정되어 DRAM셀 어레이의 데이터가 지정된 SRAM셀 어레이로 전송되는 단계를 포함하는 것을 특징으로 하는 DRAM억세스 방법.Enabling a first control signal allowing transfer of data from the DRAM cell array to the SRAM cell array or from the SRAM cell array to the DRAM cell array; Generating a second control signal indicating a data transfer direction between the DRAM cell array and the SRAM cell array; Generating a third control signal for selecting one of the plurality of SRAM cell arrays; And transferring the data of the DRAM cell array to the designated SRAM cell array by designating a specific row address of the DRAM cell array. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019960020357A 1996-06-07 1996-06-07 DRAM semiconductor device and access method thereof KR980006305A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960020357A KR980006305A (en) 1996-06-07 1996-06-07 DRAM semiconductor device and access method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960020357A KR980006305A (en) 1996-06-07 1996-06-07 DRAM semiconductor device and access method thereof

Publications (1)

Publication Number Publication Date
KR980006305A true KR980006305A (en) 1998-03-30

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Application Number Title Priority Date Filing Date
KR1019960020357A KR980006305A (en) 1996-06-07 1996-06-07 DRAM semiconductor device and access method thereof

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KR (1) KR980006305A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100367690B1 (en) * 2000-12-04 2003-01-14 (주)실리콘세븐 Asynchronous SRAM using DRAM cell and Operating Method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100367690B1 (en) * 2000-12-04 2003-01-14 (주)실리콘세븐 Asynchronous SRAM using DRAM cell and Operating Method thereof

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