KR970072341A - A package in which a bump of a bonding pad and a built-in lead frame are bonded and a manufacturing method thereof - Google Patents

Abstract

The lead frame includes a chip having a plurality of bonding pads, a lead frame having a plurality of electrically conductive fringing tips corresponding to the bumps formed on the top surfaces of the bonding pads, Through holes corresponding to the lead frame for transmitting electrical signals to the outside from the lead frame; solder balls formed on the upper surface of the hole for mounting the substrate; Pads, bumps, adhesive tape, and lead frame. The present invention provides a semiconductor package encapsulating a semiconductor chip and having a solder ball so that the semiconductor chip has lower cost than the LOC structure applied when the bonding pad on the upper surface of the chip is located at the center of the chip, The present invention provides a new type of plastic package and a method of manufacturing the same in order to minimize the electric influence due to the internal connection structure and to achieve efficient heat dissipation.

Description

A package in which a bump of a bonding pad and a built-in lead frame are bonded and a manufacturing method thereof

Since this is a trivial issue, I did not include the contents of the text.

FIG. 2 is a cross-sectional view of a package in which a bump of a bonding pad according to the present invention and a built-in lead frame are directly bonded and a solder ball is formed through the hole.

Claims (26)

A chip having a plurality of bonding pads; Bumps formed on an upper surface of the bonding pads of the chip; A lead frame having a plurality of bumps formed therein; A cushioning material adhered to a bottom surface of the lead frame to prevent damage to the upper surface of the chip; The chip, the bonding pads, the bumps, the buffer material, and the lead frame. A sealing resin; Through-via holes formed in a resin respectively corresponding to the lead frame for transmitting electrical signals from the lead frame to the outside; Wherein the solder balls are filled in the via-holes for mounting the substrate. The semiconductor package according to claim 1, wherein all of the lower surface of the chip is exposed to the outside. The semiconductor package according to claim 1, wherein a part of the bottom surface of the chip is exposed to the outside. The semiconductor package according to claim 1, wherein a heat sink is attached to a lower surface of the chip. 5. The semiconductor package of claim 4, wherein the exposed portion of the heat sink is plated for corrosion protection. The semiconductor package according to claim 1, wherein the buffer material is a single-sided adhesive insulating tape. The semiconductor package according to claim 1, wherein the array of solder balls is arranged in a zigzag form. The semiconductor package according to claim 1, wherein the solder ball is formed in a hemispherical shape. 2. The semiconductor package according to claim 1, wherein the lead frame has a portion where the electrical connection hole is in contact with the lead frame, the lead frame being remained on a circular plate. The semiconductor package according to claim 1, wherein the holes of the holes are tab-shaped and electroless-electroplated. The method of claim 1, wherein a portion of the lead frame to which the adhesive tape is to be attached is pressed to facilitate electrical connection between the bumps and the fluting tip, Wherein a portion to which the semiconductor device is attached is thin. The semiconductor package according to claim 1, wherein a portion of the via hole in contact with the solder ball has an obtuse angle. The semiconductor package according to claim 1, wherein the solder balls protrude from the resin. a. Electrically connecting the corresponding leads to the bonding pads of the chip; b. Forming via holes in portions of the resin encapsulating and resin-sealing the chips and leads in the resin and electrically corresponding to the leads to form a package body; c. Applying a conductive metal film to the inside of the bar holes; d. Aligning the solder mask with holes corresponding to the via holes with the via holes; e. Applying a solder paste on the mask; f. Removing the mask to form a solder ball; ≪ / RTI > 15. The method of claim 14, further comprising forming a bump on the bonding pad in step (a), and electrically connecting the leads and the chip. The method of manufacturing a semiconductor package according to claim 15, wherein the method of forming the bump includes a step of forming a capillary used in a wire bonding process. 16. The method of claim 15, comprising thermocompression bonding the bump and the fluting tip of the lead frame. 15. The method of claim 14, comprising electroplating the plating tip portion on the lead frame electrically connected to a bonding pad of the chip on the lead frame in step a. 15. The method of claim 14, further comprising bonding a buffer material to the lower surface of the leads to protect the surface of the chip in step (a). The method of manufacturing a semiconductor package according to claim 19, wherein the adhesive is a single-sided adhesive tape. 15. The method of claim 14, further comprising the step of forming pins in the molding die up to the electrical connection sites on the leads electrically corresponding to the via-holes in step (b), and forming the via-holes in the molding process Wherein said semiconductor package is a semiconductor package. 15. The method according to claim 14, wherein the outer portion of the via-holes is formed in an obtuse angle so that the solder ball can be easily seated in the step b. 15. The method of claim 14, wherein in step (c), a conductive film is formed in the via-holes by an electroless plating method. 15. The method of claim 14, wherein in step (e), the paste is applied by a screen printing method. 15. The method of claim 14, wherein the solder balls are formed in step (f) by solder balls formed by an I R reflow method. 15. The method of claim 14, wherein the solder balls formed in step (f) are formed in a hemispherical shape. ※ Note: It is disclosed by the contents of the first application.