KR970004841B1 - Lateral resurfed mosfet - Google Patents

Abstract

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Description

Horizontal Conductive Modulation MOSFET

1 is an equivalent circuit diagram of a diode connected in parallel with a conventional conductive modulated MOSFET in a reverse direction.

2 is a cross-sectional view of a lateral conductivity modulated MOSFET according to a first embodiment of the present invention.

3 is a cross-sectional view of a lateral conductivity modulated MOSFET according to a second embodiment of the present invention.

4 is a cross-sectional view of a lateral conductivity modulated MOSFET according to a third embodiment of the present invention.

5 is a cross-sectional view of a lateral conductivity modulated MOSFET according to a fourth embodiment of the present invention.

6 is a cross-sectional view of a lateral conductivity modulated MOSFET according to a fifth embodiment of the present invention.

7 is a cross-sectional view of a lateral conductivity modulated MOSFET according to a sixth embodiment of the present invention.

8 is a cross-sectional view taken along the line VII-VII in the plan view of FIG. 7.

9 is a plan view of a lateral conductivity modulated MOSFET according to a seventh embodiment of the present invention.

10 is a plan view of a lateral conductivity modulated MOSFET according to an eighth embodiment of the present invention.

FIG. 11 is a cross-sectional view taken along the line XI-XI in the plan view of FIG.

12 is a plan view of a lateral conductivity modulated MOSFET according to a ninth embodiment of the present invention.

13 is a plan view of a lateral conductivity modulated MOSFET according to a tenth embodiment of the present invention.

14 is a cross-sectional view of one modification that can be implemented based on the first to tenth embodiments of the present invention.

15 is a cross-sectional view of a lateral conductivity modulated MOSFET according to an eleventh embodiment of the present invention.

16 is a cross-sectional view of a lateral conductivity modulated MOSFET according to a twelfth embodiment of the present invention.

17 is a cross-sectional view of a lateral conductivity modulated MOSFET according to a thirteenth embodiment of the present invention.

* Explanation of symbols for the main parts of the drawings

1: silicon organ 2: p-type epitaxial layer

3: n-type buffer layer 4: n ^- type drift layer

5 gate insulating film 6 gate electrode

8: P ⁺ type drain layer 9: N ⁺ type source layer

10 source electrode 11 drain electrode

13: n type cathode layer 14: n ⁺ type layer

15 cathode electrode 16 insulating film

17: n ^- type layer 18,19: oxide film

20: polysilicon 100: conductor

[Industrial use]

The present invention relates to a lateral conductivity modulated MOSFET in which drains, sources and gates are formed on one surface of a semiconductor substrate.

[Traditional Technology and Problems]

As a lateral conduction modulation MOSFET using conduction modulation resulting from electrons and holes stored in a drift layer, M. Darwish et al. Lateral Resurfed COMFET, Electronics Letters. 7th June 1984, Vol. 20, No. 12, pp519-520. In this type of lateral conduction modulation MOSFET, carriers accumulated in the n-type base layer need to be removed quickly to increase the switching speed during the turn-off operation. If electrons do not move quickly from the n-type base layer to the drain layer, The pnp type transistor composed of the p-type drain layer, the n-type base layer and the p-type base layer is operated, so that a large amount of tail current flows through the conductive modulated MOSFET, so that during turn-off operation The switching speed will slow down. Therefore, one of the methods to speed up the turn-off operation is to shorten the life of the carrier in the n-type base layer. Although this method can improve the turn-off characteristics, the on-state voltage of the device increases. There is a problem.

FIG. 1 shows a case where a conductive modulated MOSFET in which a conventional diode is connected in parallel with a MOSFET in a reverse direction is used as an inverter circuit in a motor driving circuit. The reason why the diode is connected in this circuit is stored in the inductance component of the motor. To regenerate energy. However, when the diode is connected as described above, the size of the device is increased and the manufacturing cost is also increased.

To solve this problem, an anode-short structure has been proposed, which is disclosed in M.R.Simpson et al. Analysis of Lateral Insulated Gate Transistor IEDM85.pp740-743. Using the anode-short structure enables carriers accumulated in the n-type base layer to be effectively released through the anode-shot portion during the turn-off operation, thereby obtaining a high switching speed. The use of the anode-short structure makes it possible to naturally integrate the diode circuit shown in FIG. 1 into the conductive modulated MOSFET, thereby eliminating the need for external diode connection.

However, when the anode-short structure is used, holes cannot be efficiently injected from the p-type drain layer to the n-type base layer. Therefore, the advantage of conduction modulation cannot be fully utilized, which causes a problem that the on-state voltage of the MOSFET is undesirably increased.

In other words, for satisfactory conductivity modulation, the lateral resistance of the n-type base layer located below the drain layer must be increased. For this purpose, the ⓛ P ⁺ -type drain layer must be extended to the anode-short portion, and ② The impurity concentration of the type base layer should be lowered, and ③ the n type base layer located below the P ⁺ type drain layer should be thinned.

However, if the condition of ① is satisfied, the element area of the conductive modulated MOSFET is increased. If the condition of ② or ③ is satisfied, the breakdown voltage of the conductive modulated MOSFET is lowered.

As described above, when the anode-short structure is used in the conventional conductive modulation MOSFET, the switching characteristics during the turn-off operation can be improved, but the on-state voltage inevitably increases. In addition, in order to use the anode-short structure without increasing the on-state voltage, there is a problem that an increase in the device area or a decrease in the breakdown voltage is inevitable.

[Purpose of invention]

SUMMARY OF THE INVENTION The present invention has been invented in view of the above-described problems, and is intended to provide a horizontally conductive modulated MOSFET that solves the problems caused by using the above-described anode-short structure and has a low on-state voltage and high-speed turn-off characteristics. The purpose is.

[Configuration of Invention]

In order to achieve the above object, in the lateral type conductive modulated MOSFET of the first type of the present invention, a first conductive type drain layer is formed on a second conductive base layer, and is formed adjacent to the second conductive base layer. A two-conducting cathode layer is formed, which is separated from the second conductive base layer by pn junction and is connected to the drain electrode and the cathode electrode set on the coin.

The lateral conductivity modulated MOSFET of the second type of the present invention has a structure in which a second gate electrode is formed on the surface of the second conductive base layer inserted between the wafer region and the drain layer via a gate insulating film. .

(Action)

In the lateral type conductive modulated MOSFET of the first type configured as described above, a substantial anode-short structure is not formed before a large current flows through the MOSFET. For example, the first conductive type is p type and the second conductive type is n type. Assume that the n-type cathode layer is formed adjacent to the n-type base layer.

In this case, when the device is turned on, electrons injected from the n-type source layer from the n-type base layer are absorbed into the p-type drain layer unless a large amount of electrons are injected, wherein holes are injected from the drain layer to the n-type base layer. As a result, conductive modulation occurs. When a large amount of electrons are injected to increase the current, holes injected from the p-type drain layer into the n-type base layer are rapidly released from the n-type base layer and accumulated in the substrate. When a large amount of holes are accumulated in the substrate, electrons are injected from the n-type base layer into the engine, and the electrons are easily released from the substrate into the drain layer and the cathode layer set on the coin during the turn-off operation. Therefore, in the MOSFET of the first type described above, a substantial anode-short structure is formed when a large amount of electrons are injected, thereby lowering the on-state voltage and improving the turn-off characteristic.

Since the n-type base layer and the n-type cathode layer are separated from each other by a pn junction in the first type lateral conductivity modulated MOSFET, the size of the device increases or breaks down unlike the conventional anode-short structure. Problems such as a low voltage are solved. Furthermore, an equivalent pn junction diode is formed between the n-type cathode layer and the p-type base layer, and the pn junction diode is connected to the conductive modulation MOSFET in parallel in the opposite direction. MOSFETs will also have reverse conduction.

In the lateral type conductive modulation MOSFET of the second type configured as described above, when a bias is supplied to the second gate electrode during the turn-off operation, a channel is formed in the surface region of the second base layer. Positive carriers can be injected from the drain layer into the substrate region. Therefore, despite the anode-short structure, the injection efficiency of the carrier during the turn-off operation is not lowered, and thus the on-state voltage is not increased.

That is, according to the second type of conductive modulation MOSFET of the present invention, a low on-state voltage and satisfactory turn-off characteristic are achieved.

(Example)

Hereinafter, each embodiment of the present invention will be described in detail with reference to the accompanying drawings.

First, the conductive modulated MOSFET according to the first embodiment of the present invention will be described with reference to FIG.

First, a P ⁺ type or n ⁺ type or ^n-type silicon substrate 1 and epitaxially grown p on a silicon substrate ⁽¹⁾ preparing a mold Epic epitaxial layer wafer consisting of (2), after the ^p-type The p-type base layer 7 is selectively formed in the surface region of the epitaxial layer 2. The n ⁺ type source layer 9 is selectively formed in the surface region of the p type base layer 7, and the p type base layer 7 is formed in the surface region of the p ⁻ type epitaxial layer 2. The n ^- type high resistance base layer (4: drift layer) and the n type low resistance base layer 3 (buffer layer) are formed adjacent to the substrate. At this time, the n ⁻ type drift layer 4 is simultaneously connected to the p type base layer 7 and the n type buffer layer 3. A P ⁺ type drain layer 8 is formed in the surface region of the n type buffer layer 3. The portion of the p-type base layer 7 located between the n ⁺ -type source layer 9 and the n ⁻ -type drift layer 4 serves as a channel region. The gate insulating film 5 is formed on the channel region. The gate electrode 6 is formed on the gate insulating film 5. The source electrode 10 is connected to both the source layer 9 and the base layer 7, and the drain electrode 11 is connected to the p ⁺ type drain layer 8.

The n-type cathode layer 13 is selectively formed in the surface region of the p ⁻ type epitaxial layer 2, whereby the n-type buffer layer 3 is formed of the n-type cathode layer 13 and the p-type base layer 7. Will be located between In this case, the n-type cathode layer 13 is separated from the n-type buffer layer 3 by the p ⁻ type epitaxial layer 2. An n ⁺ type layer 14 is formed in the surface region of the n type cathode layer 13, and the cathode electrode 15 is in ohmic contact with the n ⁺ type layer 14. In addition, the cathode electrode 15 and the drain electrode 11 are connected to each other and are set on the coin.

Next, the basic operation of the conductive modulated MODFET configured as described above will be described in detail.

Applying a bias, which is positive biased to the gate electrode 6, to the conductive modulated MOSFET to turn on the potential of the source electrode inverts the polarity of the channel region on the surface of the p-type base layer 7, so that the electrons are sourced. Is injected into the n ⁻ -type drift layer 4 from. When electrons are injected into the p ⁺ type drain layer 8 through the n type buffer layer 3 by the flow of electrons, the pn junction formed by the n type buffer layer 3 and the p ⁺ type drain layer 8 becomes bar is to be forward biased, and therefore holes are p ⁺ type drain layer (8) n as a parameter, an n-type buffer layer 3 from ^- is injected in the form de frit layer (4), so when the holes are injected ^n-type Conduction modulation occurs in the drift layer 4. At this time, the resistance of the n ⁻ -type drift layer 4 is reduced due to the conductive modulation, so that the on-state voltage is lowered.

When a large amount of current flows through the conductive modulated MOSFET, holes injected from the p ⁺ type drain layer 8 are rapidly released from the n type buffer layer 3 and the n ⁻ type drift layer 4, and thus the p ⁻ type anode is to be accumulated in the pitaek layer 2, electrons also p in the n-type buffer layer 3 ^{thus-injected} to form the epitaxial layer (2) p ^- is the conductivity modulation in the type epitaxial layer (2) take place .

When a negative or zero bias is applied to the gate electrode 6 relative to the potential of the source electrode 10, the channel inversion layer positioned below the gate electrode 6 is lost, and electrons from the source layer 9 are lost. Injection is interrupted and the conductive modulated MOSFET is then turned off. First embodiment, n-type cathode layer 13. In the device according to the p ^- located in the surface region of the type epitaxial layer (2) Because the p ^- e stored in the type epitaxial layer 2 is turned off During operation, it is quickly discharged from the conductive modulated MOSFET through the n-type cathode layer 13. That is, the device of the first embodiment is operated as in the case of having the anode-short structure substantially, so that the switching speed during the turn-off operation is increased.

The device according to the first embodiment operates in the same way as the conventional device in the on state, but does not increase the device area or decrease the breakdown voltage when the anode-short structure is employed, and obtains a low on-state voltage. Will be. In addition, when the device according to the first embodiment of the present invention is turned off, the n-type cathode layer 13 acts as a substantially anode-short structure, thereby obtaining a high-speed turn-off characteristic.

In the first embodiment of the present invention, a diode composed of the p-type base layer 7, the p ⁻ epitaxial layer 2, and the n-type cathode layer 13 is connected in parallel to the conductive modulated MOSFET in the reverse direction. Therefore, the reverse conduction function can be realized without a diode connected to the outside.

Next, other embodiments of the present invention will be described. In the following description, the same reference numerals are given to parts corresponding to the first embodiment (Fig. 2), and detailed description thereof will be omitted.

First, a second embodiment of the present invention will be described with reference to FIG.

In FIG. 3, an insulating film 16 is formed between the end of the p ⁺ type drain layer 8 and the end of the n ⁺ type layer 14 so that the n type buffer layer 3 and the p ⁻ type epitaxial layer 2 are formed. ) And an n-type CAD layer 13, and a conductor 100 in which the drain electrode 11 and the cathode electrode 15 are integrated is formed on the insulating film 16.

4 shows a third embodiment of the present invention, in which the n ⁻ type drift layer 4 is not connected to the p type base layer 7 and is actually connected to the p type base layer 7. It is located a little far away.

5 shows a fourth embodiment of the present invention. In this embodiment, the semiconductor substrate 1, the p ⁻ type epitaxial growth layer 2 epitaxially grown on the semiconductor substrate 1, and the A semiconductor wafer made of a high resistance n ⁻ type layer 17 epitaxially grown on the p ⁻ type epitaxial growth layer 2 is used. Thus, as long as the n ⁻ type layer 17 maintains sufficient high resistance, the n type cathode layer 13 and the n type buffer layer 3 are substantially separated from each other. Therefore, also in this fourth embodiment, advantages similar to those of the first embodiment can be obtained. The n ⁻ type layer 17 may be formed by diffusion of impurities.

FIG. 6 shows a fifth embodiment of the present invention. In this embodiment, a wafer separated into two parts by a dielectric is used. That is, in FIG. 6, the upper portion of the oxide film 18 is the first silicon substrate, and the lower portion of the oxide film 18 is the second silicon substrate 21. In FIG. The surfaces of the first and second silicon substrates are mirror polished. An oxide film 18 functioning as an insulating film is located between the surfaces of the first and second silicon substrates that have been polished, and the first and second silicon substrates are directly bonded in the state where the oxide film 18 is sandwiched between them. Are integrated by.

The first silicon substrate is provided with a groove used for forming an element isolation region. An oxide film 19 is formed on an inner wall of the groove, and a polysilicon 20 is embedded in the groove. This type of wafer separated into two parts by a dielectric can also be formed by embedding single crystal silicon in a polysilicon substrate.

In the above embodiment, only the main cross-sectional structure of the conductive modulated MOSFET is shown, but in the following embodiments, a more specific layout and cross-sectional structure will be shown.

7 and 8 show a sixth embodiment of the present invention, wherein the conductive modulated MOSFET according to the sixth embodiment is modified to actually use the conductive modulated MOSFET according to the second embodiment. .

In the sixth embodiment, the gate electrode 6 is formed in the form of an elliptical ring, and the p-type drain layer 8 is formed in the form of an elliptical ring inside the gate electrode 6. Outside the gate electrode 6, an n-type source layer 9 is also formed in the form of an oval ring. The n-type cathode layer 13 is formed in an island shape and surrounded by the drain layer 8. On the other hand, the elements shown in FIGS. 7 and 8 represent only one unit element arranged in a stripe shape, and in the actual element, a plurality of unit elements having the structures shown in FIGS. 7 and 8 are shown. Will be arranged and used.

FIG. 9 shows a seventh embodiment of the present invention, which is obtained by modifying the sixth embodiment shown in FIGS. 7 and 8, in which a plurality of regions within the region surrounded by the drain layer 8 are shown. Cathode layers 13a, 13b, ... are located.

10 and 11 show an eighth embodiment of the present invention, in which the relationship between the drain and the source and the sixth embodiment shown in FIGS. 7 and 8 are reversed. In particular, the n-type source layer 9 and the n-type cathode layer 13 are located inside and outside the p-type drain layer 8 formed in the form of an elliptical ring, respectively.

FIG. 12 shows a ninth embodiment of the present invention, which is a modification of the eighth embodiment shown in FIGS. 9 and 11.

In the ninth embodiment, the unit device is composed of the source layer 9, the drain layer 8, and the gate layer 6, and the unit device formed in the shape of an elliptical ring is located at the center of the wafer. The n-type cathode layer 13 is formed only in the straight portion located outside the unit element.

FIG. 13 shows a tenth embodiment of the present invention, which is a further modification of the ninth embodiment shown in FIG. 12, where a plurality of cathode layers 13a, 13b, 13c, and 13d are provided. It is arranged so as to surround the unit element.

In the sixth to tenth embodiments (Figs. 7 to 13) described above, the same effects as those obtained in the first to fifth embodiments described above are obtained.

The embodiments described above can be modified in various ways, and FIG. 14 shows such modifications. That is, the element according to the present invention may be formed in the region A of the wafer while the conventional element is formed in the region B as shown in FIG. The semiconductor wafer does not need to be limited to epitaxially grown wafers, and FZ wafers or CZ wafers can also be used. Moreover, you may set the conductivity type of each layer mentioned above as a conductivity type conversely.

FIG. 15 shows an eleventh embodiment of the present invention, which is the same as the first embodiment shown in FIG. 2 except for the first gate electrode 6 and the second gate electrode 23. . The first gate electrode 6 and the gate insulating film 5 are formed on the surface of the p-type base layer 7, and the second gate electrode 23 is formed through the drain insulating layer 22 through the gate insulating film 22. 8) and the cathode layer 14 are formed on the wafer surface. The pattern of such a structure can be designed to be similar to the pattern shown in FIG. 7 and FIG. In the eleventh embodiment, the surface of the second gate electrode 23 is covered with an insulating film, and the drain electrode 11 and the cathode electrode 15 are integrally formed on the insulating film formed on the second gate electrode 23. Modifications are also possible.

The basic operation of the conductive modulated MOSFET according to the eleventh embodiment is similar to that of the first embodiment shown in FIG. In order to turn on the conductive modulated MOSFET according to the eleventh embodiment, when a voltage that is negative compared to the voltage supplied to the drain electrode 11 is supplied to the second gate electrode 23, the lower side of the second gate electrode 23 is applied. An inversion layer is generated in the surface region of the n-type buffer layer 3 positioned to form a channel. Then, holes are injected directly from the drain layer 8 into the p ⁻ type epitaxial layer 2, so that the conduction modulation effect is increased, and thus the on-state voltage can be further lowered. On the other hand, to turn off the conductive modulated MOSFET of the present embodiment, a positive voltage or a zero voltage may be supplied to the second gate electrode 23.

FIG. 16 shows the twelfth embodiment of the present invention, which differs from the previous embodiment in that the anode-short structure is applied to the drain layer 8. In particular, a part of the drain electrode 11 is formed while the part of the drain electrode 11 is connected to the n-type buffer layer 3 as the circuit-circuit 24. In the twelfth embodiment, the cathode layer is not formed, and the surface area of the n-type buffer layer 3 in which the second gate electrode 23 is inserted between the drain layer 8 and the p ⁻ type epitaxial layer 2 is shown. At the gate insulating film 22.

To turn on the conductive modulation MOSFET according to the twelfth embodiment, a negative bias is applied to the second gate electrode 23 as in the eleventh embodiment shown in FIG. When the bias is applied, the p ^- type epitaxial layer 2 is formed from the drain layer 8 through the channel region formed in the surface region of the n-type buffer layer 3 located below the second gate electrode 23. It is injected into the conductive modulated effect is enhanced. In addition, in the twelfth embodiment, the reverse conduction function can also be realized by the pn junction diode composed of the n-type buffer layer 3, the n ^- type drift layer 4, and the p ^- type base layer 7.

In the above-described conductive modulated MOSFET of the twelfth embodiment, problems such as the reduction of the hole injection rate, for example, from the drain caused by using the anode-short structure, can be solved by a method different from the first embodiment.

FIG. 17 shows the thirteenth embodiment of the present invention, which combines the eleventh and twelfth embodiments shown in FIGS. In this thirteenth embodiment, the same effects as in the previous embodiments can be obtained, so the description of the operation will be omitted.

On the other hand, the reference numerals corresponding to the drawings written in the constituent elements of the claims are for the purpose of facilitating the understanding of the present invention. no.

[Effects of the Invention]

As described above, according to the present invention, it is possible not only to increase the device area and to lower the breakdown voltage in the horizontal conductive modulated MOSFET, but also to lower the on-state voltage and to obtain a high-speed turn-off characteristic. At the same time, it is possible to realize a conductive modulated MOSFET with reverse conduction.

Claims (21)

Semiconductor wafers 1, 2, 17, first conductive base layers 7a, 7b selectively formed in the surface regions of the semiconductor wafers 1, 2, 17, and the first conductive base layers ( Source layers 9 of the second conductivity type selectively formed on the surface regions of 7a and 7b, base layers 3 and 4 of the second conductivity type selectively formed on the semiconductor wafers 1, 2 and 17, and The first conductive type drain layer 8 formed in the surface area of the second conductive type base layers 3 and 4, the source layer 9 and the second conductive type Jays layers 3 and 4 interposed therebetween. The gate insulating film 5 formed on the surface areas of the base layers 7a and 7b of the conductive type, the gate electrode 6 formed on the gate insulating film 5, the source layer 9 and the first conductive type The second conductive layer is formed on the surface regions of the source electrode 10 connected to the base layers 7a and 7b, the drain electrode 11 connected to the drain layer 8, and the semiconductor wafers 1, 2 and 17. Second conductive casing formed adjacent to the base base layers 3 and 4 Layers 13 and 14, the drain electrode 11 and the coin is set up while the cathode layer (13, 14) the cathode (15) lateral conductivity modulation type MOSFET, characterized in that configured by having a connection to. The semiconductor wafers 1 and 2, the first conductive base layers 7a and 7b selectively formed in the surface regions of the semiconductor wafers 1 and 2, and the first conductive base layers 7a and 7b. A source layer 9 of the second conductivity type selectively formed in the surface area of the second conductive base layer 3 and 4 selectively formed in the semiconductor wafers 1 and 2, and the base of the second conductivity type. The first conductive type drain layer 8 formed in the surface area of (3,4), the first conductive type base layer sandwiched between the source layer 9 and the second conductive type base layer 3,4 ( The first gate insulating film 5 formed on the surface regions of 7a and 7b, the first gate electrode 6 formed on the first gate insulating film 5, the source layer 9 and the base of the first conductive type. The base of the second conductive type in the surface region of the source electrode 10 connected to the layers 7a and 7b, the drain electrode 11 connected to the drain layer 8, and the semiconductor wafers 1 and 2; Of the second conductivity type formed adjacent to the layers 3 and 4 The cathode layer 15 and the drain layer 8 and the cathode layer 13 and 14, which are set to the cathode layers 13 and 14, the drain electrode 11 and the coin top, and are connected to the cathode layers 13 and 14, respectively. The second gate insulating film 22 formed on the surface area of the base layers 3 and 4 of the second conductive type sandwiched therebetween, and the second gate electrode 23 formed on the second gate insulating film 22, Horizontal conductive modulated MOSFET, characterized in that configured. The semiconductor wafers 1 and 2, the first conductive base layers 7a and 7b selectively formed in the surface regions of the semiconductor wafers 1 and 2, and the first conductive base layers 7a and 7b. A source layer 9 of the second conductivity type selectively formed in the surface area of the second conductive base layer 3 and 4 selectively formed in the semiconductor wafers 1 and 2, and the base of the second conductivity type. The first conductive type drain layer 8 formed in the surface area of the layers 3 and 4, and the first conductive type base layer sandwiched between the source layer 9 and the second conductive type base layers 3 and 4, respectively. The first gate insulating film 5 formed on the surface area of (7a, 7b), the first gate electrode 6 formed on the first gate insulating film 5, the source layer 9 and the first conductive type The source electrode 10 connected to the base layers 7a and 7b at the same time, the drain electrode 11 and the drain layer simultaneously connected to the drain layer 8 and the base layers 3 and 4 of the second conductive type. (8) and semiconductor wafers (1, 2) adjacent to the drain layer (8) A second gate insulating film 22 formed in the surface region of the second conductive type base layers 3 and 4 sandwiched between the portions, and the second gate electrode 23 formed on the second gate insulating film 22. Horizontal conductive modulated MOSFET, characterized in that configured. The semiconductor wafers 1 and 2, the first conductive base layers 7a and 7b selectively formed in the surface regions of the semiconductor wafers 1 and 2, and the first conductive base layers 7a and 7b. A source layer 9 of the second conductivity type selectively formed in the surface area of the second conductive base layer 3 and 4 selectively formed in the semiconductor wafers 1 and 2, and the base of the second conductivity type. The first conductive type drain layer 8 formed in the surface area of the layers 3 and 4, and the first conductive type base layer sandwiched between the source layer 9 and the second conductive type base layers 3 and 4, respectively. The first gate insulating film 5 formed on the surface area of (7a, 7b), the first gate electrode 6 formed on the first gate insulating film 5, the source layer 9 and the first conductive type A source electrode 10 simultaneously connected to the base layers 7a and 7b, a drain electrode 11 simultaneously connected to the drain layer 8 and the base layers 3 and 4 of the second conductive type, and the semiconductor wafer Bays of the second conductivity type in the surface area of (1, 2) Cathode electrodes 13 and 14 of the second conductive type formed adjacent to the layers 3 and 4, and cathode electrodes 13 and 14 connected to the cathode layers 13 and 14 while being set on the coin electrode with the drain electrode 11 15) a second gate insulating film 22 formed on the surface area of the second conductive base layer 3, 4 sandwiched between the drain layer 8 and the cathode layers 13, 14, the second gate And a second gate electrode (23) formed on the insulating film (22). The insulating layer 16 is formed to extend to the surface of the drain layer 8 and the cathode layer (13, 14), the drain electrode 11 and the cathode electrode 15 is A horizontal conductive modulated MOSFET characterized in that it is formed integrally with each other on the insulating film (16). The lateral conductivity as claimed in claim 1, wherein the semiconductor wafer is divided by dielectrics (19,20) formed on a semiconductor substrate, and the lateral conductivity modulated MOSFET is formed in a semiconductor layer obtained by dividing the semiconductor wafer. Modulated MOSFETs. The second ring of claim 1, wherein the gate electrode is in the form of a first ring, the source layer is positioned outside the first ring, and the drain layer is positioned inside the first ring. And the cathode layer is located inside the drain layer. The method of claim 1, wherein the gate electrode is in the form of a first ring, the source layer is located inside the first ring, the drain layer is located outside the first ring, the cathode layer is And a lateral conductivity modulated MOSFET positioned outside the drain layer. The lateral conductivity modulated MOSFET according to claim 8, wherein an insulating film is formed on the surface of the second gate electrode, and the drain electrode and the cathode electrode are integrally formed on the insulating film. 8. The lateral conductivity modulated MOSFET of claim 7, wherein the second gate electrode is formed between the drain layer and the cathode layer. 3. The lateral conductivity as claimed in claim 2, wherein the semiconductor wafer is divided by dielectrics (19, 20) formed on a semiconductor substrate, and the lateral conductivity modulated MOSFET is formed in a semiconductor layer obtained by dividing the semiconductor wafer. Modulated MOSFETs. 3. The second ring of claim 2, wherein the gate electrode is in the form of a first ring, the source layer is positioned outside the first ring, and the drain layer is positioned inside the first ring. And the cathode layer is located inside the drain layer. The method of claim 2, wherein the gate electrode is in the form of a first ring, the source layer is located inside the first ring, the drain layer is located outside the first ring, the cathode layer is And a lateral conductivity modulated MOSFET positioned outside the drain layer. The lateral conductivity modulated MOSFET according to claim 13, wherein an insulating film is formed on the surface of the second gate electrode, and the drain electrode and the cathode electrode are integrally formed on the insulating film. 13. The lateral conductivity modulated MOSFET of claim 12, wherein the second gate electrode is formed between the drain layer and the cathode layer. 4. The lateral conductivity as claimed in claim 3, wherein the semiconductor wafer is divided by dielectrics (19, 20) formed on a semiconductor substrate, and the lateral conductivity modulated MOSFET is formed in a semiconductor layer obtained by dividing the semiconductor wafer. Modulated MOSFETs. 5. The lateral conductivity according to claim 4, wherein the semiconductor wafer is divided by dielectrics (19, 20) formed on a semiconductor substrate, and the lateral conductivity modulated MOSFET is formed in a semiconductor layer obtained by dividing the semiconductor wafer. Modulated MOSFETs. 5. The second ring of claim 4, wherein the gate electrode is in the form of a first ring, the source layer is positioned outside the first ring, and the drain layer is formed in the second ring. And the cathode layer is located inside the drain layer. The method of claim 4, wherein the gate electrode is in the form of a first ring, the source layer is located inside the first ring, the drain layer is located outside the first ring, the cathode layer is And a lateral conductivity modulated MOSFET positioned outside the drain layer. 20. The lateral conductivity modulated MOSFET according to claim 19, wherein an insulating film is formed on the surface of the second gate electrode, and the drain electrode and the cathode electrode are integrally formed on the insulating film. 19. The lateral conductivity modulated MOSFET of claim 18, wherein the second gate electrode is formed between the drain layer and the cathode layer.

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