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KR970003930A - 반도체장치 및 그 제조방법 - Google Patents

반도체장치 및 그 제조방법 Download PDF

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Publication number
KR970003930A
KR970003930A KR1019960023034A KR19960023034A KR970003930A KR 970003930 A KR970003930 A KR 970003930A KR 1019960023034 A KR1019960023034 A KR 1019960023034A KR 19960023034 A KR19960023034 A KR 19960023034A KR 970003930 A KR970003930 A KR 970003930A
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South Korea
Prior art keywords
insulating film
electrode
semiconductor device
manufacturing
dielectric constant
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KR1019960023034A
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English (en)
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KR100240819B1 (ko
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야스히로 시마다
야스히로 우에모토
아쯔오 이노우에
타케토시 마쯔우라
마사미찌 아즈마
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스기아먀 카즈히코
마쯔시다덴시코교 가부시기가이샤
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Publication of KR970003930A publication Critical patent/KR970003930A/ko
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Publication of KR100240819B1 publication Critical patent/KR100240819B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02356—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment to change the morphology of the insulating layer, e.g. transformation of an amorphous layer into a crystalline layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31691—Inorganic layers composed of oxides or glassy oxides or oxide based glass with perovskite structure
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/62—Capacitors having potential barriers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/692—Electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02197—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides the material having a perovskite structure, e.g. BaTiO3
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/682—Capacitors having no potential barriers having dielectrics comprising perovskite structures

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Ceramic Capacitors (AREA)

Abstract

본 발명은, 강유전체막 또는 높은 유전율을 가진 유전체막을 용량절연막으로 하는 용량소자를 내장한 반도체장치 및 그 제조방법에 관한 것으로서, 고유전체 또는 강유전체를 용량절연막으로하는 용량소자를 내장한 반도체장치와 그 제조방법에 있어서, 용량절연막의 결정입자직경의 불균일의 표준편차가 크기 때문에 내구(耐久) 부하시험에 있어서 용량소자의 누설전류가 급격히 상승하여, 반도체장치의 신뢰성이 현저하게 뒤진다고하는 과제를 해결하고, 신뢰성에 뛰어난 반도체장치 및 그 제조방법을 제공하는 것을 목적으로 한 것이며, 그 구성에 있어서, 용량절연막(6)의 소결공정에 있어서의 소결온도를 650℃로 유지하고, 소결온도에 이르는 승온레이트를 5℃/분 또는 10℃/분으로해서 소결시키므로써, 결정입자(7)의 평균입자직경이 12.8nm, 입자직경불균일의 표준편차가 2.2nm의 결정의 크기가 거의 일치된 두께 대략 185nm의 Ba0.7Sr0.3TiO3로 이루어진 용량절연막(6)을 형성하는 것을 특징으로 한 것이다.

Description

반도체장치 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 일실시예에 있어서의 반도체장치의 용량소자의 일부확대단면도, 제2도는 동 실시예에 있어서의 반도체장치의 용량절연막을 구성하는 결정입자직경의 도수분포도.

Claims (2)

  1. 집적회로가 형성된 지지기판과, 그 지지기판의 상부면에 선택적으로 형성된 제1의 전극과, 그 제1의 전극의 상부면에 형성된 고유전율유전체로 이루어진 용량절연막과, 그 용량절연막의 상부면에 상기 제1의 전극과 접촉하지 않도록 형성된 제2의 전극으로 이루어진 용량소자를 내장한 반도체장치에 있어서, 상기 고유전율유전체로 이루어진 용량절연막의 결정입자의 평균입자직경이 5~20nm의 범위에 있고 그 평균입자직경에 있어서의 이자직경의 분포가 표준편차로 3nm이내인 용량절연막을 가진 용량소자를 구비한 것을 특징으로 하는 반도체장치.
  2. 집적회로가 형성된 지지기판의 상부면에 선택적으로 제1의 전극을 형성하고, 그 제1의 전극의 상부면에 고유전율유전체를 피복한 후 산소분위기속에서 0.1~10℃/분의 범위의 어느 하나의 승온레이트로 소결온도까지 상승시켜서 고유전율유전체를 결정화시키고, 용량절연막을 형성한 후, 그 용량절연막의 상부면에 상기 제1의 전극과 접촉하지 않도록 제2의 전극을 형성하는 것을 특징으로 하는 반도체장치의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019960023034A 1995-06-22 1996-06-22 반도체장치 및 그 제조방법 KR100240819B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP95-155921 1995-06-22
JP07155921A JP3135483B2 (ja) 1995-06-22 1995-06-22 半導体装置およびその製造方法

Publications (2)

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KR970003930A true KR970003930A (ko) 1997-01-29
KR100240819B1 KR100240819B1 (ko) 2000-01-15

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US (2) US5828098A (ko)
EP (1) EP0755070B1 (ko)
JP (1) JP3135483B2 (ko)
KR (1) KR100240819B1 (ko)
CN (1) CN1082718C (ko)
DE (1) DE69625132T2 (ko)

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JP3022328B2 (ja) * 1996-06-19 2000-03-21 日本電気株式会社 薄膜形成方法
KR100275121B1 (ko) * 1997-12-30 2001-01-15 김영환 강유전체 캐패시터 제조방법
KR100277845B1 (ko) * 1998-01-14 2001-02-01 김영환 비휘발성강유전체메모리소자및그제조방법
TW404021B (en) 1998-04-09 2000-09-01 Hitachi Ltd Semiconductor memory device and manufacturing method thereof
JP2000236075A (ja) * 1999-02-12 2000-08-29 Sony Corp 誘電体キャパシタの製造方法および半導体記憶装置の製造方法
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JP4811551B2 (ja) * 2003-03-26 2011-11-09 セイコーエプソン株式会社 強誘電体膜の製造方法および強誘電体キャパシタの製造方法
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TWI316746B (en) 2006-10-03 2009-11-01 Macronix Int Co Ltd Non-volatile memory and method of manufacturing the same
KR102613029B1 (ko) * 2018-10-17 2023-12-12 삼성전자주식회사 커패시터 구조물 및 이를 구비하는 반도체 소자

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Also Published As

Publication number Publication date
EP0755070A3 (en) 1997-08-13
CN1148262A (zh) 1997-04-23
US6033920A (en) 2000-03-07
US5828098A (en) 1998-10-27
JPH098246A (ja) 1997-01-10
EP0755070A2 (en) 1997-01-22
CN1082718C (zh) 2002-04-10
DE69625132T2 (de) 2003-10-09
EP0755070B1 (en) 2002-12-04
KR100240819B1 (ko) 2000-01-15
DE69625132D1 (de) 2003-01-16
JP3135483B2 (ja) 2001-02-13

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