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KR960009839B1 - Apparatus for controlling access of video memory - Google Patents

Apparatus for controlling access of video memory Download PDF

Info

Publication number
KR960009839B1
KR960009839B1 KR88011051A KR880011051A KR960009839B1 KR 960009839 B1 KR960009839 B1 KR 960009839B1 KR 88011051 A KR88011051 A KR 88011051A KR 880011051 A KR880011051 A KR 880011051A KR 960009839 B1 KR960009839 B1 KR 960009839B1
Authority
KR
South Korea
Prior art keywords
video memory
controlling access
access
controlling
video
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
KR88011051A
Other languages
Korean (ko)
Other versions
KR890005617A (en
Inventor
Kimio Yamamura
Original Assignee
Hudsun K K
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hudsun K K filed Critical Hudsun K K
Publication of KR890005617A publication Critical patent/KR890005617A/en
Application granted granted Critical
Publication of KR960009839B1 publication Critical patent/KR960009839B1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/391—Resolution modifying circuits, e.g. variable screen formats

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Human Computer Interaction (AREA)
  • General Engineering & Computer Science (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Memory System (AREA)
  • Image Input (AREA)
  • Digital Computer Display Output (AREA)
KR88011051A 1987-09-19 1988-08-30 Apparatus for controlling access of video memory Expired - Lifetime KR960009839B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP62-235483 1987-09-19
JP62235483A JP2610275B2 (en) 1987-09-19 1987-09-19 Video memory transfer controller

Publications (2)

Publication Number Publication Date
KR890005617A KR890005617A (en) 1989-05-16
KR960009839B1 true KR960009839B1 (en) 1996-07-24

Family

ID=16986729

Family Applications (1)

Application Number Title Priority Date Filing Date
KR88011051A Expired - Lifetime KR960009839B1 (en) 1987-09-19 1988-08-30 Apparatus for controlling access of video memory

Country Status (3)

Country Link
JP (1) JP2610275B2 (en)
KR (1) KR960009839B1 (en)
GB (1) GB2210238B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2065979C (en) * 1991-06-10 1999-01-19 Stephen Patrick Thompson Mode dependent minimum fifo fill level controls processor access to video memory
JPH05158655A (en) * 1991-12-05 1993-06-25 Fujitsu Ltd Clock transfer circuit

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59143190A (en) * 1983-02-05 1984-08-16 富士通株式会社 Information processor
JPS61163021A (en) * 1985-01-14 1986-07-23 Mitsubishi Heavy Ind Ltd Noise control device of automobile

Also Published As

Publication number Publication date
GB8818787D0 (en) 1988-09-07
JP2610275B2 (en) 1997-05-14
KR890005617A (en) 1989-05-16
GB2210238A (en) 1989-06-01
JPS6478319A (en) 1989-03-23
GB2210238B (en) 1992-05-13

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Legal Events

Date Code Title Description
A201 Request for examination
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20000627

Year of fee payment: 5

LAPS Lapse due to unpaid annual fee