KR960001994A - State Allocation Method for Stable Bus Arbitration Information - Google Patents
State Allocation Method for Stable Bus Arbitration Information Download PDFInfo
- Publication number
- KR960001994A KR960001994A KR1019940012743A KR19940012743A KR960001994A KR 960001994 A KR960001994 A KR 960001994A KR 1019940012743 A KR1019940012743 A KR 1019940012743A KR 19940012743 A KR19940012743 A KR 19940012743A KR 960001994 A KR960001994 A KR 960001994A
- Authority
- KR
- South Korea
- Prior art keywords
- state
- arbitration
- allocation method
- information
- bus arbitration
- Prior art date
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Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Bus Control (AREA)
Abstract
본 발명은 다중프로세서 컴퓨터시스템에서 프로세서간 인터럼트를 전송하는 기능을 다중프로세서 인터럽트 요청기에서 안정적인 버스중재 정보, 구동을 위한 상태할당 방법에 관한 것으로서, 프로세서간 인터럽트의 전송을 위하여 인터럽트, 버스의 사용권을 얻는 중재과정에서 인터럽트 버스중재 정보를 글리치(glitch)없이 안정적으로 구동하기 위하여 다섯 단계의 중재고정을 나타내는 각 상태 사이에서 천이가 일어 나는 전후 상태의 코드가 오직 한 비트만 다르게 상태를 할당하는 방법을 재공한다.The present invention relates to a method for allocating inter-processor intermittents in a multiprocessor computer system with stable bus arbitration information and a state allocation method for driving the multiprocessor interrupt requester. In the arbitration process, the code in the state before and after the transition between each state representing five stages of arbitration to reliably drive the interrupt bus mediation information without glitch allocates states only one bit differently. Provide for.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.
제1도는 본 발명에 있어서 다중프로세서 인터럽트 요청기의 연결도.1 is a connection diagram of a multiprocessor interrupt requester in accordance with the present invention.
제2도는 다중프로세서 인터럽트 요청기의 내부레지스터 구성도.2 is an internal register diagram of a multiprocessor interrupt requester.
제3도는 다중프로세서 인터럽트 요청기의 내부상태 천이의 개략도.3 is a schematic diagram of an internal state transition of a multiprocessor interrupt requester.
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019940012743A KR970002399B1 (en) | 1994-06-07 | 1994-06-07 | State assignment for stable drive of bus arbitration information |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019940012743A KR970002399B1 (en) | 1994-06-07 | 1994-06-07 | State assignment for stable drive of bus arbitration information |
Publications (2)
Publication Number | Publication Date |
---|---|
KR960001994A true KR960001994A (en) | 1996-01-26 |
KR970002399B1 KR970002399B1 (en) | 1997-03-05 |
Family
ID=19384794
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019940012743A KR970002399B1 (en) | 1994-06-07 | 1994-06-07 | State assignment for stable drive of bus arbitration information |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR970002399B1 (en) |
-
1994
- 1994-06-07 KR KR1019940012743A patent/KR970002399B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR970002399B1 (en) | 1997-03-05 |
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