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KR960001811A - Integrated circuit mounting method using anisotropic conductive adhesive - Google Patents

Integrated circuit mounting method using anisotropic conductive adhesive Download PDF

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Publication number
KR960001811A
KR960001811A KR1019940015223A KR19940015223A KR960001811A KR 960001811 A KR960001811 A KR 960001811A KR 1019940015223 A KR1019940015223 A KR 1019940015223A KR 19940015223 A KR19940015223 A KR 19940015223A KR 960001811 A KR960001811 A KR 960001811A
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KR
South Korea
Prior art keywords
conductive adhesive
anisotropic conductive
chip
glass substrate
pad pattern
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Application number
KR1019940015223A
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Korean (ko)
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KR0149721B1 (en
Inventor
김철수
홍성제
박수훈
한정인
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김정덕
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Priority to KR1019940015223A priority Critical patent/KR0149721B1/en
Publication of KR960001811A publication Critical patent/KR960001811A/en
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Publication of KR0149721B1 publication Critical patent/KR0149721B1/en

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13452—Conductors connecting driver circuitry and terminals of panels
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13458—Terminal pads
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
    • H05K3/323—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives by applying an anisotropic conductive adhesive layer over an array of pads
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2202/00—Materials and properties
    • G02F2202/22—Antistatic materials or arrangements

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Wire Bonding (AREA)
  • Liquid Crystal (AREA)

Abstract

본 발명은 액정 표시 소자 구동용 IC 칩을 액정 표시 소자 패널에 실장하는 방법에 관한 것으로, 상세하게는 패턴의 파인 피치(fine pitch)화에 따른 패턴간의 전기적 단락(short)을 방지하기 위해 이방성 도전 접착제(anisotropic conductive adhesive)를 사용하여 액정 표시 소자 구동용 IC 칩을 패널에 실장하는 방법에 관한 것이다. 즉, 본 발명에 따른 액정 표시 소자 구동용 IC 실장 방법은 금속 패드 패턴을 형성한 다음 절연막을 유리 기판 전면에 걸쳐 형성하고, 사진 식각법으로 금속 패트 패턴 만을 노출시켜 이방성 도전 접착제를 전면에 걸쳐 도포한 후, 액정표시소자 구동 IC 칩을 어라인하여 압착하고 자외선을 조사하여 상기 이방성 도전 접착제를 경화시킴으로써, 전자 부품의 경박 단소화에 따른 금속 패드의 세밀(fine)하에 의한 단락(short)을 방지할 수 있을 뿐만 아니라 전극 접속의 신뢰성을 한 층 높일 수 있는 효과가 있다. 또한 패턴 전극의 범프 재료를 Au에서 Au를 도금한 Ni로 사용하면 비용이 절감 효과를 가져올 수도 있다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of mounting an IC chip for driving a liquid crystal display element on a liquid crystal display element panel, and more particularly, to prevent electrical short between patterns due to fine pitch of a pattern. The present invention relates to a method of mounting an IC chip for driving a liquid crystal display element on a panel using an anisotropic conductive adhesive. In other words, in the method of mounting an IC for driving a liquid crystal display device according to the present invention, after forming a metal pad pattern, an insulating film is formed over the entire glass substrate, and only the metal pat pattern is exposed by photolithography to apply an anisotropic conductive adhesive over the entire surface. After that, the liquid crystal display driver IC chip is arrayed and pressed, and the ultraviolet rays are irradiated to cure the anisotropic conductive adhesive, thereby preventing shorting due to the fineness of the metal pad due to light and shortening of the electronic component. In addition to this, it is possible to further increase the reliability of the electrode connection. In addition, using the bump material of the pattern electrode from Au to Ni plated Au may reduce the cost.

Description

이방성 도전 접착제를 사용한 집적회로 실장 방법Integrated circuit mounting method using anisotropic conductive adhesive

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제7도는 자외선 조사에 의한 이방성 도전 접착제의 경화 공정의 수직 단면도이다.7 is a vertical cross-sectional view of the curing step of the anisotropic conductive adhesive by ultraviolet irradiation.

Claims (5)

유리 기판 상면에 패트 패턴을 형상하는 패드 패턴 형성 단계와, 상기 패드 패턴 형성 단계에서 패드 패턴이 형성된 상기 유리 기판상에 절연층을 형성하는 절연층 형성 단계와, 상기 절연층 형성 단계에서 형성된 상기 절연층을 선택적으로 식각하여 상기 패드 패턴을 노출시키는 패드 노출 단계와, 상기 패드 패턴 노출 단계에서 패드 패턴이 노출된 상기 유리 기판상에 이방성 도전 접착제를 도포시키는 이방성 도전 접착제 도포 단계와, 상기 이방성 도전 접착제 도포 단계에서 상기 유리 기판 상면에 도포된 이방성 도전 접착제 상면에 칩형 소자를 어라인하고 압착하여 접속하는 칩형 소자 접속 단계와, 상기 칩형 소자 접속 단계에서 어라인되어 압착된 칩형 소자를 견고하게 접속되도록 상기 이방성 도전 접착제에 유리 기판을 통하여 자외선을 조사하여 경화시키는 이방성 도전 접착제 경화 단계를 포함하는 것을 특징으로 하는 칩형 소자 실장 방법.A pad pattern forming step of forming a pat pattern on an upper surface of a glass substrate, an insulating layer forming step of forming an insulating layer on the glass substrate on which a pad pattern is formed in the pad pattern forming step, and the insulation formed in the insulating layer forming step Selectively exposing the pad pattern by selectively etching a layer, applying an anisotropic conductive adhesive on the glass substrate to which the pad pattern is exposed in the pad pattern exposing step, and applying the anisotropic conductive adhesive, In the coating step, the chip-like element connecting step of aligning and pressing and connecting the chip-like element to the upper surface of the anisotropic conductive adhesive applied to the upper surface of the glass substrate, and the chip-like element lined and compressed in the chip-type element connection step so as to firmly connect UV rays are directed through the glass substrate to the anisotropic conductive adhesive The chip-type element mounting method comprising the anisotropic conductive adhesive curing step of curing. 제1항에 있어서, 이방성 도전 접착제는 Au 또는 Ni이 도금된 플래스틱 입자들이 포함된 자외선 경화수지인 점에 특징이 있는 칩형 소자 실장 방법.The method of claim 1, wherein the anisotropic conductive adhesive is an ultraviolet curable resin containing Au or Ni plated plastic particles. 유리 기판 상면에 패드 패턴을 형성하는 패드 패턴 형성 단계와, 상기 패드 패턴 형성 단계에서 형성될 패드 패턴 상에 범프를 형성하는 범프 형성 단계와, 상기 범프 형성 단계에서 범프가 형성된 상기 유리 기판상에 절연층을 형성하는 절연층 형성 단계와, 상기 절연층 형성 단계에서 형성된 상기 절연층을 선택적으로 식각하여 상기 범프를 노출시키는 범프 노출 단계와, 상기 범프 노출 단계에서 범프가 노출된 상기 유리 기판상에 이방성 도전 접착제를 도포시키는 이방성 도전 접착제 도포 단계와, 상기 이방성 도전 접착제 도포 단계에서 상기 유리 기판 상면에 도포된 이방성 도전 접착제 상면에 칩형 소자를 어라인하고 압착하여 접속하는 칩형 소자 접속단계와, 상기 칩형 소자 접속 단계에서 어라인되어 압착된 칩형 소자를 견고하게 접속되도록 상기 이방성 도전 접착제에 유리 기판을 통하여 자외선을 조사하여 경화시키는 이방성 도전 접착제 경화 단계를 포함하는 것을 특징으로 하는 칩형 소자 실장 방법.A pad pattern forming step of forming a pad pattern on an upper surface of the glass substrate, a bump forming step of forming bumps on the pad pattern to be formed in the pad pattern forming step, and an insulation on the glass substrate on which the bumps are formed in the bump forming step An insulating layer forming step of forming a layer, a bump exposure step of selectively etching the insulating layer formed in the insulating layer forming step to expose the bumps, and anisotropy on the glass substrate to which the bumps are exposed in the bump exposure step An anisotropic conductive adhesive coating step of applying a conductive adhesive, a chip-type device connecting step of arranging a chip-like element on the upper surface of the anisotropic conductive adhesive applied to the glass substrate in the anisotropic conductive adhesive applying step, and pressing and connecting the chip-like element; Even if the chip-like element that is aligned and crimped in the connection step is firmly connected Chip device mounting method comprising the anisotropic conductive adhesive curing step of curing by irradiating UV light through the glass substrate with the anisotropic conductive adhesive. 제3항에 있어서, 이방성 도전 접착제는 Au 또는 Ni이 도금된 플래스틱 입자들이 포함된 자외선 경화수지인 점에 특징이 있는 칩형 소자 실장 방법.4. The method of claim 3, wherein the anisotropic conductive adhesive is an ultraviolet curable resin containing Au or Ni plated plastic particles. 제3항에 있어서, 상기 범프는 Au 또는 Au 가 도금된 Ni로 이루어진 것을 특징으로 하는 칩형 소자 실장 방법.4. The method of claim 3, wherein the bump is made of Au or Ni plated with Au. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940015223A 1994-06-29 1994-06-29 A method of setting printed circuit by using anisotropic conductive adhesive KR0149721B1 (en)

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KR1019940015223A KR0149721B1 (en) 1994-06-29 1994-06-29 A method of setting printed circuit by using anisotropic conductive adhesive

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Application Number Priority Date Filing Date Title
KR1019940015223A KR0149721B1 (en) 1994-06-29 1994-06-29 A method of setting printed circuit by using anisotropic conductive adhesive

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KR960001811A true KR960001811A (en) 1996-01-25
KR0149721B1 KR0149721B1 (en) 1998-10-15

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0997532A3 (en) * 1998-10-28 2002-10-02 Degussa AG Process for the fermentative production of L-amino acids
KR100485965B1 (en) * 1998-04-06 2005-05-03 세이코 엡슨 가부시키가이샤 IC chip, IC assembly, liquid crystal device, and electric apparatus
KR100476525B1 (en) * 1997-10-15 2005-08-29 삼성전자주식회사 Liquid Crystal Display Device Module with Tap Eye

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100943731B1 (en) * 2003-06-28 2010-02-23 엘지디스플레이 주식회사 Seaoji display device
KR101880053B1 (en) 2017-04-26 2018-07-20 (주)노피온 Method of manufacturing anisotropic conductive adhesive comprising gaper and method of mounting components using the gaper
KR101890700B1 (en) 2017-04-26 2018-08-23 (주)노피온 Method of mounting components
KR20210122359A (en) 2020-03-30 2021-10-12 삼성디스플레이 주식회사 Display device and manufacturing method for the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100476525B1 (en) * 1997-10-15 2005-08-29 삼성전자주식회사 Liquid Crystal Display Device Module with Tap Eye
KR100485965B1 (en) * 1998-04-06 2005-05-03 세이코 엡슨 가부시키가이샤 IC chip, IC assembly, liquid crystal device, and electric apparatus
EP0997532A3 (en) * 1998-10-28 2002-10-02 Degussa AG Process for the fermentative production of L-amino acids

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KR0149721B1 (en) 1998-10-15

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