KR950010567B1 - 반도체장치의 출력단회로 - Google Patents
반도체장치의 출력단회로 Download PDFInfo
- Publication number
- KR950010567B1 KR950010567B1 KR1019920020208A KR920020208A KR950010567B1 KR 950010567 B1 KR950010567 B1 KR 950010567B1 KR 1019920020208 A KR1019920020208 A KR 1019920020208A KR 920020208 A KR920020208 A KR 920020208A KR 950010567 B1 KR950010567 B1 KR 950010567B1
- Authority
- KR
- South Korea
- Prior art keywords
- output
- node
- level
- equalization
- logic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
- G11C7/1057—Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1048—Data bus control circuits, e.g. precharging, presetting, equalising
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
Landscapes
- Dram (AREA)
- Logic Circuits (AREA)
- Static Random-Access Memory (AREA)
- Electronic Switches (AREA)
Abstract
Description
Claims (5)
- 메모리셀의 데이타를 증폭하는 증폭기로부터의 제1 및 제 2 데이타가 전달되는 제1 및 제 2 노드와, 상기 제 1 노드와 제 2 노드의 사이에 연결되고 등화신호에 의해 동작되어 상기 제1 및 제 2 노드의 전위를 등화시키는 등화 트랜지스터와, 상기 제1 및 제 2 노드에 각각 연결되고 상기 등화 트린지스터에 의한 등화레벨이 한 입력으로 연결되며 버퍼인에이블신호를 타입력으로 연결하는 제1 및 제 2 출력버퍼를 가지는 반도체메모리 장치에 있어서, 칩인에이블신호와 상기 등화된 레벨의 제 1 노드 및 제 2 노드에 입력이 연결된 논리게이트수단과, 상기 등화된 레벨에 의해 제어되고 채널인 상기 제 1 노드 및 제 2 노드와 상기 논리게이트수단의 출력과의 사이에 형성되는 트랜지스터 수단으로 구성된 한쌍의 조절수단을 구비하여, 상기 등화레벨을 상기 제1 및 제 2 출력버퍼의 문턱전압에 대응하여 일정하게 출력함을 특징으로 하는 출력단회로.
- 제 1 항에 있어서, 상기 조절수단은, 상기 등화레벨을 상기 출력버퍼의 논리문턱전압과 같게함을 특징으로 하는 출력단회로.
- 제 1 항에 있어서, 상기 논리게이트수단은 그의 크기 및 피/엔접합비가 상기 출력버퍼와 같음을 특징으로 하는 출력단회로.
- 제 3 항에 있어서, 상기 논리게이트수단은, 전원전압레벨의 칩인에이블신호를 입력하는 낸드게이트 또는 앤드게이트로 구성함을 특징으로 하는 출력단회로.
- 제 3 항에 있어서, 상기 논리게이트수단은 접지전압레벨의 칩인에이블신호를 입력하는 노아게이트 또는 오아게이트로 구성함을 특징으로 하는 출력단회로.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019920020208A KR950010567B1 (ko) | 1992-10-30 | 1992-10-30 | 반도체장치의 출력단회로 |
| JP27143393A JP3805802B2 (ja) | 1992-10-30 | 1993-10-29 | 半導体メモリ装置のデータ出力回路 |
| US08/143,895 US5384736A (en) | 1992-10-30 | 1993-11-01 | Data output circuit of a semiconductor memory device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019920020208A KR950010567B1 (ko) | 1992-10-30 | 1992-10-30 | 반도체장치의 출력단회로 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR940010088A KR940010088A (ko) | 1994-05-24 |
| KR950010567B1 true KR950010567B1 (ko) | 1995-09-19 |
Family
ID=19342136
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019920020208A Expired - Fee Related KR950010567B1 (ko) | 1992-10-30 | 1992-10-30 | 반도체장치의 출력단회로 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US5384736A (ko) |
| JP (1) | JP3805802B2 (ko) |
| KR (1) | KR950010567B1 (ko) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07220478A (ja) * | 1994-01-26 | 1995-08-18 | Fujitsu Ltd | データ出力回路及び半導体記憶装置 |
| JPH087573A (ja) * | 1994-06-14 | 1996-01-12 | Mitsubishi Electric Corp | 半導体記憶装置と、そのデータの読出および書込方法 |
| KR100223747B1 (ko) * | 1995-12-28 | 1999-10-15 | 김영환 | 고속 저잡음 출력 버퍼 |
| JPH09190692A (ja) * | 1996-01-09 | 1997-07-22 | Mitsubishi Electric Corp | 半導体記憶装置 |
| KR100207497B1 (ko) * | 1996-08-30 | 1999-07-15 | 윤종용 | 반도체장치의 신호 발생회로 |
| JP3716080B2 (ja) * | 1997-08-28 | 2005-11-16 | エルピーダメモリ株式会社 | 半導体記憶装置の出力回路 |
| JP3350411B2 (ja) * | 1997-09-24 | 2002-11-25 | 沖電気工業株式会社 | 半導体記憶装置の出力回路 |
| US7289374B2 (en) * | 2004-07-01 | 2007-10-30 | Infineon Technologies Ag | Circuit and method for adjusting threshold drift over temperature in a CMOS receiver |
| US7751218B2 (en) * | 2006-07-14 | 2010-07-06 | International Business Machines Corporation | Self-referenced match-line sense amplifier for content addressable memories |
| US7724559B2 (en) * | 2006-07-14 | 2010-05-25 | International Business Machines Corporation | Self-referenced match-line sense amplifier for content addressable memories |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62273694A (ja) * | 1986-05-22 | 1987-11-27 | Sony Corp | センスアンプ |
| JPH04297119A (ja) * | 1990-09-28 | 1992-10-21 | Toshiba Corp | 半導体集積回路 |
-
1992
- 1992-10-30 KR KR1019920020208A patent/KR950010567B1/ko not_active Expired - Fee Related
-
1993
- 1993-10-29 JP JP27143393A patent/JP3805802B2/ja not_active Expired - Lifetime
- 1993-11-01 US US08/143,895 patent/US5384736A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JP3805802B2 (ja) | 2006-08-09 |
| US5384736A (en) | 1995-01-24 |
| JPH06208793A (ja) | 1994-07-26 |
| KR940010088A (ko) | 1994-05-24 |
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