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KR920018759A - 반도체 메모리장치에서의 워드라인 구동회로 - Google Patents

반도체 메모리장치에서의 워드라인 구동회로 Download PDF

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Publication number
KR920018759A
KR920018759A KR1019910004068A KR910004068A KR920018759A KR 920018759 A KR920018759 A KR 920018759A KR 1019910004068 A KR1019910004068 A KR 1019910004068A KR 910004068 A KR910004068 A KR 910004068A KR 920018759 A KR920018759 A KR 920018759A
Authority
KR
South Korea
Prior art keywords
voltage level
word line
voltage
memory cycle
level
Prior art date
Application number
KR1019910004068A
Other languages
English (en)
Other versions
KR940002859B1 (ko
Inventor
다까시 나까지마
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019910004068A priority Critical patent/KR940002859B1/ko
Priority to US07/850,840 priority patent/US5297104A/en
Priority to JP4054981A priority patent/JP2662335B2/ja
Publication of KR920018759A publication Critical patent/KR920018759A/ko
Application granted granted Critical
Publication of KR940002859B1 publication Critical patent/KR940002859B1/ko

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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408Address circuits
    • G11C11/4085Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/08Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

내용 없음

Description

반도체 메모리장치에서의 워드라인 구동회로
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3도는 본 발명에 따른 워드라인 구동회로이 일실시예,
제5도는 본 발명에 다른 워드라인 구동회로의 또다른 실시예.

Claims (5)

  1. 다수의 워드라인과, 각각의 라인에 접속된 다수의 메모리쎌들과, 상기 워드라인들과 접속되고 메모리 싸이클중 입력 어드레스 신호에 응답하여 워드라인을 선택하고 상기 워드라인을 제1전압레벨에서 제2전압 레벨로 구동하기 위한 행디코우더 및 구동회로와, 상기 워드라인에 접속되고 비메모리 싸이클에서 부전압을 공급하기 위한 부전압 발생회로를 가지는 고밀도 반도체 메모리 장치에 있어서, 메모리 싸이클의 개시 및 종료중 적어도 어느 하나에서 상기 선택된 워드라인을 상기 제1전압레벨과 제2전압레벨 사이의 중간 전압 레벨로 유지하는 리세스 회로를 가짐을 특징으로 하는 워드 라인 구동회로.
  2. 제1항에 있어서, 상기 제1전압 레벨과 상기 중간전압 레벨과의 차의 절대값은 상기 제2전압레벨과 상기 중간 레벨과의 차의 절대값보다 더 작음을 특징으로 하는 워드라인 구동회로.
  3. 제1항에 있어서, 상기 제1전압레벨은 음의 전압레벨이고 상기 제2전압 레벨은 양의 부우스트 전압이고, 상기 중간전압 레벨은 접지전압 또는 트랜지스터의 드레쉬 홀드 전압임을 특징으로 하는 워드라인 구동회로.
  4. 비 메모리 싸이클중 워드라인을 제1전압벨로 유지하고 메모리 싸이클중 상기 워드라인을 제2전압 레벨로 유지하는 반도체 메모리 장치의 워드라인 구동 방법에 있어서, 상기 메모리 싸이클의 개시 및 종료중 적어도 어느 하나에서 상기 워드라인을 상기 제1전압레벨과 제2전압레벨 사이의 중간 전압 레벨로 구동하는 워드라인 구동방법.
  5. 제4항에 있어서, 상기 제1전압 레벨은 음의 전압 레벨이고 상기 제2전압 레벨은 양의 전압이며, 상기 중간전압 레벨은 접지전압 또는 트랜지스터의 드레쉬 홀드 전압임을 특징으로 하는 워드라인 구동 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개되는 것임.
KR1019910004068A 1991-03-14 1991-03-14 반도체 메모리장치에서의 워드라인 구동회로 KR940002859B1 (ko)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1019910004068A KR940002859B1 (ko) 1991-03-14 1991-03-14 반도체 메모리장치에서의 워드라인 구동회로
US07/850,840 US5297104A (en) 1991-03-14 1992-03-13 Word line drive circuit of semiconductor memory device
JP4054981A JP2662335B2 (ja) 1991-03-14 1992-03-13 ワードライン駆動回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910004068A KR940002859B1 (ko) 1991-03-14 1991-03-14 반도체 메모리장치에서의 워드라인 구동회로

Publications (2)

Publication Number Publication Date
KR920018759A true KR920018759A (ko) 1992-10-22
KR940002859B1 KR940002859B1 (ko) 1994-04-04

Family

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Family Applications (1)

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KR1019910004068A KR940002859B1 (ko) 1991-03-14 1991-03-14 반도체 메모리장치에서의 워드라인 구동회로

Country Status (3)

Country Link
US (1) US5297104A (ko)
JP (1) JP2662335B2 (ko)
KR (1) KR940002859B1 (ko)

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Also Published As

Publication number Publication date
US5297104A (en) 1994-03-22
JPH0589673A (ja) 1993-04-09
KR940002859B1 (ko) 1994-04-04
JP2662335B2 (ja) 1997-10-08

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