KR920017461A - Message Record / Playback Circuit of Digital Still Video Camera and Its Method - Google Patents
Message Record / Playback Circuit of Digital Still Video Camera and Its Method Download PDFInfo
- Publication number
- KR920017461A KR920017461A KR1019910002396A KR910002396A KR920017461A KR 920017461 A KR920017461 A KR 920017461A KR 1019910002396 A KR1019910002396 A KR 1019910002396A KR 910002396 A KR910002396 A KR 910002396A KR 920017461 A KR920017461 A KR 920017461A
- Authority
- KR
- South Korea
- Prior art keywords
- data
- character
- image
- unit
- video camera
- Prior art date
Links
- 238000013500 data storage Methods 0.000 claims 6
- 239000000872 buffer Substances 0.000 claims 3
- 238000006243 chemical reaction Methods 0.000 claims 1
- 238000013144 data compression Methods 0.000 claims 1
- 238000003672 processing method Methods 0.000 claims 1
- 230000001360 synchronised effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/91—Television signal processing therefor
- H04N5/92—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback
- H04N5/9201—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback involving the multiplexing of an additional signal and the video signal
- H04N5/9206—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback involving the multiplexing of an additional signal and the video signal the additional signal being a character code signal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/1733—Controllable logic circuits
- H03K19/1737—Controllable logic circuits using multiplexers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/04—Synchronising
- H04N5/06—Generation of synchronising signals
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/91—Television signal processing therefor
- H04N5/93—Regeneration of the television signal or of selected parts thereof
- H04N5/9305—Regeneration of the television signal or of selected parts thereof involving the mixing of the reproduced video signal with a non-recorded signal, e.g. a text signal
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N2101/00—Still video cameras
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Theoretical Computer Science (AREA)
- Television Signal Processing For Recording (AREA)
Abstract
내용 없음No content
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제2도는 본 발명의 일실시예의 블럭도,2 is a block diagram of one embodiment of the present invention;
제3도는 본 발명의 다른 실시예의 블럭도,3 is a block diagram of another embodiment of the present invention;
제4도는 본 발명에 따른 메모리 카드의 구성도,4 is a configuration diagram of a memory card according to the present invention;
제5도는 본 발명의 재생기의 블럭도.5 is a block diagram of a regenerator of the present invention.
Claims (4)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019910002396A KR930012244B1 (en) | 1991-02-13 | 1991-02-13 | Message recording & regenerative method in video camera |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019910002396A KR930012244B1 (en) | 1991-02-13 | 1991-02-13 | Message recording & regenerative method in video camera |
Publications (2)
Publication Number | Publication Date |
---|---|
KR920017461A true KR920017461A (en) | 1992-09-26 |
KR930012244B1 KR930012244B1 (en) | 1993-12-24 |
Family
ID=19311078
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019910002396A KR930012244B1 (en) | 1991-02-13 | 1991-02-13 | Message recording & regenerative method in video camera |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR930012244B1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6016155A (en) * | 1995-04-28 | 2000-01-18 | Canon Kabushiki Kaisha | Character processing apparatus, character processing method, and memory |
-
1991
- 1991-02-13 KR KR1019910002396A patent/KR930012244B1/en not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6016155A (en) * | 1995-04-28 | 2000-01-18 | Canon Kabushiki Kaisha | Character processing apparatus, character processing method, and memory |
Also Published As
Publication number | Publication date |
---|---|
KR930012244B1 (en) | 1993-12-24 |
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