JP2602189B2 - Image display method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image display method for AD-converting a television video signal, recording it in a memory, reading it out, DA-converting it, and reproducing and displaying a still image on a monitor.

[0002]

2. Description of the Related Art Image processing apparatuses for temporarily recording a television video signal in an IC memory, reading the recorded content, displaying a still image, and processing the video signal are used in various fields. . In order to record the analog video signal in the memory, the analog video signal is once digitized by an AD converter, and the signal read from the memory is converted into an analog video signal by a DA converter and interlaced and displayed.

FIG. 4 is a block diagram of such an image processing apparatus. The input video signal is converted into a digital signal by the AD converter 12 in synchronization with the output clock of the sample clock generator 11. This digital signal is controlled by a signal of the address generator 13 and is recorded at a predetermined address of the frame memory 15.

[0004] A signal recorded in the frame memory 15 is designated by a predetermined address under the control of the address generator 13 and its contents are read. The read signal is converted into an analog video signal by the DA converter 18 in synchronization with the output clock of the display clock generator 17, and is output.

[0005] The video signal thus DA-converted is displayed on the screen. At the time of display, for example, in the case of the NTSC system, 525 scanning lines per frame have two scanning lines.
Fields are divided into 262.5 lines, and odd and even fields are interlaced.

[0006]

As described above, when performing field interlaced display, recording a moving television signal and displaying and reproducing the same as a still image, if a fast moving image is reproduced by frame reproduction, the inter-field The difference between the images may be large, and image blurring may occur, making it difficult to view.

The present invention provides a video display method capable of preventing such image blurring. Further, the video display method can be arbitrarily switched to display an appropriate image.

[0008]

SUMMARY OF THE INVENTION The present invention solves the above-mentioned problems by enabling frame reproduction, odd-field reproduction, and even-field reproduction to be arbitrarily selected.

That is, according to the present invention, the television
In a video display method of D-converting and recording in a memory, and converting a signal read from the memory into a DA and displaying a video,
The video signal of each field is A / D converted and sequentially recorded at a predetermined address of the memory, and the data of the head address generator for reproduction, in which the head address data of frame reproduction, odd field reproduction, and even field reproduction are written, is a field selection signal. When the moving image is displayed, the data is preset in the pixel counter, and the read address of the memory is controlled, and the interlaced display by the repetition of the odd field and the interlace display by the repetition of the even field are alternately performed. In addition, data of the last line of the odd field and the first line of the even field are not displayed.

Therefore, in the odd field reproduction and the even field reproduction, an address in which a signal of one of the fields is recorded is repeatedly selected by a field selection signal, and interlaced display is performed.

[0011]

In the case where a fast-moving image is displayed as a still image, even if odd-numbered field reproduction and even-numbered field reproduction are alternately and sequentially selected, and the respective data (signals) are repeatedly read out and displayed in an interlaced manner, the inter-line Is small, and the occurrence of screen shake can be prevented.

When odd field reproduction and even field reproduction are sequentially performed, data (signal) of the last line of the odd field and data (signal) of the first line of the even field are not read out and displayed on the screen. By doing so, it is also possible to prevent the screen from blurring at that portion.

[0013]

Embodiments of the present invention will be described below.

FIG. 1 shows a diagram for use in implementing the present invention.
FIG. 4 is a block diagram of a circuit for selecting frame reproduction, odd field reproduction, and even field reproduction. When writing video data to the video memory 5, the input video signal is AD-converted and recorded as it is in a time-series manner at a predetermined address.

When reading recorded data (signal), frame reproduction, odd field reproduction,
A head address generator 6 in which data for generating a head address for even field reproduction is written in the ROM.
Is selected by the output of the field address register 7.

Address data is preset in the pixel counter 8 by the output of the head address generator 6. The signals recorded at the addresses set in the pixel counter 8 are sequentially read out and output in synchronization with the sampling clock.
The operation of this circuit is not limited to the sampling clock,
Timing is set so as to synchronize with the horizontal synchronization signal and the vertical synchronization signal.

The odd field is composed of data of 1 line to 263 lines as shown in FIG. 2A (however, in the figure, the 263 line in which the latter half is cut is not given a code). When an odd field is selected, only the data of the odd field is repeatedly read.
Then, the data of the last line, that is, the data of the 263 line is erased, and the interlaced display is performed as shown in FIG.
The broken lines 1 'to 262' in FIG.
This is a repeated scanning portion of the data of the lines 262 to 262. The 1 'line of the same signal as the one line is formed between the one line and the two lines.

On the other hand, the even field shown in FIG. 2A is composed of data of 263 lines to 525 lines. When the even field is selected, only the data of the even field is repeatedly read. Then, the data of the first line, that is, the data of 263 lines is deleted, and only the data of 264 lines to 525 lines is used, and this is displayed in an interlaced manner as shown in FIG. That is, the solid line 264 ′ line to 525 in FIG.
The data of the 'line and the data of the dashed lines 264 to 525 are alternately scanned.

As a result, as shown in FIG. 3, the data (signal) of each field is sequentially recorded at the time of recording in the memory, but the data of the first field is repeated at the time of reading. It will be read and interlaced and displayed.

When a moving image is displayed by alternately performing interlaced display by repetition of odd fields and interlace display by repetition of even fields, the moving width of the image in the vertical direction at the time of switching from the odd field to the even field becomes large, and Blur is likely to occur. However, in the present invention, since the data of the last line of the data of the odd field and the data of the first line of the data of the even field are erased, the moving width of the image in the vertical direction when the field is switched becomes small, and the occurrence of blur is suppressed. .

[0021]

According to the present invention, it is possible to prevent image blurring when a moving image is displayed by alternately performing interlaced display by repeating odd fields and interlaced display by repeating even fields.

[Brief description of the drawings]

FIG. 1 is a block diagram of an address selection circuit used in the present invention.

FIG. 2 is an explanatory diagram of an interlaced display.

FIG. 3 is an explanatory diagram of write and read data.

FIG. 4 is a block diagram of an image display device.

[Explanation of symbols]

 5: Video memory 6: Start address generator 7: Field address register 8: Pixel counter

Claims (1)

(57) [Claims] 1. A video display method in which a TV video signal is A / D converted and recorded in a memory, and a signal read from the memory is D / A converted to display a video. , The data of the reproduction start address generator in which the start address data of frame reproduction, odd field reproduction, and even field reproduction are written is selected by the field selection signal, and the data is preset in the pixel counter. ,
It controls the address to be read of the memory, odd
Interlaced display by repeating several fields,
Interlaced display by repeating even fields
When alternately displaying a video,
Displays the data of the last line and the first line of the even field.
An image display method characterized by not showing .