KR900700962A - 패킷 스위치형 네트워크용 통신 프로세서 - Google Patents

패킷 스위치형 네트워크용 통신 프로세서

Info

Publication number: KR900700962A
Authority: KR; South Korea
Prior art keywords: bus; access; processing units; priority; cycle
Prior art date: 1988-04-01
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Granted

Application number

KR1019890702250A

Other languages

English (en)

Other versions

KR960016408B1 (en

Inventor

페리 마크리스

프레드릭 최

마아크 클리멕

제임스 맵

고오지 무네모또

제프 니콜

마아크 소더베르그

제임스 에이 무어

사무엘 제이 주니어 코스타

존 램세이

윌리암 스위프트

스코트 워커

웨스 보스로그

에릭 아마도르

Original Assignee

테레네트 커뮤니케이션즈 코오퍼레이션

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1988-04-01

Filing date

1989-12-01

Publication date

1990-08-17

1989-12-01 Application filed by 테레네트 커뮤니케이션즈 코오퍼레이션 filed Critical 테레네트 커뮤니케이션즈 코오퍼레이션

1990-08-17 Publication of KR900700962A publication Critical patent/KR900700962A/ko

1996-12-11 Application granted granted Critical

1996-12-11 Publication of KR960016408B1 publication Critical patent/KR960016408B1/ko

2009-12-01 Anticipated expiration legal-status Critical

Status Expired - Lifetime legal-status Critical Current

Classifications

- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
- G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems

Landscapes

Engineering & Computer Science (AREA)
Theoretical Computer Science (AREA)
Physics & Mathematics (AREA)
General Engineering & Computer Science (AREA)
General Physics & Mathematics (AREA)
Computer Networks & Wireless Communication (AREA)
Signal Processing (AREA)
Data Exchanges In Wide-Area Networks (AREA)
Multi Processors (AREA)
Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
Exchange Systems With Centralized Control (AREA)
Communication Control (AREA)

KR89702250A 1988-04-01 1989-12-01 Communication processor for a packet switched network Expired - Lifetime KR960016408B1 (en)

Applications Claiming Priority (2)

Application Number	Priority Date	Filing Date	Title
US07/176,654 US4979100A (en)	1988-04-01	1988-04-01	Communication processor for a packet-switched network
PCT/US1989/001237 WO1989009446A1 (en)	1988-04-01	1989-03-30	Communication processor for a packet-switched network

Publications (2)

Publication Number	Publication Date
KR900700962A true KR900700962A (ko)	1990-08-17
KR960016408B1 KR960016408B1 (en)	1996-12-11

Family

ID=22645278

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
KR89702250A Expired - Lifetime KR960016408B1 (en)	1988-04-01	1989-12-01	Communication processor for a packet switched network

Country Status (16)

Country	Link
US (1)	US4979100A (ko)
EP (1)	EP0367813B1 (ko)
KR (1)	KR960016408B1 (ko)
AT (1)	ATE149711T1 (ko)
AU (1)	AU625536B2 (ko)
CA (1)	CA1323918C (ko)
DE (1)	DE68927816T2 (ko)
DK (1)	DK173266B1 (ko)
ES (1)	ES2011546A6 (ko)
FI (1)	FI100834B (ko)
IL (1)	IL89753A (ko)
MX (1)	MX166362B (ko)
MY (1)	MY103859A (ko)
NO (1)	NO302729B1 (ko)
NZ (1)	NZ228549A (ko)
WO (1)	WO1989009446A1 (ko)

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JP3206006B2 (ja) *	1991-01-25	2001-09-04	株式会社日立製作所	二重化バス制御方法及び装置
US5276887A (en) *	1991-06-06	1994-01-04	Commodore Electronics Limited	Bus arbitration system for granting bus access to devices following two-wire bus arbitration protocol and devices following three-wire bus arbitration protocol
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US5708784A (en) *	1991-11-27	1998-01-13	Emc Corporation	Dual bus computer architecture utilizing distributed arbitrators and method of using same
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US5574869A (en) *	1992-03-30	1996-11-12	Intel Corporation	Bus bridge circuit having configuration space enable register for controlling transition between various modes by writing the bridge identifier into CSE register
US5301283A (en) *	1992-04-16	1994-04-05	Digital Equipment Corporation	Dynamic arbitration for system bus control in multiprocessor data processing system
AU4454993A (en) *	1992-08-10	1994-02-17	Lucent Technologies Inc.	A radio communication system and a radio base station for use in such a system
US5517624A (en) *	1992-10-02	1996-05-14	Compaq Computer Corporation	Multiplexed communication protocol between central and distributed peripherals in multiprocessor computer systems
US6311286B1 (en) *	1993-04-30	2001-10-30	Nec Corporation	Symmetric multiprocessing system with unified environment and distributed system functions
CA2115731C (en) *	1993-05-17	2000-01-25	Mikiel Loyal Larson	Dynamically programmable bus arbiter with provisions for historical feedback and error detection and correction
US5613067A (en) *	1993-12-30	1997-03-18	International Business Machines Corporation	Method and apparatus for assuring that multiple messages in a multi-node network are assured fair access to an outgoing data stream
US5561669A (en) *	1994-10-26	1996-10-01	Cisco Systems, Inc.	Computer network switching system with expandable number of ports
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US5717932A (en) *	1994-11-04	1998-02-10	Texas Instruments Incorporated	Data transfer interrupt pacing
US5948067A (en) *	1995-07-19	1999-09-07	Fujitsu Network Communications, Inc.	Converting between an internal cell and multiple standard asynchronous transfer mode cells
AU6970896A (en) *	1995-09-14	1997-04-01	Ascom Nexion Inc.	Transmitter controlled flow control for buffer allocation in wide area atm networks
JP2000517488A (ja) *	1996-01-16	2000-12-26	フジツウネットワークコミュニケーションズ，インコーポレイテッド	Ａｔｍ網用の信頼性と柔軟性のあるマルチキャスト機構
US5748905A (en) *	1996-08-30	1998-05-05	Fujitsu Network Communications, Inc.	Frame classification using classification keys
US6473404B1 (en)	1998-11-24	2002-10-29	Connect One, Inc.	Multi-protocol telecommunications routing optimization
US6016307A (en) *	1996-10-31	2000-01-18	Connect One, Inc.	Multi-protocol telecommunications routing optimization
US6012117A (en) *	1997-03-14	2000-01-04	Intel Corporation	Methods and apparatus for arbitrating and controlling arbitration for access to a serial bus
KR100251712B1 (ko) *	1997-07-11	2000-04-15	윤종용	전전자교환기에서 엑스.25 프로토콜 통신을 위한 엑스.25망정합장치
US6006303A (en) *	1997-08-28	1999-12-21	Oki Electric Industry Co., Inc.	Priority encoding and decoding for memory architecture
US6105095A (en) *	1998-02-23	2000-08-15	Motorola, Inc.	Data packet routing scheduler and method for routing data packets on a common bus
US6567403B1 (en) *	1998-04-30	2003-05-20	Hewlett-Packard Development Company, L.P.	Virtual-chassis switch network topology
US6816934B2 (en) *	2000-12-22	2004-11-09	Hewlett-Packard Development Company, L.P.	Computer system with registered peripheral component interconnect device for processing extended commands and attributes according to a registered peripheral component interconnect protocol
US6266731B1 (en)	1998-09-03	2001-07-24	Compaq Computer Corporation	High speed peripheral interconnect apparatus, method and system
US6493779B1 (en) *	1998-12-21	2002-12-10	International Business Machines Corporation	Method and system for interrupt handling using device pipelined packet transfers
GB2350268B (en)	1999-05-19	2003-07-16	3Com Corp	Inhibition of underrun in network switches and the like for packet-based communication systems
GB9919208D0 (en) *	1999-08-13	1999-10-20	Sgs Thomson Microelectronics	An arbiter and a method of arbitrating
US6944190B1 (en) *	2000-09-14	2005-09-13	Ciena Corporation	Methods and apparatuses for serial transfer of SONET framed data between components of a SONET system
US7688863B2 (en) *	2001-10-19	2010-03-30	Renesas Technology America, Inc.	Methods and apparatus for sharing network bandwidth
US20030220705A1 (en) *	2002-05-24	2003-11-27	Ibey Jarry A.	Audio distribution system with remote control
JP2004126646A (ja) *	2002-09-30	2004-04-22	Canon Inc	バス制御方法
US7444668B2 (en) *	2003-05-29	2008-10-28	Freescale Semiconductor, Inc.	Method and apparatus for determining access permission
US7240144B2 (en) *	2004-04-02	2007-07-03	Arm Limited	Arbitration of data transfer requests
US7366810B2 (en) *	2005-11-16	2008-04-29	Via Technologies, Inc.	Method and system for multi-processor arbitration
KR101453581B1 (ko) *	2007-02-02	2014-10-22	사이마스트, 인크.	통합된 고속 패킷 스위칭 방식 직렬 인터페이스를 갖는 프로세서 칩 아키텍처
KR100929233B1 (ko) *	2007-12-11	2009-12-01	한국전자통신연구원	패킷 전달 방법 및 그 장치
US9658975B2 (en)	2012-07-31	2017-05-23	Silicon Laboratories Inc.	Data transfer manager
CN111030937A (zh) *	2019-12-16	2020-04-17	迈普通信技术股份有限公司	一种报文的转发方法、装置及存储介质

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1988
- 1988-04-01 US US07/176,654 patent/US4979100A/en not_active Expired - Lifetime
1989
- 1989-03-27 IL IL89753A patent/IL89753A/xx not_active IP Right Cessation
- 1989-03-28 CA CA000594899A patent/CA1323918C/en not_active Expired - Fee Related
- 1989-03-30 MY MYPI89000403A patent/MY103859A/en unknown
- 1989-03-30 DE DE68927816T patent/DE68927816T2/de not_active Expired - Fee Related
- 1989-03-30 NZ NZ228549A patent/NZ228549A/xx unknown
- 1989-03-30 EP EP89904964A patent/EP0367813B1/en not_active Expired - Lifetime
- 1989-03-30 AU AU34480/89A patent/AU625536B2/en not_active Ceased
- 1989-03-30 WO PCT/US1989/001237 patent/WO1989009446A1/en active IP Right Grant
- 1989-03-30 AT AT89904964T patent/ATE149711T1/de not_active IP Right Cessation
- 1989-03-31 MX MX015482A patent/MX166362B/es unknown
- 1989-03-31 ES ES8901148A patent/ES2011546A6/es not_active Expired - Fee Related
- 1989-11-30 FI FI895740A patent/FI100834B/fi not_active IP Right Cessation
- 1989-11-30 NO NO894791A patent/NO302729B1/no not_active IP Right Cessation
- 1989-11-30 DK DK198906052A patent/DK173266B1/da not_active IP Right Cessation
- 1989-12-01 KR KR89702250A patent/KR960016408B1/ko not_active Expired - Lifetime

Also Published As

Publication number	Publication date
FI895740A0 (fi)	1989-11-30
CA1323918C (en)	1993-11-02
DK605289A (da)	1990-01-29
EP0367813A1 (en)	1990-05-16
ATE149711T1 (de)	1997-03-15
AU625536B2 (en)	1992-07-16
NO302729B1 (no)	1998-04-14
DK605289D0 (da)	1989-11-30
DE68927816T2 (de)	1997-09-25
DE68927816D1 (de)	1997-04-10
NO894791L (no)	1990-01-29
EP0367813A4 (en)	1993-02-24
FI100834B (fi)	1998-02-27
IL89753A (en)	1993-04-04
EP0367813B1 (en)	1997-03-05
AU3448089A (en)	1989-10-16
KR960016408B1 (en)	1996-12-11
MX166362B (es)	1993-01-05
IL89753A0 (en)	1989-09-28
NZ228549A (en)	1991-11-26
NO894791D0 (no)	1989-11-30
WO1989009446A1 (en)	1989-10-05
MY103859A (en)	1993-09-30
US4979100A (en)	1990-12-18
DK173266B1 (da)	2000-05-29
ES2011546A6 (es)	1990-01-16

Publication	Publication Date	Title
KR900700962A (ko)	1990-08-17	패킷 스위치형 네트워크용 통신 프로세서
Vranesic et al.	1991	Hector-a hierarchically structured shared memory multiprocessor
CA2355065A1 (en)	2000-06-22	Computer system and method for operating multiple operating systems in different partitions of the computer system and for allowing the different partitions to communicate with one another through shared memory
EP0347763A3 (en)	1990-08-08	Dual rotating priority arbitration method for a multiprocessor memory bus
EP0472879A2 (en)	1992-03-04	Method and apparatus for dynamic detection and routing of non-uniform traffic in parallel buffered multistage interconnection networks
FI953204A7 (fi)	1995-08-28	Datamuistin jakaminen moniprosessorijärjestelmissä
ATE81220T1 (de)	1992-10-15	Rechnersystem mit multikanaldirektspeicherzugriffsarbitrierung.
CA2245633A1 (en)	1999-03-18	Method and system for simultaneous variable-width bus access in a multiprocessor system
EP0327203B1 (en)	1995-10-04	NxM arbitrating non-blocking high bandwidth switch
GB1520485A (en)	1978-08-09	Data processing system
TW336296B (en)	1998-07-11	Circuit for handling distributed arbitration in a computer system having multiple arbiters
GB2107906A (en)	1983-05-05	Multi-processor office system complex
CA2019300A1 (en)	1990-12-22	Multiprocessor system with shared memory
RU97114997A (ru)	1999-07-10	Многопроцессорная система обработки данных
JPS63276155A (ja)	1988-11-14	バス多重制御方式
JPS63236153A (ja)	1988-10-03	記憶装置
JPS59218532A (ja)	1984-12-08	バス接続方式
JPH0442342A (ja)	1992-02-12	バス調停回路
ATE75865T1 (de)	1992-05-15	Rechnersystem mit kanaldirektspeicherzugriffsarbitrierung.
JPS6459558A (en)	1989-03-07	Data processing system
JPS647246A (en)	1989-01-11	Control system for common memory
JPS55140937A (en)	1980-11-04	Data processing system
JPH03125252A (ja)	1991-05-28	データ処理システム
KR950001977U (ko)	1995-01-04	다중 씨피유 시스템의 메모리 액세스 중재 회로
KR950012752U (ko)	1995-05-17	공유 메모리 방식 시스템에서의 비동기식 버스 중재 회로

Legal Events

Date	Code	Title	Description
1989-12-01	PA0105	International application	St.27 status event code: A-0-1-A10-A15-nap-PA0105
1989-12-01	R17-X000	Change to representative recorded	St.27 status event code: A-3-3-R10-R17-oth-X000
1990-08-17	PG1501	Laying open of application	St.27 status event code: A-1-1-Q10-Q12-nap-PG1501
1994-03-12	A201	Request for examination
1994-03-12	P11-X000	Amendment of application requested	St.27 status event code: A-2-2-P10-P11-nap-X000
1994-03-12	P13-X000	Application amended	St.27 status event code: A-2-2-P10-P13-nap-X000
1994-03-12	PA0201	Request for examination	St.27 status event code: A-1-2-D10-D11-exm-PA0201
1996-11-19	G160	Decision to publish patent application
1996-12-11	PG1605	Publication of application before grant of patent	St.27 status event code: A-2-2-Q10-Q13-nap-PG1605
1997-02-27	E701	Decision to grant or registration of patent right
1997-02-27	PE0701	Decision of registration	St.27 status event code: A-1-2-D10-D22-exm-PE0701
1997-05-23	GRNT	Written decision to grant
1997-05-23	PR0701	Registration of establishment	St.27 status event code: A-2-4-F10-F11-exm-PR0701
1997-05-23	PR1002	Payment of registration fee	St.27 status event code: A-2-2-U10-U12-oth-PR1002 Fee payment year number: 1
1999-11-25	PR1001	Payment of annual fee	St.27 status event code: A-4-4-U10-U11-oth-PR1001 Fee payment year number: 4
2000-10-10	PR1001	Payment of annual fee	St.27 status event code: A-4-4-U10-U11-oth-PR1001 Fee payment year number: 5
2001-10-29	PR1001	Payment of annual fee	St.27 status event code: A-4-4-U10-U11-oth-PR1001 Fee payment year number: 6
2002-10-31	PR1001	Payment of annual fee	St.27 status event code: A-4-4-U10-U11-oth-PR1001 Fee payment year number: 7
2003-11-05	FPAY	Annual fee payment	Payment date: 20031106 Year of fee payment: 8
2003-11-06	PR1001	Payment of annual fee	St.27 status event code: A-4-4-U10-U11-oth-PR1001 Fee payment year number: 8
2004-12-12	LAPS	Lapse due to unpaid annual fee
2004-12-12	PC1903	Unpaid annual fee	St.27 status event code: A-4-4-U10-U13-oth-PC1903 Not in force date: 20041212 Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE
2005-11-10	PC1903	Unpaid annual fee	St.27 status event code: N-4-6-H10-H13-oth-PC1903 Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE Not in force date: 20041212