KR900019186A - 기판에 설치된 복수개의 lsi 회로칩을 포함하는 lsi시스템 - Google Patents
기판에 설치된 복수개의 lsi 회로칩을 포함하는 lsi시스템 Download PDFInfo
- Publication number
- KR900019186A KR900019186A KR1019890006733A KR890006733A KR900019186A KR 900019186 A KR900019186 A KR 900019186A KR 1019890006733 A KR1019890006733 A KR 1019890006733A KR 890006733 A KR890006733 A KR 890006733A KR 900019186 A KR900019186 A KR 900019186A
- Authority
- KR
- South Korea
- Prior art keywords
- pin
- reference voltage
- scanout
- lsi
- pss
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 claims 2
- 230000007547 defect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
- 238000010276 construction Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/2818—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP] using test structures on, or modifications of, the card under test, made for the purpose of testing, e.g. additional components or connectors
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/316—Testing of analog circuits
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Tests Of Electronic Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
Claims (2)
- 다층인쇄기판(300) 및 상기 다층인쇄회로기판에 설치되며, 각각이 복수개의 핀(E, 520), 기준전압단자(F), 핀스캔아웃단자(G)와, 상기 핀들에 일대일로 대응하고, 대응하는 핀에 나타나는 핀전압(VLP)을, 기준전압단자에 나타나는 기준전압(VRER)과 비교하고, 핀선택번호(PSS, PSS1,PSS2)에 응답하여 상기 비교의 결과를 나타내는 신호를 출력시키는 복수개의 핀스캔아웃 회로들을 포함하며, 각 핀스캔아웃회로로 부터의 상기 회로출력이, 대응하는 LSI회로칩의 선택상태에서, 상기 핀스캔아웃단자로 보내지는 복수개의 LSI회로칩(100에서103까지)으로 구성되며, 상기 다층인쇄회로기판은 그물망 또는 얇은 판의 형태로 그안에 형성된 기준전압 피딩층(310)을포함하고, 상기 복수개의 LSI회로칩의 각 기준전압단자는 대응하는 관통구멍을 통하여 상기 기준전압 피딩층에 전기적으로 연결되는 것을 특징으로 하는 LSI시스템
- 제1항에 있어서, 상기 복수개의 핀스캔아웃회로(130i)의 각각은 상기 핀전압과 상기 기준전압에 응답하는 비교기(131)를 포함하며, 상기 복수개의 핀스캔아웃회로의 각 비교기는 반도체칩(510)에 배열된 에미터결함 로직게이트셀(530)의 특정한 부분에 의해 구성되고, 상기 특정한 부분은 상기 복수개의 핀(520,E)의 근방에서 선택되는 것을 특징으로 하는 LSI시스템※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63123405A JPH0746130B2 (ja) | 1988-05-19 | 1988-05-19 | Lsiシステム |
JP63-123405 | 1988-05-19 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR900019186A true KR900019186A (ko) | 1990-12-24 |
KR920004536B1 KR920004536B1 (en) | 1992-06-08 |
Family
ID=14859743
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR8906733A KR920004536B1 (en) | 1988-05-19 | 1989-05-19 | Lsi system including a plurality of lsi circuit chips mounted on a board |
Country Status (7)
Country | Link |
---|---|
US (1) | US4949033A (ko) |
EP (1) | EP0343828B1 (ko) |
JP (1) | JPH0746130B2 (ko) |
KR (1) | KR920004536B1 (ko) |
AU (1) | AU596767B2 (ko) |
CA (1) | CA1301950C (ko) |
DE (1) | DE68911374T2 (ko) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0394183A (ja) * | 1989-05-19 | 1991-04-18 | Fujitsu Ltd | 半導体集積回路の試験方法及び回路 |
JP2760157B2 (ja) * | 1991-01-23 | 1998-05-28 | 日本電気株式会社 | Lsiテスト方法 |
WO1992019052A1 (en) * | 1991-04-19 | 1992-10-29 | Vlsi Technology, Inc. | Mappable test structure for gate array circuit and method for testing the same |
JPH05307619A (ja) * | 1991-05-16 | 1993-11-19 | Nec Corp | マイクロプロセッサのac特性測定方法 |
JP2936807B2 (ja) * | 1991-07-12 | 1999-08-23 | 日本電気株式会社 | 集積回路 |
TWI269223B (en) * | 2005-04-25 | 2006-12-21 | Via Tech Inc | Method and related apparatus for calibrating signal driving parameters between chips |
JP6003129B2 (ja) * | 2012-03-19 | 2016-10-05 | 富士通株式会社 | 描画装置、描画方法および描画プログラム |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3833853A (en) * | 1973-04-13 | 1974-09-03 | Honeywell Inf Systems | Method and apparatus for testing printed wiring boards having integrated circuits |
DE2437673C3 (de) * | 1974-08-05 | 1978-04-27 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Vorrichtung zum Prüfen von Innenlagen mehrlagiger Leiterplatten |
JPS53125771A (en) * | 1977-04-08 | 1978-11-02 | Toshiba Corp | Measuring unit for semiconductor |
US4443278A (en) * | 1981-05-26 | 1984-04-17 | International Business Machines Corporation | Inspection of multilayer ceramic circuit modules by electrical inspection of green specimens |
GB2104669A (en) * | 1981-08-06 | 1983-03-09 | Int Computers Ltd | Apparatus for testing electronic devices |
FR2557701B1 (fr) * | 1983-12-28 | 1986-04-11 | Crouzet Sa | Dispositif de controle de continuite des circuits imprimes |
JPS6173075A (ja) * | 1984-09-19 | 1986-04-15 | Hitachi Ltd | Lsi論理状態抽出方式 |
US4748403A (en) * | 1986-02-05 | 1988-05-31 | Hewlett-Packard Company | Apparatus for measuring circuit element characteristics with VHF signal |
JPS63133072A (ja) * | 1986-11-26 | 1988-06-04 | Fujitsu Ltd | Lsiシステムテスト方式 |
-
1988
- 1988-05-19 JP JP63123405A patent/JPH0746130B2/ja not_active Expired - Lifetime
-
1989
- 1989-05-15 CA CA000600317A patent/CA1301950C/en not_active Expired - Lifetime
- 1989-05-16 EP EP89304922A patent/EP0343828B1/en not_active Expired - Lifetime
- 1989-05-16 DE DE89304922T patent/DE68911374T2/de not_active Expired - Fee Related
- 1989-05-17 AU AU34862/89A patent/AU596767B2/en not_active Ceased
- 1989-05-19 KR KR8906733A patent/KR920004536B1/ko not_active IP Right Cessation
- 1989-05-19 US US07/354,364 patent/US4949033A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP0343828A1 (en) | 1989-11-29 |
KR920004536B1 (en) | 1992-06-08 |
EP0343828B1 (en) | 1993-12-15 |
JPH0746130B2 (ja) | 1995-05-17 |
US4949033A (en) | 1990-08-14 |
AU3486289A (en) | 1989-11-23 |
AU596767B2 (en) | 1990-05-10 |
JPH01292272A (ja) | 1989-11-24 |
CA1301950C (en) | 1992-05-26 |
DE68911374T2 (de) | 1994-04-14 |
DE68911374D1 (de) | 1994-01-27 |
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