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KR900017182A - 복합형 반도체소자 - Google Patents

복합형 반도체소자 Download PDF

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Publication number
KR900017182A
KR900017182A KR1019900004894A KR900004894A KR900017182A KR 900017182 A KR900017182 A KR 900017182A KR 1019900004894 A KR1019900004894 A KR 1019900004894A KR 900004894 A KR900004894 A KR 900004894A KR 900017182 A KR900017182 A KR 900017182A
Authority
KR
South Korea
Prior art keywords
layer
semiconductor substrate
vapor phase
semiconductor device
device region
Prior art date
Application number
KR1019900004894A
Other languages
English (en)
Inventor
가즈오 기하라
미노루 다구치
Original Assignee
아오이 죠이치
가부시키가이샤 도시바
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 아오이 죠이치, 가부시키가이샤 도시바 filed Critical 아오이 죠이치
Publication of KR900017182A publication Critical patent/KR900017182A/ko

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0107—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
    • H10D84/0109—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs the at least one component covered by H10D12/00 or H10D30/00 being a MOS device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/763—Polycrystalline semiconductor regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/40—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
    • H10D84/401—Combinations of FETs or IGBTs with BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/891—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D44/00, e.g. integration of charge-coupled devices [CCD] or charge injection devices [CID

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)

Abstract

내용 없음

Description

복합형 반도체소자
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 따른 복합형 반도체 소자의 요부(要部)단면도,
제2(A 내지 G)는 본 발명에 따른 복합형 반도체 소자의 제조공정을 나타낸 단면도.

Claims (1)

  1. 특정 도전헝의 반도체 기판(5)과, 이 반도체 기판(5)의 표면부근에 형성되는 반대도전형의 매립영역(6), 여기에 적층하여 형성되는 반대도전형의 기상성장층(7)이 기상성장층(7)으로 부터 반도체기판(5)에 걸쳐 설치되는 복수의 트렌치흠(11),이 트렌치흠(11)에 채워지는 다결정층(14), 이 다결정층(14) 및 구분된 기상성장층(7) 사이를 전기적으로 분리하는 절연층(12), 구분된 기상성장층(7)에 형성되는 전하결합소자영역(3), 바이폴라소자영역(4) 및 Mos 소자영역(1, 2)을 구비하여 이루어진 것을 특징으로 하는 복합형 반도체 소자.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019900004894A 1989-04-10 1990-04-10 복합형 반도체소자 KR900017182A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP1-90218 1989-04-10
JP1090218A JPH02268463A (ja) 1989-04-10 1989-04-10 複合型半導体素子

Publications (1)

Publication Number Publication Date
KR900017182A true KR900017182A (ko) 1990-11-15

Family

ID=13992347

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900004894A KR900017182A (ko) 1989-04-10 1990-04-10 복합형 반도체소자

Country Status (3)

Country Link
EP (1) EP0392468A3 (ko)
JP (1) JPH02268463A (ko)
KR (1) KR900017182A (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100380273B1 (ko) * 2001-04-24 2003-04-18 주식회사 하이닉스반도체 복합 반도체 소자의 제조방법

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2344689A (en) 1998-12-07 2000-06-14 Ericsson Telefon Ab L M Analogue switch
ES2179781B1 (es) 2001-06-12 2003-11-16 Kao Corp Sa Aditivos que previenen el apelmazamiento y la humectacion de los fertilizantes nitrogenados.

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US31260A (en) * 1861-01-29 Clothes-bbiee
US4536945A (en) * 1983-11-02 1985-08-27 National Semiconductor Corporation Process for producing CMOS structures with Schottky bipolar transistors
JPS62277745A (ja) * 1986-05-27 1987-12-02 Toshiba Corp 半導体集積回路
JPS63314844A (ja) * 1987-06-18 1988-12-22 Toshiba Corp 半導体装置の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100380273B1 (ko) * 2001-04-24 2003-04-18 주식회사 하이닉스반도체 복합 반도체 소자의 제조방법

Also Published As

Publication number Publication date
JPH02268463A (ja) 1990-11-02
EP0392468A2 (en) 1990-10-17
EP0392468A3 (en) 1992-07-08

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PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 19900410

PA0201 Request for examination

Patent event code: PA02012R01D

Patent event date: 19900410

Comment text: Request for Examination of Application

PG1501 Laying open of application
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Comment text: Notification of reason for refusal

Patent event date: 19930331

Patent event code: PE09021S01D

PC1902 Submission of document of abandonment before decision of registration
SUBM Surrender of laid-open application requested