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KR900012422A - Mos 테크놀러지로 집적된 트랜지스터 회로 - Google Patents

Mos 테크놀러지로 집적된 트랜지스터 회로 Download PDF

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Publication number
KR900012422A
KR900012422A KR1019900000700A KR900000700A KR900012422A KR 900012422 A KR900012422 A KR 900012422A KR 1019900000700 A KR1019900000700 A KR 1019900000700A KR 900000700 A KR900000700 A KR 900000700A KR 900012422 A KR900012422 A KR 900012422A
Authority
KR
South Korea
Prior art keywords
transistor
main
coupled
electrode
control electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
KR1019900000700A
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English (en)
Other versions
KR0136371B1 (ko
Inventor
요한네스 유리아나 보우데비옌 아르놀두스
Original Assignee
프레데릭 얀 스미트
엔.브이.필립스 글로아이람펜파브리켄
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Filing date
Publication date
Application filed by 프레데릭 얀 스미트, 엔.브이.필립스 글로아이람펜파브리켄 filed Critical 프레데릭 얀 스미트
Publication of KR900012422A publication Critical patent/KR900012422A/ko
Application granted granted Critical
Publication of KR0136371B1 publication Critical patent/KR0136371B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00—Networks using active elements
    • H03H11/46—One-port networks
    • H03H11/48—One-port networks simulating reactances
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00—Networks using active elements
    • H03H11/46—One-port networks

Landscapes

  • Networks Using Active Elements (AREA)
  • Control Of Amplification And Gain Control (AREA)

Abstract

내용 없음

Description

MOS 테크놀러지로 집적된 트랜지스터 회로
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 따른 가변 가능한 MOS 저항기의 실시예의 회로도.

Claims (1)

  1. 제1 및 제2단자간에 가변 가능한 저항기를 형성하도록 구성되고 제1 및 제2 메인 전극간에 메인 전류 통로와 제어 전극을 각각 갖는 제1 및 제2트랜지스터와, 상기 제1및 제2단자에 각기 결합되어진 제1트랜지스터의 제1 및 제2메인 전극 및, 상기 제1및 제2 단자에 각기 결합되어진 제2 트랜지스터의 제1 및 제2 메인 전극과, 제1 및 제2 메인 전극간에 메인 전류 통로와 제어 전극을 각각 갖는 제3 및 제4 트랜지스터 및 상기 제3 및 제4트랜지스터의메인 전류 통로에 각기 결합된 제어 가능한 제1 및 제2 전류원을 포함하는 MOS-테크놀러지로 집적된 트랜지스터 회로에 있어서, 제3 트랜지스터의 제어 전극이 상기 제3 트랜지스터의 제2 메인 전극과 제1 트랜지스터의 제어 전극에 결합되며, 제4 트랜지스터의 제어 전극이 상기 상기 제4 트랜지스터의 제2메인 전극과 제2트랜지스터의 제어 전극에 결합되며, 제1 트랜지스터의 제1 메인 전극이 상기 제3 트랜지스터의 제1 메인 전극에 결합되고, 제2트랜지스터의 제1 메인 전극이 상기 제4 트랜지스터의 제1 메인 전극에 결합되는 것을 특징으로 하는 MOS 테크놀러지로 집적된 트랜지스터로 회로.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019900000700A 1989-01-25 1990-01-22 모스(mos) 기술의 집적화 트랜지스터회로 Expired - Fee Related KR0136371B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL8900175 1989-01-25
NL8900175 1989-01-25

Publications (2)

Publication Number Publication Date
KR900012422A true KR900012422A (ko) 1990-08-04
KR0136371B1 KR0136371B1 (ko) 1998-05-15

Family

ID=19854015

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900000700A Expired - Fee Related KR0136371B1 (ko) 1989-01-25 1990-01-22 모스(mos) 기술의 집적화 트랜지스터회로

Country Status (5)

Country Link
US (1) US4972098A (ko)
EP (1) EP0384501B1 (ko)
JP (1) JP2972814B2 (ko)
KR (1) KR0136371B1 (ko)
DE (1) DE69001185T2 (ko)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5187396A (en) * 1991-05-22 1993-02-16 Benchmarq Microelectronics, Inc. Differential comparator powered from signal input terminals for use in power switching applications
GB2270220A (en) * 1992-07-08 1994-03-02 Polytechnic South West Linearised floating MOS resistance
DE69514168T2 (de) * 1994-03-07 2000-08-31 Koninklijke Philips Electronics N.V., Eindhoven Einstellbare widerstandsvorrichtung mit regelschaltung
KR100442858B1 (ko) * 1997-11-18 2004-09-18 삼성전자주식회사 테스트 회로의 자동 저항 변환 장치 및 방법
US7012487B2 (en) * 2001-04-18 2006-03-14 Broadcom Corporation Transconductance device employing native MOS transistors
US6812735B1 (en) * 2003-03-26 2004-11-02 Silicon Bridge, Inc. Multiple value self-calibrated termination resistors
WO2009151406A1 (en) * 2008-06-11 2009-12-17 National University Of Singapore Cmos amplifier with integrated tunable band-pass function

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3636530A (en) * 1969-09-10 1972-01-18 Litton Systems Inc Nonvolatile direct storage bistable circuit
US4110639A (en) * 1976-12-09 1978-08-29 Texas Instruments Incorporated Address buffer circuit for high speed semiconductor memory
US4170741A (en) * 1978-03-13 1979-10-09 Westinghouse Electric Corp. High speed CMOS sense circuit for semiconductor memories
US4224686A (en) * 1978-10-02 1980-09-23 Ncr Corporation Electrically alterable memory cell
US4348745A (en) * 1980-10-27 1982-09-07 Hughes Aircraft Company Non-volatile random access memory having non-inverted storage
US4460978A (en) * 1981-11-19 1984-07-17 Mostek Corporation Nonvolatile static random access memory cell
US4435786A (en) * 1981-11-23 1984-03-06 Fairchild Camera And Instrument Corporation Self-refreshing memory cell
US4467451A (en) * 1981-12-07 1984-08-21 Hughes Aircraft Company Nonvolatile random access memory cell
JPS6276095A (ja) * 1985-09-30 1987-04-08 Toshiba Corp 半導体集積回路
US4901279A (en) * 1988-06-20 1990-02-13 International Business Machines Corporation MESFET sram with power saving current-limiting transistors

Also Published As

Publication number Publication date
JPH02234508A (ja) 1990-09-17
EP0384501B1 (en) 1993-03-31
JP2972814B2 (ja) 1999-11-08
EP0384501A1 (en) 1990-08-29
DE69001185D1 (de) 1993-05-06
DE69001185T2 (de) 1993-09-30
KR0136371B1 (ko) 1998-05-15
US4972098A (en) 1990-11-20

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