KR900011360A - 다층 프린트 기판의 제조방법 - Google Patents
다층 프린트 기판의 제조방법 Download PDFInfo
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- KR900011360A KR900011360A KR1019890020640A KR890020640A KR900011360A KR 900011360 A KR900011360 A KR 900011360A KR 1019890020640 A KR1019890020640 A KR 1019890020640A KR 890020640 A KR890020640 A KR 890020640A KR 900011360 A KR900011360 A KR 900011360A
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- conductive
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- printed circuit
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- 238000004519 manufacturing process Methods 0.000 claims description 16
- 238000010438 heat treatment Methods 0.000 claims description 9
- 238000000034 method Methods 0.000 claims description 8
- 239000000758 substrate Substances 0.000 claims 16
- 238000000151 deposition Methods 0.000 claims 12
- 238000005137 deposition process Methods 0.000 claims 6
- 238000003475 lamination Methods 0.000 claims 6
- 230000008021 deposition Effects 0.000 claims 5
- 238000009413 insulation Methods 0.000 claims 3
- 238000002844 melting Methods 0.000 claims 3
- 230000008018 melting Effects 0.000 claims 3
- 238000003825 pressing Methods 0.000 claims 3
- 238000010292 electrical insulation Methods 0.000 claims 2
- 238000010030 laminating Methods 0.000 claims 2
- 229920005989 resin Polymers 0.000 claims 2
- 239000011347 resin Substances 0.000 claims 2
- 229910000679 solder Inorganic materials 0.000 claims 2
- 125000006850 spacer group Chemical group 0.000 claims 2
- 239000004840 adhesive resin Substances 0.000 claims 1
- 229920006223 adhesive resin Polymers 0.000 claims 1
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 230000003139 buffering effect Effects 0.000 claims 1
- 239000006071 cream Substances 0.000 claims 1
- 238000012423 maintenance Methods 0.000 claims 1
- 239000002184 metal Substances 0.000 claims 1
- 238000004382 potting Methods 0.000 claims 1
- 230000008646 thermal stress Effects 0.000 claims 1
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
- H05K3/462—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar double-sided circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
- H05K2201/0203—Fillers and particles
- H05K2201/0206—Materials
- H05K2201/0215—Metallic fillers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0302—Properties and characteristics in general
- H05K2201/0305—Solder used for other purposes than connections between PCB or components, e.g. for filling vias or for programmable patterns
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09536—Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10666—Plated through-hole for surface mounting on PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
- H05K2201/2036—Permanent spacer or stand-off in a printed circuit or printed circuit assembly
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
- H05K2203/1189—Pressing leads, bumps or a die through an insulating layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/15—Position of the PCB during processing
- H05K2203/1572—Processing both sides of a PCB by the same process; Providing a similar arrangement of components on both sides; Making interlayer connections from two sides
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3485—Applying solder paste, slurry or powder
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4623—Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49126—Assembling bases
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49144—Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
Claims (20)
- 적어도 단면에 도전층이 패턴 형성된 프린트 기판에 있어서, 도전층의 일부 표면상에 도전 부재를 피착 형성하는 도전부재 피착 공정, 전술한 도전층상에 피착형성된 도전 부재가 다른 프린트 기판상의 도전층 및 도전층에 피착 형성된 도전 부재 가운데 어느 것에 대향하도록 전술한 도전부재 피착 공정이 실시된 프린트 기판을 적어도 1장 포함한 복수장의 프린트 기판을 적층하는 적층공정, 및 전술한 적층 공정 실시후에 전술한 도전 부재를, 대향하는 도전층 및 도전층에 피착 형성된 도전부재 가운데 어느것에 전기적으로 접속해서 전기적 접속층을 형성하는 기판간 접속공정을 포함하는 것을 특징으로 하는 다층 프린트기판의 제조방법.
- 제1항에 있어서, 전술한 도전부재 피착 고정에 앞서, 전술한 도전층의 표면에 도전층과 도전 부재의 열팽창계수의 차에 기인하는 열 스트레스를 완충하는 완충층을 피착 형성하는 것을 것을 특징으로 하는 다층 프린트기판의 제조방법.
- 제1항에 있어서, 적어도 전술한 도전부재 피착 공정 실시후에 도전층 표면에 회로 소자를 장착하는 것을 특징으로 하는 다층 프린트기판의 제조방법.
- 제1항에 있어서, 전술한 복수의 프린트 기판 가운데 적어도 1장이 양면에 도전층이 패턴 형성된 양면 프린트 기판인 것을 특징으로 하는 다층 프린트기판의 제조방법.
- 제1항에 있어서, 전술한 도전 부재는 소정의 융점을 갖는 솔더 페이스트를 포함하고, 전술한 도전부재의 도전 층상으로의 피착 형성은 인쇄 및 리플로우로 행하는 것을 특징으로 하는 다층 프린트기판의 제조방법.
- 제1항에 있어서, 전술한 도전 부재는 소정의 경화온도를 갖는 도전성 수지를 포함하고, 전술한 도전부재의 도전층상으로의 피착 형성은 폿팅에 의해 행하는 것을 특징으로 하는 다층 프린트기판의 제조방법.
- 제1항에 있어서, 전술한 기판간 접속 공정은 적층된 여러장의 프린트 기판을 적층 방향으로 끼워 지지하고, 또 적층 방향에 소정 압력을 가해서, 전술한 도전 부재를 대향하는 도전층 및 도전층에 피착 형성된 도전 부재 가운데 어느 것에 밀착시키는 가압 공정을 포함하는 것을 특징으로 하는 다층 프린트기판의 제조방법.
- 제1항에 있어서, 전술한 기판간 접속 공정은 적층된 복수장의 프린트 기판에 소정온도의 열을 가해서 전술한 도전부재를 대향하는 도전층 및 도전층에 피착 형성된 도전부재 가운데 어느 것에 고착시키는 가열 공정을 포함하는 것을 특징으로 하는 다층 프린트기판의 제조방법.
- 제1항에 있어서, 전술한 가열 공정에 있어서의 가열은 초음파를 가함으로서 행하는 것을 특징으로 하는 다층 프린트기판의 제조방법.
- 제7항에 있어서, 전술한 기판간 접속 공정은 적층된 복수장의 프린트 기판에 소정 온도의 열을 가해서, 전술한 도전부재를 대향하는 도전층 및 도전층에 피착 형성된 도전부재 가운데 어느 것에 고착시키는 가열 공정을 포함하고, 전술한 가열 공정은 전술한 가압 공정과 동시에 행하는 것을 특징으로 하는 다층 프린트기판의 제조방법.
- 적어도 단면에 도전층이 패턴 형성된 프린트 기판에 있어서, 도전층의 일부 표면상에 도전 부재를 피착 형성하는 도전부재 피착 공정, 전술한 도전층의 전술한 도전부재가 피착 형성되어 있지 않는 일부 표면에 전기적 절연 부재를 피착 형성하는 절연 부재 피착 공정, 전술한 도전층상에 피착 형성된 도전부재가 다른 프린트 기판상의 도전층 및 도전층에 피착 형성된 도전부재 가운데 어느 것에 대향하도록, 전술한 도전 부재 피착 공정 및 절연 부재 피착 공정이 실시된 프린트 기판을 적어도 1장 포함하는 복수장의 프린트 기판을 적층하는 적층 공정, 및 전술한 적층 공정 실시후에, 전술한 도전부재를 대향하는 도전층 및 도전층에 피착 형성된 도전 부재 가운데 어느 것에 전기적으로 접속해서 전기적 접속층을 형성하는 기판간 접속공정을 포함하는 것을 특징으로 하는 다층 프린트기판의 제조방법.
- 제11항에 있어서, 전술한 전기적 절연 부재는 소정의 경화 온도를 갖는 절연서 접착 수지를 포함하고, 전술한 전기적 절연부재의 전술한 도전층에의 피착 형성은 인쇄에 의해 행하는 것을 특징으로 하는 다층 프린트기판의 제조방법.
- 제11항에 있어서, 전술한 기판간 접속 공정은 적층된 여러장의 프린트 기판을 적층 방향으로 끼워 지지하고, 또 적층 방향으로 소정압력을 가해서 전술한 도전부재를 대향하는 도전층 및 도전층에 피착 형성된 도전부재중 어느 것에 밀착시키고 또 전술한 전기적 절연 부재를 대향하는 도전층 및 도전층에 피착 형성된 전기적 절연 부재 가운데 어느 것에 밀착시키는 가압 공정을 포함하는 것을 특징으로 하는 다층 프린트기판의 제조방법.
- 제11항에 있어서, 전술한 기판간 접속 공정은 적층된 여러장의 프린트 기판에 소정온도의 열을 가해서, 전술한 도전부재를 대향하는 도전층 및 도전층에피착 형성된 도전부재 가운데 어느 것에 고착시키고 또 전술한 전기적 절연부재를 대향하는 도전층 및 도전층에 피착 형성된 전기적 절연 부재 가운데 어느 것에 고착시키는 가열 공정을 포함하는 것을 특징으로 하는 다층 프린트기판의 제조방법.
- 제11항에 있어서, 전술한 전기적 절연 부재가 전술한 도전 부재의 융점보다 낮은 경화온도를 갖고, 전술한 전기적 절연부재는 전술한 도전부재를 덮는 듯이, 전술한 도전층의 일부 표면에 형성되는 것을 특징으로 하는 다층 프린트기판의 제조방법.
- 적어도 단면에 도전층이 패턴 형성된 프린트 기판에 있어서의 도전층의 일부 표면상에 대략 일정의 두께를 갖는 복수의 간격 유지 부재를 포함하는 도전 부재를 피착 형성하는 도전 부재 피착 공정, 전술한 도전층상에 피착 형성된 도전 부재가 다른 프린트 기판상의 도전층 및 도전층에 피착 형성된 도전부재 가운데 어느 것에 대향하도록 전술한 도전부재 피착 공정이 실시된 프린트 기판을 적어도 1장 포함하는 복수장의 프린트 기판을 적층하는 적층 공정, 및 전술한 적층 공정 실시 후에 전술한 도전부재를 대향하는 도전층 및 도전층에 피착 형성된 도전 부재 가운데 어느 것에 전기적으로 접속해서 전기적 접속층을 형성하는 기판간 접속 공정을 포함하는 것을 특징으로 하는 다층 프린트기판의 제조방법.
- 제16항에 있어서, 전술한 도전부재가 전술한 간격지지 부재보다 낮은 융점을 갖는 크림 솔더이고, 전술한 도전부재 피착 공정은 전술한 간격 유지 부재를 전술한 도전 부재중에 혼입하는 공정을 포함하는 것을 특징으로 하는 다층 프린트기판의 제조방법.
- 제17항에 있어서, 전술한 간격 지지부재는 구형인 것을 특징으로 하는 다층 프린트기판의 제조방법.
- 제17항에 있어서, 전술한 간격 지지부재는 금속인 것을 특징으로 하는 다층 프린트기판의 제조방법.
- 제16항에 있어서, 전술한 도전 부재가 전술한 간격 지지 부재보다 낮은 경화온도를 갖는 도전성 수지이고, 전술한 도전부재 피착 공정은 전술한 간격 지지 부재를 전술한 도전 부재 중에 혼입하는 혼입공정을 포함하는 것을 특징으로 하는 다층 프린트기판의 제조방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (15)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63332013A JPH0614598B2 (ja) | 1988-12-29 | 1988-12-29 | 多層プリント基板の製造方法 |
JP??63-332013 | 1988-12-29 | ||
JP88-332013 | 1988-12-29 | ||
JP1077480A JPH0736471B2 (ja) | 1989-03-29 | 1989-03-29 | 多層基板の接合方法 |
JP??01-77480 | 1989-03-29 | ||
JP89-77480 | 1989-03-29 | ||
JP1149972A JPH0671144B2 (ja) | 1989-06-13 | 1989-06-13 | 多層高密度実装モジュール |
JP89-149972 | 1989-06-13 | ||
JP??01-149972 | 1989-06-13 | ||
JP1194928A JPH0360096A (ja) | 1989-07-27 | 1989-07-27 | 多層プリント配線基板の製造方法 |
JP??01-194928 | 1989-07-27 | ||
JP89-194928 | 1989-07-27 | ||
JP??01-237478 | 1989-09-13 | ||
JP89-237478 | 1989-09-13 | ||
JP1237478A JPH071830B2 (ja) | 1989-09-13 | 1989-09-13 | 多層プリント配線基板の接続方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR900011360A true KR900011360A (ko) | 1990-07-11 |
KR940009175B1 KR940009175B1 (ko) | 1994-10-01 |
Family
ID=27524672
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019890020640A KR940009175B1 (ko) | 1988-12-29 | 1989-12-29 | 다층 프린트기판의 제조방법 |
Country Status (6)
Country | Link |
---|---|
US (1) | US5031308A (ko) |
EP (3) | EP0607532B1 (ko) |
KR (1) | KR940009175B1 (ko) |
CA (1) | CA2006776C (ko) |
DE (3) | DE68921732T2 (ko) |
ES (3) | ES2104023T3 (ko) |
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- 1989-12-26 US US07/456,946 patent/US5031308A/en not_active Expired - Lifetime
- 1989-12-28 DE DE68921732T patent/DE68921732T2/de not_active Expired - Fee Related
- 1989-12-28 ES ES93118943T patent/ES2104023T3/es not_active Expired - Lifetime
- 1989-12-28 DE DE68926055T patent/DE68926055T2/de not_active Expired - Fee Related
- 1989-12-28 DE DE68928150T patent/DE68928150T2/de not_active Expired - Fee Related
- 1989-12-28 ES ES89124088T patent/ES2069570T3/es not_active Expired - Lifetime
- 1989-12-28 ES ES93118917T patent/ES2085098T3/es not_active Expired - Lifetime
- 1989-12-28 EP EP93118917A patent/EP0607532B1/en not_active Expired - Lifetime
- 1989-12-28 EP EP93118943A patent/EP0607534B1/en not_active Expired - Lifetime
- 1989-12-28 EP EP89124088A patent/EP0379736B1/en not_active Expired - Lifetime
- 1989-12-28 CA CA002006776A patent/CA2006776C/en not_active Expired - Fee Related
- 1989-12-29 KR KR1019890020640A patent/KR940009175B1/ko not_active IP Right Cessation
Cited By (1)
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KR100267558B1 (ko) * | 1997-05-13 | 2000-10-16 | 구자홍 | Bga 패키지와 인쇄 회로 기판의 접합 장치 |
Also Published As
Publication number | Publication date |
---|---|
ES2104023T3 (es) | 1997-10-01 |
CA2006776A1 (en) | 1990-06-29 |
EP0607532A2 (en) | 1994-07-27 |
CA2006776C (en) | 1995-01-17 |
EP0607534A2 (en) | 1994-07-27 |
ES2069570T3 (es) | 1995-05-16 |
EP0607534B1 (en) | 1997-07-02 |
EP0379736B1 (en) | 1995-03-15 |
DE68926055T2 (de) | 1996-10-24 |
DE68928150D1 (de) | 1997-08-07 |
KR940009175B1 (ko) | 1994-10-01 |
DE68928150T2 (de) | 1997-11-27 |
DE68921732D1 (de) | 1995-04-20 |
DE68926055D1 (de) | 1996-04-25 |
US5031308A (en) | 1991-07-16 |
ES2085098T3 (es) | 1996-05-16 |
EP0607532A3 (en) | 1994-09-28 |
EP0379736A1 (en) | 1990-08-01 |
DE68921732T2 (de) | 1995-07-13 |
EP0607534A3 (en) | 1994-09-28 |
EP0607532B1 (en) | 1996-03-20 |
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