KR900011140A - A/d 변환기의 바이어스회로 - Google Patents
A/d 변환기의 바이어스회로 Download PDFInfo
- Publication number
- KR900011140A KR900011140A KR1019890018181A KR890018181A KR900011140A KR 900011140 A KR900011140 A KR 900011140A KR 1019890018181 A KR1019890018181 A KR 1019890018181A KR 890018181 A KR890018181 A KR 890018181A KR 900011140 A KR900011140 A KR 900011140A
- Authority
- KR
- South Korea
- Prior art keywords
- current
- converter
- potential
- bias circuit
- ladder resistors
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/0602—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic
- H03M1/0604—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic at one point, i.e. by adjusting a single reference value, e.g. bias or gain error
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
- H03M1/145—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit the steps being performed sequentially in series-connected stages
- H03M1/146—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit the steps being performed sequentially in series-connected stages all stages being simultaneous converters
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
Description
Claims (1)
- 전단래더저항(RF1~RF1)의 전위와 아나로그입력신호(IN)를 비교해서 상위비트를 결정함과 더불어 상기 아나로그입력신호(IN)의 값이 존재하는 결정된 범위내의 전위를 아나로그스위치(SW) 및 트랜지스터(Q4)를 매개로 후단래더저항(RR1∼RRn)에 전달해서 하위비트를 결정하는 방식으로 된 직병렬형 A/D 변환기의 바이어스회로에 있어서, 상기 전단래더저항(RF1~RF1)의 양단에 고정전위가 인가되는 단자(T2,T|3)를 설치하여 그중 한쪽 단자(T3)의 전압[V(-)]을 참조전압으로 해서, 출력이 상기 참조전압[V(-)]과 동일전위로 되는 한편 상기 출력과 다른쪽 단자(T2)간에 제1저항(RM)을 접속시켜 상기 전단래더저항(RR1~RRn)의 전류와 상기 제1저항(RM)의 전류가 비례관계로 되도록 구성된 연산증폭기(1)를 갖추고, 이 연산증폭기(1)의 출력부의전류(I1/m ; 제1저항의 전류)에 비례하는 전류(I3)가 상기 후단래더저항(RR1∼RRn)에 흐르도록 하는 전류원(Q2,Q5)을 갖추면서, 상기 전·후단래더저항(RF1~RF1,R|R1∼RRn) 및 제1저항(RM)을 동일한 종류로 한 것을 특징으로 하는 A/D 변환기의 바이어스회로.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63-310702 | 1988-12-08 | ||
JP88-310702 | 1988-12-08 | ||
JP63310702A JPH02156728A (ja) | 1988-12-08 | 1988-12-08 | A/d変換器のバイアス回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR900011140A true KR900011140A (ko) | 1990-07-11 |
KR920010216B1 KR920010216B1 (ko) | 1992-11-21 |
Family
ID=18008442
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019890018181A Expired KR920010216B1 (ko) | 1988-12-08 | 1989-12-08 | A/d 변환기의 바이어스회로 |
Country Status (5)
Country | Link |
---|---|
US (1) | US5019821A (ko) |
EP (1) | EP0372547B1 (ko) |
JP (1) | JPH02156728A (ko) |
KR (1) | KR920010216B1 (ko) |
DE (1) | DE68925788T2 (ko) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5111205A (en) * | 1990-12-18 | 1992-05-05 | Vlsi Technology, Inc. | Digital-to-analog and analog-to-digital converters |
JPH04314210A (ja) * | 1991-04-12 | 1992-11-05 | Toshiba Corp | A/d変換器 |
US5703588A (en) * | 1996-10-15 | 1997-12-30 | Atmel Corporation | Digital to analog converter with dual resistor string |
US6509858B2 (en) * | 2000-12-21 | 2003-01-21 | Intel Corporation | Differential voltage reference buffer |
US6567028B2 (en) * | 2001-10-12 | 2003-05-20 | Micron Technology, Inc. | Reference voltage stabilization in CMOS sensors |
US6498577B1 (en) * | 2002-01-16 | 2002-12-24 | Infineon Technologies Ag | Piecewise-linear, non-uniform ADC |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2264432B1 (ko) * | 1974-03-15 | 1976-12-17 | Thomson Csf | |
JPS558051B2 (ko) * | 1974-11-06 | 1980-03-01 | ||
US4353059A (en) * | 1980-05-16 | 1982-10-05 | Motorola Inc. | Multithreshold converter utilizing reference tracking amplifiers |
JPS5725722A (en) * | 1980-07-22 | 1982-02-10 | Nippon Telegr & Teleph Corp <Ntt> | Analog-to-digital converter |
JPS5787621A (en) * | 1980-11-21 | 1982-06-01 | Seiko Epson Corp | Digital-to-analog converter |
US4542370A (en) * | 1981-10-20 | 1985-09-17 | Tokyo Shibaura Denki Kabushiki Kaisha | Cascade-comparator A/D converter |
US4745393A (en) * | 1985-09-25 | 1988-05-17 | Hitachi, Ltd | Analog-to-digital converter |
US4680535A (en) * | 1985-10-17 | 1987-07-14 | Harris Corporation | Stable current source |
US4808907A (en) * | 1988-05-17 | 1989-02-28 | Motorola, Inc. | Current regulator and method |
-
1988
- 1988-12-08 JP JP63310702A patent/JPH02156728A/ja active Pending
-
1989
- 1989-12-07 EP EP89122555A patent/EP0372547B1/en not_active Expired - Lifetime
- 1989-12-07 DE DE68925788T patent/DE68925788T2/de not_active Expired - Fee Related
- 1989-12-07 US US07/447,413 patent/US5019821A/en not_active Expired - Lifetime
- 1989-12-08 KR KR1019890018181A patent/KR920010216B1/ko not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPH02156728A (ja) | 1990-06-15 |
DE68925788T2 (de) | 1996-08-01 |
DE68925788D1 (de) | 1996-04-04 |
EP0372547A3 (en) | 1992-07-15 |
EP0372547B1 (en) | 1996-02-28 |
US5019821A (en) | 1991-05-28 |
KR920010216B1 (ko) | 1992-11-21 |
EP0372547A2 (en) | 1990-06-13 |
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Patent event code: PA01091R01D Comment text: Patent Application Patent event date: 19891208 |
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Patent event code: PA02012R01D Patent event date: 19891208 Comment text: Request for Examination of Application |
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Comment text: Decision on Publication of Application Patent event code: PG16051S01I Patent event date: 19921024 |
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Patent event code: PE07011S01D Comment text: Decision to Grant Registration Patent event date: 19930217 |
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