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KR890015547A - Serial data transmission and reception circuit between main device and key phone - Google Patents

Serial data transmission and reception circuit between main device and key phone Download PDF

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Publication number
KR890015547A
KR890015547A KR1019880003194A KR880003194A KR890015547A KR 890015547 A KR890015547 A KR 890015547A KR 1019880003194 A KR1019880003194 A KR 1019880003194A KR 880003194 A KR880003194 A KR 880003194A KR 890015547 A KR890015547 A KR 890015547A
Authority
KR
South Korea
Prior art keywords
serial data
main device
reception circuit
data transmission
generating
Prior art date
Application number
KR1019880003194A
Other languages
Korean (ko)
Other versions
KR910002355B1 (en
Inventor
김창희
Original Assignee
강진구
삼성반도체통신 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 강진구, 삼성반도체통신 주식회사 filed Critical 강진구
Priority to KR1019880003194A priority Critical patent/KR910002355B1/en
Publication of KR890015547A publication Critical patent/KR890015547A/en
Application granted granted Critical
Publication of KR910002355B1 publication Critical patent/KR910002355B1/en

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M3/00—Automatic or semi-automatic exchanges
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M7/00—Arrangements for interconnection between switching centres
    • H04M7/14—Arrangements for interconnection between switching centres in systems involving main and subordinate switching centres

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
  • Bidirectional Digital Transmission (AREA)

Abstract

내용 없음No content

Description

주장치와 키폰전화기간의 직렬데이타 송수신 전달회로Serial data transmission and reception circuit between main device and key phone

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제 1 도는 본 발명에 따른 회로도. 제 2 도는 본 발명에 따른 동작 타이밍도.1 is a circuit diagram according to the present invention. 2 is an operation timing diagram according to the present invention.

Claims (1)

주장치와 부장치간의 직렬 데이타 송수신 전달회로에 있어서, 상기 주장치로 직렬 데이타를 받아 트랜시언트의 상승 및 하강에지에 의해 임펄스를 발생하는 제 1 수단과, 상기 제 1 수단의 출력을 인턱턴스에 의해 유기되어 반전 신호로 발생하는 제 2 수단과, 상기 제 2 수단의 출력을 기준레벨과 비교하여 상기 입력 데이타의 반전된 데이타를 발생하여 상기 주장치의 제어부에서 수신하도록 하는 제 3 수단과, 상기 부장치의 송신 직렬 데이타를 버퍼링하는 제 4 수단과 상기 제 4 수단의 출력 데이타의 트랜시언트 상승 및 하강에지에 의해 임펄스를 발생하는 제 5 수단과, 상기 제 5 수단의 출력을 상기 제 2 수단과 같이 처리하여 제 3 수단의 같은 동일 처리에 의해 부장치로 입력되도록 하는 제 6 수단으로 구성됨을 특징으로 하는 회로.A serial data transmission and reception circuit between a main device and a secondary device, comprising: first means for receiving serial data from the main device and generating an impulse by rising and falling edges of a transceiver; and outputting the first means by an inductance. Second means for inducing and generating an inverted signal, third means for generating the inverted data of the input data by comparing the output of the second means with a reference level and receiving it at the controller of the main apparatus, and the auxiliary apparatus Fourth means for buffering the transmission serial data of the first and fifth means for generating an impulse by the transient rising and falling edges of the output data of the fourth means, and outputting the fifth means as the second means. And a sixth means for processing to be input to the auxiliary device by the same processing of the third means. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019880003194A 1988-03-24 1988-03-24 Serial data transmitting and receiving circuit between the main system and the keyphone KR910002355B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019880003194A KR910002355B1 (en) 1988-03-24 1988-03-24 Serial data transmitting and receiving circuit between the main system and the keyphone

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019880003194A KR910002355B1 (en) 1988-03-24 1988-03-24 Serial data transmitting and receiving circuit between the main system and the keyphone

Publications (2)

Publication Number Publication Date
KR890015547A true KR890015547A (en) 1989-10-30
KR910002355B1 KR910002355B1 (en) 1991-04-20

Family

ID=19273080

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019880003194A KR910002355B1 (en) 1988-03-24 1988-03-24 Serial data transmitting and receiving circuit between the main system and the keyphone

Country Status (1)

Country Link
KR (1) KR910002355B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160089233A (en) * 2015-01-19 2016-07-27 실리콘알엔디(주) DC Correction Circuit of Ultra-Wideband Impulse Receiver and Ultra-Wideband Impulse Receiver including the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160089233A (en) * 2015-01-19 2016-07-27 실리콘알엔디(주) DC Correction Circuit of Ultra-Wideband Impulse Receiver and Ultra-Wideband Impulse Receiver including the same

Also Published As

Publication number Publication date
KR910002355B1 (en) 1991-04-20

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