KR890002155Y1 - 온-오프(on-off)주기 가변 타이머 제어회로 - Google Patents
온-오프(on-off)주기 가변 타이머 제어회로 Download PDFInfo
- Publication number
- KR890002155Y1 KR890002155Y1 KR2019860003980U KR860003980U KR890002155Y1 KR 890002155 Y1 KR890002155 Y1 KR 890002155Y1 KR 2019860003980 U KR2019860003980 U KR 2019860003980U KR 860003980 U KR860003980 U KR 860003980U KR 890002155 Y1 KR890002155 Y1 KR 890002155Y1
- Authority
- KR
- South Korea
- Prior art keywords
- nand
- terminal
- nand gate
- signal
- resistor
- Prior art date
Links
- 239000003990 capacitor Substances 0.000 claims description 7
- 230000008878 coupling Effects 0.000 claims description 3
- 238000010168 coupling process Methods 0.000 claims description 3
- 238000005859 coupling reaction Methods 0.000 claims description 3
- 238000010438 heat treatment Methods 0.000 description 7
- 230000000694 effects Effects 0.000 description 2
- 230000003340 mental effect Effects 0.000 description 2
- 239000004753 textile Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 230000003252 repetitive effect Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000004804 winding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H43/00—Time or time-programme switches providing a choice of time-intervals for executing one or more switching actions and automatically terminating their operations after the programme is completed
- H01H43/02—Details
- H01H43/04—Means for time setting
Landscapes
- Electronic Switches (AREA)
Abstract
Description
Claims (1)
- 좌, 우측단이 서로 대칭으로 된 2중 타이머아이씨(DTIC)에 디스차지단자(1) (13)와 드레슐드(2)(12)단자를 서로 연결하여 공급전원(Vcc)에 연결된 가변저항(VR1)(VR2)과 콘덴서(C1)(C2) 사이에 연결하고, 트리거단자(6)(8)와 출력단자(5)(9)사이에 커플링콘덴서(C3)(C4)를 연결시켜 공급전원(Vcc)에 연결된 저항(R1)(R2)에 연결하되, 출력단자(5)는 낸드게이트(NAND1)를 통해 낸드게이트(NAND2)의 입력한단에 연결할때, 셋트(S) 및 리세트(R)를 선택하는 선택스위치(SW1)에 저항(R3)(R4)을 연결하여 낸드게이트(NAND3)(NAND4)로 구성된 래치회로(LAC)의 입력단에 각각 연결하고, 그 출력단은 낸드게이트(NAND2)의 입력단에 연결시켜 그 출력단과 저항(R5)을 통해 트랜지스터(TR1)의 콜렉터에 릴레이(Ry)를 연결한 베이스에 연결시켜 구성되는 온-오프주기 가변 타이머 제어회로.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019860003980U KR890002155Y1 (ko) | 1986-03-31 | 1986-03-31 | 온-오프(on-off)주기 가변 타이머 제어회로 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019860003980U KR890002155Y1 (ko) | 1986-03-31 | 1986-03-31 | 온-오프(on-off)주기 가변 타이머 제어회로 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR870015426U KR870015426U (ko) | 1987-10-26 |
KR890002155Y1 true KR890002155Y1 (ko) | 1989-04-12 |
Family
ID=19250068
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR2019860003980U KR890002155Y1 (ko) | 1986-03-31 | 1986-03-31 | 온-오프(on-off)주기 가변 타이머 제어회로 |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR890002155Y1 (ko) |
-
1986
- 1986-03-31 KR KR2019860003980U patent/KR890002155Y1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR870015426U (ko) | 1987-10-26 |
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Comment text: Application for Utility Model Registration Patent event code: UA01011R08D Patent event date: 19860331 |
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Patent event date: 19860331 Patent event code: UA02012R01D Comment text: Request for Examination of Application |
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Comment text: Notification of reason for refusal Patent event code: UE09021S01D Patent event date: 19890127 |
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UG1604 | Publication of application |
Patent event code: UG16041S01I Comment text: Decision on Publication of Application Patent event date: 19890314 |
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E701 | Decision to grant or registration of patent right | ||
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Patent event date: 19890622 Comment text: Decision to Grant Registration Patent event code: UE07011S01D |
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Patent event date: 19890926 Patent event code: UR07011E01D Comment text: Registration of Establishment |
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