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KR880700617A - Circuit panel assembly and its manufacturing method - Google Patents

Circuit panel assembly and its manufacturing method

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Publication number
KR880700617A
KR880700617A KR860700952A KR860700952A KR880700617A KR 880700617 A KR880700617 A KR 880700617A KR 860700952 A KR860700952 A KR 860700952A KR 860700952 A KR860700952 A KR 860700952A KR 880700617 A KR880700617 A KR 880700617A
Authority
KR
South Korea
Prior art keywords
substrate
panel assembly
circuit panel
conductive
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR860700952A
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Korean (ko)
Inventor
알렌 데리 로날드
로버트 에반스 윌리암
챨리 죤스 와렌
칼 메이 2세 크립톤
죠지 웬팅크 스티븐
데이비드 자카리 폴
Original Assignee
제이 엘.사이칙
에이 엠 피 인코포레이티드
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Publication date
Application filed by 제이 엘.사이칙, 에이 엠 피 인코포레이티드 filed Critical 제이 엘.사이칙
Publication of KR880700617A publication Critical patent/KR880700617A/en
Withdrawn legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4635Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating flexible circuit boards using additional insulating adhesive materials between the boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
    • H05K3/323Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives by applying an anisotropic conductive adhesive layer over an array of pads
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H05K3/462Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar double-sided circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0393Flexible materials
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/05Insulated conductive substrates, e.g. insulated metal substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks
    • H05K1/095Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/181Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09536Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/096Vertically aligned vias, holes or stacked vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09981Metallised walls
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10636Leadless chip, e.g. chip capacitor or resistor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10689Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954Other details of electrical connections
    • H05K2201/10977Encapsulated connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1189Pressing leads, bumps or a die through an insulating layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14Related to the order of processing steps
    • H05K2203/1446Treatment after insertion of lead into hole, e.g. bending, cutting, caulking or curing of adhesive but excluding soldering
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/15Position of the PCB during processing
    • H05K2203/1545Continuous processing, i.e. involving rolls moving a band-like or solid carrier along a continuous production path
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
    • H05K3/305Affixing by adhesive
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4623Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Combinations Of Printed Boards (AREA)

Abstract

내용 없음No content

Description

회로 패널 어셈블리 및 그 제조방법Circuit panel assembly and its manufacturing method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

재 1 도는 본 발명의 특징을 구체화시키는 인쇄회로 패널의 투시도.1 is a perspective view of a printed circuit panel embodying features of the present invention.

Claims (31)

위에 배치된 전기부품을 상호 접속하기 위해 공통 패널상에 규정된 전기회로로 이루어지며, 기판(11)과, 전기회로를 규정하는 기판(11)의 적어도 한 표면상에 규정된 전기 도전 흔적(14)패턴과, 다수의 부품 접속 영역(15)과, 각 부품 접속 영역(15)내의 대응 도전 흔적(14)과 연결되는 이산 부품 접촉부재 장착소자(16)로 이루어진 미리 형성된 회로 패널 어셈블리에 있어서, 비등방성 도전 접착층(24)이 각부품 접속 영역(15)내의 다수의 부품 접촉 부재 장착 소자(16)위에 놓이며, 비등방성 도전 접착이 이산된 부품 접촉부재 장착 소자(16)사이에서 전기적으로 절연되며, 따라서, 다수의 전기 부품이 땜납기의 사용없이 전기회로에 접속될 수 있도록 구성된 것을 특징으로 하는 회로 패널 어셈블리.An electrical circuit defined on a common panel for interconnecting the electrical components arranged thereon, the electrical traces 14 defined on the substrate 11 and at least one surface of the substrate 11 defining the electrical circuit In the pre-formed circuit panel assembly consisting of a pattern, a plurality of component connection regions 15 and discrete component contact member mounting elements 16 connected to corresponding conductive traces 14 in each component connection region 15, An anisotropic conductive adhesive layer 24 overlies the plurality of component contact member mounting elements 16 in each component connection region 15 and is electrically insulated between the component contact member mounting elements 16 in which the anisotropic conductive adhesion is discrete. And thus, a plurality of electrical components can be connected to an electrical circuit without the use of a soldering machine. 제 1 항에 있어서, 비등방성 도전 접착물이 비도전 접착 바인더내에 무작위하게 분산된 다수의 도전입자로 이루어진 것을 특징으로 하는 회로 패널 어셈블리.2. The circuit panel assembly of claim 1, wherein the anisotropic conductive adhesive consists of a plurality of conductive particles randomly dispersed in the nonconductive adhesive binder. 제 2 항에 있어서, 도전 입자가 다수의 다중 입자 클러스터를 형성하기 위해 분산되는 것을 특징으로 하는 회로 패널 어셈블리.3. The circuit panel assembly of claim 2, wherein the conductive particles are dispersed to form a plurality of multiparticle clusters. 제 1 항에 있어서, 비등방성 도전 접착층이 완전하게 적어도 하나의 전체 부품 접속 영역(15)에 중첩되며, 비등방성 도전 접착층(24)이 기판에 전기 부품을 기계적으로 고정시키며, 이산된 접촉부재 장착소자(16)에 전기 부품을 전기적으로 상호 접속시키는 것을 특징으로 하는 회로 패널 어셈블리.2. The anisotropic conductive adhesive layer of claim 1, wherein the anisotropic conductive adhesive layer completely overlaps at least one of the entire component connection regions 15, wherein the anisotropic conductive adhesive layer 24 mechanically secures the electrical component to the substrate and mounts discrete contacts. A circuit panel assembly characterized by electrically interconnecting electrical components to the device (16). 제 4 항에 있어서, 이산 부품 접촉부재 장차소자(16)가 부품 접속 영역(15)내의 기판용 표면상의 패드로 이루어지며, 비등방성 도전 접착층(24)이 패널 어셈블리에 전기 부품을 표면 장착시키기 위한 수단으로 이루어진 것을 특징으로 하는 회로 패널 어셈블리.5. The device of claim 4, wherein the discrete component contact element carriage element (16) consists of a pad on the surface of the substrate in the component connection area (15), wherein an anisotropic conductive adhesive layer (24) is used to surface mount the electrical component on the panel assembly. Circuit panel assembly, characterized in that consisting of means. 제 1 항, 제 4 항 또는 제 5 항에 있어서, 기판(11)이 금속 보드로 이루어진 것을 특징으로 하는 회로 패널 어셈블리.6. Circuit panel assembly according to claim 1, 4 or 5, characterized in that the substrate (11) consists of a metal board. 제 6 항에 있어서, 기판이 전기 분해된 알류미늄 보드(11a)로 이루어진 것을 특징으로 하는 회로 패널 어셈블리.7. A circuit panel assembly according to claim 6, wherein the substrate consists of an electrolytic aluminum board (11a). 제 1 항, 제 4 항 또는 제 5 항에 있어서, 기판이 유연한 기판(211)으로 이루어진 것을 특징으로 하는 회로 패널 어셈블리.6. A circuit panel assembly according to claim 1, 4 or 5, wherein the substrate is made of a flexible substrate (211). 제 8 항에 있어서, 어셈블리(312)가 다수의 분리된 유연 플라스틱 필름층으로 이루어진 것을 특징으로 하는 회로 패널 어셈블리.9. The circuit panel assembly of claim 8, wherein the assembly (312) consists of a plurality of separate flexible plastic film layers. 제 1 항, 제 4 항, 제 5 항, 제 6 항 또는 제 8 항에 있어서, 기판(11)이 그위에 장착될 전기 부품과 다른 열팽창계수를 가지며, 비등방성 도전 접착층(24)이 서로 다른 열팽창 계수에 기인한 상대 이동에도 불구하고 전기적 연속성을 유지하기 위해 유연한 상호 접속을 형성하는 것을 특징으로 하는 회로 패널 어셈블리.9. A substrate according to claim 1, 4, 5, 6 or 8, wherein the substrate 11 has a coefficient of thermal expansion different from that of the electrical component to be mounted thereon, and the anisotropic conductive adhesive layers 24 are different from each other. A circuit panel assembly, characterized by forming a flexible interconnect to maintain electrical continuity despite relative movement due to coefficient of thermal expansion. 제 1 항, 제 4 항 또는 제 5 항에 있어서, 기판(11), 구멍(27,30)내에 배치되는 전기도전 고체 폴리머(28),(33)를 통해 연장되는 다수의 구멍(27),(30)으로 이루어진 것을 특징으로 하는 회로 패널 어셈블리.6. The substrate 11, a plurality of holes 27 extending through the electrically conductive solid polymers 28, 33 disposed in the holes 27, 30, Circuit panel assembly, characterized in that consisting of (30). 제 1 항, 제 4 항 또는 제 5 항에 있어서, 흔적(15)이 전기 도전 고체 폴리머로 이루어진 것을 특징으로 하는 회로 패널 어셈블리.6. Circuit panel assembly according to claim 1, 4 or 5, characterized in that the trace (15) consists of an electrically conductive solid polymer. 제 1 항 또는 제 8 항에 있어서, 어셈블리가 다수의 분리 기판층(111,111a,111b,111c)과 적어도 한개의 분리 기판층상의 이산된 부품 접촉부재 장착 소자(122)를 거쳐 배치된 비등방성 도전 접착층(128)으로 이루어진 것을 특징으로 하는 회로 패널 어셈블리.9. An anisotropic conductor as claimed in claim 1 or 8, wherein the assembly is disposed through a plurality of separation substrate layers (111, 111a, 111b, 111c) and discrete component contact member mounting elements (122) on at least one separation substrate layer. Circuit panel assembly, characterized in that consisting of an adhesive layer (128). 제13항에 있어서, 유전 커버층(124)이 각 분리 기판층(111,111a,111b,111c), 각 층의 회로가 규정되는 기판을 형성하는 유전 커버층상의 회로 부분위에 놓이는 것을 특징으로 하는 회로 패널 어셈블리.14. A circuit according to claim 13, wherein the dielectric cover layer 124 is placed over each of the separation substrate layers 111, 111a, 111b, 111c, the circuit portion on the dielectric cover layer forming a substrate on which the circuits of each layer are defined. Panel assembly. 제14항에 있어서, 각 유전 커버층(111,111a,111b,111c)이 고체 유전잉크로 형성되는 것을 특징으로 하는 회로 패널 어셈블리.15. The circuit panel assembly of claim 14, wherein each dielectric cover layer (111,111a, 111b, 111c) is formed of a solid dielectric ink. 제15항에 있어서, 각 분리 기판층(111,111a,111b,111c)상의 고체 도전 폴리머가 도전 흔적(118a,118b,118c,118d)을 규정하는 것을 특징으로 하는 회로 패널 어셈블리.16. The circuit panel assembly of claim 15, wherein the solid conductive polymer on each of the separation substrate layers (111, 111a, 111b, 111c) defines a conductive trace (118a, 118b, 118c, 118d). 제12항에 있어서, 상기 분리 기판층이 유연한 플라스틱 필름으로 이루어진 것을 특징으로 하는 회로 패널 어셈블리.The circuit panel assembly of claim 12, wherein the separation substrate layer is made of a flexible plastic film. 제 8 항에 있어서, 상기 어셈블리가 상기 어셈블리중 다른 어셈블리에 직렬로 상호 접속되는 것을 특징으로 하는 회로 패널 어셈블리.9. The circuit panel assembly of claim 8, wherein the assembly is interconnected in series with another of the assemblies. 제12항에 있어서, 상기 다층 어셈블리가 상기 어셈블리중 다른 어셈블리에 직렬로 상호 접속되는 것을 특징으로 하는 회로 패널 어셈블리.13. The circuit panel assembly of claim 12, wherein the multilayer assembly is interconnected in series with another of the assemblies. 각 장착 소자(16)위에 놓인 부품 리드(22)에 도전 장착 소자(16)를 전기적으로 상호 접속하기 위해 기판(11)상에 부품(20,21)을 표면 장착하는 단계로 이루어진 다수의 전기부품(20,21)을 상호 접속시키는 방법에 있어서, 판표면상의 다수의 분리 부품 접속 영역(15)을 거쳐 비등방성 도전 접착층(24)을 배치시키는 단계를 더 구비하며, 리드가 대응 장착 소자와 일치된 상태로 위치되며, 비등방성 도전 접착층이 기판에 직각으로만 그리고 대응 장착 소자(16)와 일치하여 배치된 리드(22)사이에서만 전기 도전 상태에 존재하며, 비등방성 도전 접착물이 기판에 각 부품(20,21)을 기계적으로 고정시키는 것을 특징으로 하는 다수의 전기 부품 상호 접속 방법.A plurality of electrical components consisting of surface mounting components 20, 21 on a substrate 11 for electrically interconnecting conductive mounting elements 16 to component leads 22 over each mounting element 16. A method of interconnecting (20, 21), further comprising disposing an anisotropic conductive adhesive layer (24) over a plurality of discrete component connection areas (15) on a plate surface, the leads being matched with corresponding mounting elements. In which the anisotropic conductive adhesive layer is in an electrically conductive state only at right angles to the substrate and only between the leads 22 arranged in correspondence with the corresponding mounting element 16, wherein the anisotropic conductive adhesive is applied to the substrate A method for interconnecting multiple electrical components, characterized by mechanically securing the components (20, 21). 제20항에 있어서, 유전 잉크를 배치시키므로써 부품 접속 영역(15)의 외부상의 회로를 거쳐 유전 커버층(18)을 형성하는 단계를 더 포함하는 것을 특징으로 하는 다수의 전기 부품 상호 접속 방법.21. A method according to claim 20, further comprising forming a dielectric cover layer (18) via circuitry on the exterior of the component connection region (15) by disposing the dielectric ink. 제20항에 있어서, 각각의 차순의 인접층상의 회로위에 놓인 유전 잉크에 의해 형성된 연속 유전기판층(111a,111b,111c)상에 도전 흔적을 배치시키므로써 다중 기판층을 형성하는 단계를 더 구비하는 것을 특징으로 하는 다수의 전기 부품 상호 접속 방법.21. The method of claim 20, further comprising forming multiple substrate layers by placing conductive traces on the continuous dielectric substrate layers 111a, 111b, and 111c formed by dielectric ink overlying circuits on adjacent layers in each order. And a plurality of electrical component interconnection methods. 제22항에 있어서, 다중 기판층(111a,111b,111c)을 통해 기판(111)으로 연장되는 구멍(132)을 규정하는 단계와, 분리 기판층(111a,111b,111c)상의 도전 흔적(118W,118Y,118Z)을 상호 접속시키기 위해 구멍(132)내에 도전 잉크를 배치시키는 단계로 이루어진 것을 특징으로 하는 다수의 전기 부품 상호 접속 방법.23. The method of claim 22, further comprising defining holes 132 extending through the multiple substrate layers 111a, 111b, 111c to the substrate 111, and conductive traces 118W on the separation substrate layers 111a, 111b, 111c. And disposing conductive ink in the holes (132) to interconnect 118Y, 118Z. 제23항에 있어서, 도전 흔적(118W,118Y 및 118Z)을 형성하기 위해 기판층(111a,111b,111c)상에 도전 잉크를 배치시키는 단계로 이루어진 것을 특징으로 하는 다수의 전기 부품 상호 접속 방법.24. The method of claim 23, comprising disposing conductive ink on substrate layers (111a, 111b, 111c) to form conductive traces (118W, 118Y, and 118Z). 이동 통로를 따라 기판을 진행시키는 단계와, 기판을 따라 섞어도 하나의 명백한 패널 소자를 규정하기 위해 진행 기판의 적어도 한개의 표면상에 패턴으로 액체 전기 도전 폴리머를 인가시키는 단계와, 각 부품 접속 영역(15)내로 연장되는 부품 접촉 부재 장착 패드를 포함하는 다수의 전기 도전 흔적(14)을 형성하고, 적어도 한개의 패널 소자상에 적어도 한개의 부품 접속 영역을 규정하기 위해 폴리머를 건조시키는 단계로 이루어진 회로 패널 어셈블리 제조방법에 있어서, 상기 각 부품 접속 영역(15)과 전기 도전 흔적(14)의 부분을 커버하는 비등방성 도전 접착층(24)을 형성하기 위해 진행기판상으로 비도전 열가소성 수지 바인더내에 분산된 도전 입자의 액체 접착 혼합물을 인가시키고 그후 액체 비등방성 도전 접착 혼합물을 건조시키는 단계와, 상기 부품 접속 영역 각각의 외부에 전기 도전 흔적의 부분을 보호성으로 커버하기 위해 상기 각 부품 접속 영역 부분 외부의 진행 기판의 부분상에 커버층(18)을 배치시키는 단계를 더 구비하여, 이에 의해, 전기 부품이 땜납기 사용없이 접촉 부재 장착 패드에 전기적으로 접속되는 것을 특징으로 하는 회로 패널 어셈블리 제조 방법.Advancing the substrate along the travel path, applying a liquid electrically conductive polymer in a pattern on at least one surface of the advancing substrate to define one apparent panel element upon mixing along the substrate, each component connection area (15) forming a plurality of electrically conductive traces 14 comprising component contact member mounting pads extending into and drying the polymer to define at least one component connection area on at least one panel element. In the method of manufacturing a circuit panel assembly, the components are dispersed in a non-conductive thermoplastic resin binder on an advancing substrate to form an anisotropic conductive adhesive layer 24 covering the component connection regions 15 and portions of the electrically conductive traces 14. Applying a liquid adhesive mixture of conductive particles, and then drying the liquid anisotropic conductive adhesive mixture; Further comprising arranging a cover layer 18 on the portion of the traveling substrate outside the respective component connection region portions to protectively cover the portion of the electrically conductive traces outside of each component connection region. A method of manufacturing a circuit panel assembly, wherein the electrical component is electrically connected to the contact member mounting pad without the use of a soldering machine. 제25항에 있어서, 커버층(18)이 액체 유전 폴리머 재료인 것을 특징으로 하는 회로 패널 어셈블리 제조 방법.26. The method of claim 25, wherein the cover layer (18) is a liquid dielectric polymer material. 제25항에 있어서, 커버층(18)이 유연한 플라스틱 필름인 것을 특징으로 하는 회로 패널 어셈블리 제조 방법.A method according to claim 25, wherein the cover layer (18) is a flexible plastic film. 제26항 또는 제27항에 있어서, 커버층의 표면상에 패턴으로 액체 전기 도전 플리머를 인가시키는 단계와, 다수의 도전 흔적을 형성하기 위해 폴리머를 건조 시키는 단계와, 전기 도전 흔적의 부분을 보호성으로 커버시키기 위해 상기 흔적중 소정의 부분을 거쳐 부가적인 커버층을 배치시키는 단계를 더 구비하며, 그에 의해, 다층 회로 패널 어셈블리가 땜납기의 사용없이 이루어지는 전기 접속에 의해 형성되는 것을 특징으로 하는 회로 패널 어셈블리 제조 방법.28. The method of claim 26 or 27, further comprising: applying a liquid electrically conductive primer in a pattern on the surface of the cover layer, drying the polymer to form a plurality of conductive traces, and removing portions of the electrically conductive traces. Disposing an additional cover layer over a predetermined portion of the trace to cover it protectively, whereby the multilayer circuit panel assembly is formed by an electrical connection made without the use of a soldering machine. Circuit panel assembly manufacturing method. 제26항 또는 제27항에 있어서, 기판이 유연한 기판의 연속 스트립이며, 회로 패널 어셈블리가 직렬로 상호 접속되며, 미리 형성된 어셈블리의 스트립(310)을 형성하기 위해 제조되는 것을 특징으로 하는 회로 패널 어셈블리 제조 방법.28. The circuit panel assembly of claim 26 or 27, wherein the substrate is a continuous strip of flexible substrate and the circuit panel assemblies are interconnected in series and fabricated to form strips 310 of preformed assemblies. Manufacturing method. 제29항에 있어서, 평행의 중첩되고 이간된 이동 통로를 따라 다수의 유연한 플라스틱 필름 기판을 진행시키는 단계와, 전기 도전 흔적의 부분을 커버하는 도전 접착층을 형성하기 위해 진행기판의 적어도 마주보는 표면중 일부상으로 비도전 열가소성 수지 바인더내에 분산된 도전 입자의 액체 접착 혼합물을 인가시키기는 단계와, 각 인접한 쌍의 기판의 배열된 흔적을 전기적으로 상호 접속시키는 도전 접착물과 직렬로 상호 접속된 다층 회로 패널 어셈블리의 스트립(334)을 형성하기 위해 일치된 패널 소자와 함께 진행 기판을 중첩된 인접 관계로 안내하는 단계를 더 구비하는 것을 특징으로 하는 회로 패널 어셈블리 제조방법.30. The method of claim 29, further comprising: advancing a plurality of flexible plastic film substrates along parallel overlapping and spaced movement passages and at least opposite surfaces of the advancing substrate to form a conductive adhesive layer covering portions of the electrically conductive traces. Applying a liquid adhesive mixture of conductive particles dispersed in a non-conductive thermoplastic resin binder in part, and the multilayer circuit interconnected in series with the conductive adhesive electrically interconnecting the arranged traces of each adjacent pair of substrates And guiding the advancing substrate in superimposed adjacent relationship with the matched panel element to form a strip (334) of the panel assembly. 제29항 또는 제30항에 있어서, 패널 소자를 분리시키고, 분리된 유연한 패널 어셈블리를 형성하기 위해 반복된 패턴 사이에 기판을 엄격히 처리하는 단계를 더 구비하는 것을 특징으로 하는 패널 어셈블리 제조 방법.31. The method of claim 29 or 30, further comprising the step of strictly treating the substrate between repeated patterns to separate the panel elements and form a separate flexible panel assembly. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR860700952A 1985-04-30 1986-03-31 Circuit panel assembly and its manufacturing method Withdrawn KR880700617A (en)

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US72889685A 1985-04-30 1985-04-30
US72889585A 1985-04-30 1985-04-30
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US72871485A 1985-04-30 1985-04-30
US728.896? 1985-04-30
US728.894? 1985-04-30
US728.895? 1985-04-30
US729.018? 1985-04-30
US728.714? 1985-04-30
PCT/US1986/000641 WO1986006573A1 (en) 1985-04-30 1986-03-31 Circuit panel without soldered connections and method of fabricating the same

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US4749120A (en) * 1986-12-18 1988-06-07 Matsushita Electric Industrial Co., Ltd. Method of connecting a semiconductor device to a wiring board
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Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 19861229

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