KR880700614A - 종단 회로의 배선 구조 - Google Patents
종단 회로의 배선 구조Info
- Publication number
- KR880700614A KR880700614A KR1019860700477A KR860700477A KR880700614A KR 880700614 A KR880700614 A KR 880700614A KR 1019860700477 A KR1019860700477 A KR 1019860700477A KR 860700477 A KR860700477 A KR 860700477A KR 880700614 A KR880700614 A KR 880700614A
- Authority
- KR
- South Korea
- Prior art keywords
- wiring structure
- termination circuit
- termination
- circuit
- wiring
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5383—Multilayer substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15192—Resurf arrangement of the internal vias
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09218—Conductive traces
- H05K2201/09227—Layout details of a plurality of traces, e.g. escape layout for Ball Grid Array [BGA] mounting
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09627—Special connections between adjacent vias, not for grounding vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10431—Details of mounted components
- H05K2201/10507—Involving several components
- H05K2201/10522—Adjacent components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10689—Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4623—Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Wire Bonding (AREA)
- Multi-Conductor Connections (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP84-253562 | 1984-11-29 | ||
JP59253562A JPS61131498A (ja) | 1984-11-29 | 1984-11-29 | 終端回路配線構造 |
PCT/JP1985/000661 WO1986003365A1 (en) | 1984-11-29 | 1985-11-28 | Wiring structure of a terminal circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
KR880700614A true KR880700614A (ko) | 1988-03-15 |
KR900005305B1 KR900005305B1 (ko) | 1990-07-27 |
Family
ID=17253090
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019860700477A KR900005305B1 (ko) | 1984-11-29 | 1985-11-28 | 종단 회로의 배선 구조 |
Country Status (8)
Country | Link |
---|---|
US (1) | US4785141A (ko) |
EP (1) | EP0204004B1 (ko) |
JP (1) | JPS61131498A (ko) |
KR (1) | KR900005305B1 (ko) |
AU (1) | AU580828B2 (ko) |
BR (1) | BR8507078A (ko) |
DE (1) | DE3585445D1 (ko) |
WO (1) | WO1986003365A1 (ko) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63195772U (ko) * | 1987-06-05 | 1988-12-16 | ||
US5001605A (en) * | 1988-11-30 | 1991-03-19 | Hughes Aircraft Company | Multilayer printed wiring board with single layer vias |
DE8903913U1 (de) * | 1989-03-30 | 1989-05-18 | Siemens AG, 1000 Berlin und 8000 München | Leiterplattenförmiges Busverdrahtungsfeld |
JPH04109838U (ja) * | 1991-03-08 | 1992-09-24 | オークマ株式会社 | パレツト交換装置におけるパレツト把持装置 |
US5117331A (en) * | 1991-05-16 | 1992-05-26 | Compaq Computer Corporation | Bus control signal routing and termination |
US5175515A (en) * | 1991-06-21 | 1992-12-29 | Compaq Computer Corporation | Signal routing technique for electronic systems |
US5414219A (en) * | 1994-04-22 | 1995-05-09 | At&T Corp. | Printed circuit board circuit control device |
US7269028B2 (en) * | 1997-10-16 | 2007-09-11 | Celestica, Inc. | Trace-pad interface for improved signal quality |
WO2017048232A1 (en) * | 2015-09-15 | 2017-03-23 | Hewlett Packard Enterprise Development Lp | Printed circuit board including through-hole vias |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3243498A (en) * | 1964-12-24 | 1966-03-29 | Ibm | Method for making circuit connections to internal layers of a multilayer circuit card and circuit card produced thereby |
FR2241946B1 (ko) * | 1973-08-24 | 1976-11-19 | Honeywell Bull Soc Ind | |
JPS53129863A (en) * | 1977-04-19 | 1978-11-13 | Fujitsu Ltd | Multilayer printed board |
FR2404990A1 (fr) * | 1977-10-03 | 1979-04-27 | Cii Honeywell Bull | Substrat d'interconnexion de composants electroniques a circuits integres, muni d'un dispositif de reparation |
US4245273A (en) * | 1979-06-29 | 1981-01-13 | International Business Machines Corporation | Package for mounting and interconnecting a plurality of large scale integrated semiconductor devices |
FR2555011B1 (fr) * | 1983-11-15 | 1986-01-24 | Thomson Csf | Carte imprimee a empreintes |
JPS60136294A (ja) * | 1983-12-23 | 1985-07-19 | 株式会社日立製作所 | セラミック多層配線回路板 |
US4562513A (en) * | 1984-05-21 | 1985-12-31 | International Business Machines Corporation | Process for forming a high density metallurgy system on a substrate and structure thereof |
US4546413A (en) * | 1984-06-29 | 1985-10-08 | International Business Machines Corporation | Engineering change facility on both major surfaces of chip module |
JPS61131497A (ja) * | 1984-11-29 | 1986-06-19 | 富士通株式会社 | 多層プリント基板 |
-
1984
- 1984-11-29 JP JP59253562A patent/JPS61131498A/ja active Granted
-
1985
- 1985-11-28 KR KR1019860700477A patent/KR900005305B1/ko not_active IP Right Cessation
- 1985-11-28 AU AU51938/86A patent/AU580828B2/en not_active Ceased
- 1985-11-28 EP EP85906087A patent/EP0204004B1/en not_active Expired - Lifetime
- 1985-11-28 DE DE8585906087T patent/DE3585445D1/de not_active Expired - Lifetime
- 1985-11-28 BR BR8507078A patent/BR8507078A/pt not_active IP Right Cessation
- 1985-11-28 WO PCT/JP1985/000661 patent/WO1986003365A1/ja active IP Right Grant
-
1987
- 1987-11-18 US US07/124,418 patent/US4785141A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US4785141A (en) | 1988-11-15 |
AU580828B2 (en) | 1989-02-02 |
DE3585445D1 (de) | 1992-04-02 |
AU5193886A (en) | 1986-06-18 |
EP0204004B1 (en) | 1992-02-26 |
JPS61131498A (ja) | 1986-06-19 |
KR900005305B1 (ko) | 1990-07-27 |
EP0204004A4 (en) | 1987-07-30 |
EP0204004A1 (en) | 1986-12-10 |
JPH0227836B2 (ko) | 1990-06-20 |
WO1986003365A1 (en) | 1986-06-05 |
BR8507078A (pt) | 1987-03-31 |
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Legal Events
Date | Code | Title | Description |
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A201 | Request for examination | ||
PA0109 | Patent application |
Patent event code: PA01091R01D Comment text: Patent Application Patent event date: 19860718 |
|
PA0201 | Request for examination |
Patent event code: PA02012R01D Patent event date: 19860718 Comment text: Request for Examination of Application |
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PG1501 | Laying open of application | ||
E902 | Notification of reason for refusal | ||
PE0902 | Notice of grounds for rejection |
Comment text: Notification of reason for refusal Patent event date: 19900130 Patent event code: PE09021S01D |
|
G160 | Decision to publish patent application | ||
PG1605 | Publication of application before grant of patent |
Comment text: Decision on Publication of Application Patent event code: PG16051S01I Patent event date: 19900626 |
|
E701 | Decision to grant or registration of patent right | ||
PE0701 | Decision of registration |
Patent event code: PE07011S01D Comment text: Decision to Grant Registration Patent event date: 19901018 |
|
GRNT | Written decision to grant | ||
PR0701 | Registration of establishment |
Comment text: Registration of Establishment Patent event date: 19901102 Patent event code: PR07011E01D |
|
PR1002 | Payment of registration fee |
Payment date: 19901102 End annual number: 3 Start annual number: 1 |
|
FPAY | Annual fee payment |
Payment date: 19930507 Year of fee payment: 4 |
|
PR1001 | Payment of annual fee |
Payment date: 19930507 Start annual number: 4 End annual number: 4 |
|
LAPS | Lapse due to unpaid annual fee | ||
PC1903 | Unpaid annual fee |