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KR860700202A - 도전회로의 형성법 - Google Patents

도전회로의 형성법

Info

Publication number
KR860700202A
KR860700202A KR1019860700066A KR860700066A KR860700202A KR 860700202 A KR860700202 A KR 860700202A KR 1019860700066 A KR1019860700066 A KR 1019860700066A KR 860700066 A KR860700066 A KR 860700066A KR 860700202 A KR860700202 A KR 860700202A
Authority
KR
South Korea
Prior art keywords
formation
conductive circuit
conductive
circuit
Prior art date
Application number
KR1019860700066A
Other languages
English (en)
Other versions
KR900000510B1 (ko
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of KR860700202A publication Critical patent/KR860700202A/ko
Application granted granted Critical
Publication of KR900000510B1 publication Critical patent/KR900000510B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
    • H05K1/053—Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an inorganic insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/017—Glass ceramic coating, e.g. formed on inorganic substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0502—Patterning and lithography
    • H05K2203/0531—Decalcomania, i.e. transfer of a pattern detached from its carrier before affixing the pattern to the substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Surface Heating Bodies (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
KR1019860700066A 1984-06-14 1985-06-12 도전회로의 형성법 KR900000510B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP59120648A JPS611088A (ja) 1984-06-14 1984-06-14 導電回路の形成法
JP??59120648 1984-06-14
PCT/JP1985/000327 WO1986000190A1 (en) 1984-06-14 1985-06-12 Method of forming electrically conductive circuit

Publications (2)

Publication Number Publication Date
KR860700202A true KR860700202A (ko) 1986-03-31
KR900000510B1 KR900000510B1 (ko) 1990-01-31

Family

ID=14791424

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019860700066A KR900000510B1 (ko) 1984-06-14 1985-06-12 도전회로의 형성법

Country Status (4)

Country Link
US (1) US4694573A (ko)
JP (1) JPS611088A (ko)
KR (1) KR900000510B1 (ko)
WO (1) WO1986000190A1 (ko)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4867839A (en) * 1987-09-04 1989-09-19 Shinko Electric Industries Co., Ltd. Process for forming a circuit substrate
US6549193B1 (en) 1998-10-09 2003-04-15 3M Innovative Properties Company Touch panel with improved linear response and minimal border width electrode pattern
US6233817B1 (en) * 1999-01-17 2001-05-22 Delphi Technologies, Inc. Method of forming thick-film hybrid circuit on a metal circuit board
US6280552B1 (en) * 1999-07-30 2001-08-28 Microtouch Systems, Inc. Method of applying and edge electrode pattern to a touch screen and a decal for a touch screen
US20030134095A1 (en) * 2002-01-16 2003-07-17 Bottari Frank J Method of applying an edge electrode pattern to a touch screen
US20010028343A1 (en) * 2000-02-02 2001-10-11 Bottari Frank J. Touch panel with an integral wiring harness
US7321362B2 (en) 2001-02-01 2008-01-22 3M Innovative Properties Company Touch screen panel with integral wiring traces
US6651461B2 (en) 2001-05-31 2003-11-25 3M Innovative Properties Company Conveyor belt
US6488981B1 (en) 2001-06-20 2002-12-03 3M Innovative Properties Company Method of manufacturing a touch screen panel
US6809269B2 (en) * 2002-12-19 2004-10-26 Endicott Interconnect Technologies, Inc. Circuitized substrate assembly and method of making same
US7845147B2 (en) 2006-02-20 2010-12-07 Frito-Lay North America, Inc. Method for producing a detachably connected container having barrier properties
JP5245600B2 (ja) * 2008-07-16 2013-07-24 株式会社リコー 転写用紙、転写用紙の製造装置および転写用紙基材
JP5262757B2 (ja) * 2009-01-27 2013-08-14 株式会社リコー 転写用紙及びその製造方法、並びに機能性薄膜の製造方法
KR101489159B1 (ko) * 2011-12-23 2015-02-05 주식회사 잉크테크 금속 인쇄회로기판의 제조방법
EP3028549B1 (en) * 2013-07-29 2018-06-13 Ferro Corporation Conductive trace and method of forming conductive trace
CN110972398A (zh) * 2019-12-11 2020-04-07 芜湖雅葆轩电子科技股份有限公司 免贴耐高温材料pcb板加工工艺

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3729819A (en) * 1970-01-09 1973-05-01 Nippon Toki Kk Method and device for fabricating printed wiring or the like
US3870776A (en) * 1973-01-02 1975-03-11 Metalized Ceramics Corp Method for making ceramic-metal structures
JPS4993862A (ko) * 1973-01-10 1974-09-06
JPS5428798B2 (ko) * 1973-06-28 1979-09-19
CH592906B5 (ko) * 1974-06-18 1977-11-15 Nivarox Sa
JPS5111160A (en) * 1974-07-18 1976-01-29 Matsushita Electric Ind Co Ltd Tenshahonyoru atsumakukairobuhinno seizohoho
JPS5824913B2 (ja) * 1979-02-21 1983-05-24 株式会社日立製作所 管状導体の電気接続部の製造方法
JPS5610995A (en) * 1979-07-06 1981-02-03 Alps Electric Co Ltd Method of forming circuit board
JPS58202585A (ja) * 1982-05-21 1983-11-25 三菱電機株式会社 プリント配線板の製造方法
WO1984000275A1 (en) * 1982-06-24 1984-01-19 Matsushita Electric Ind Co Ltd Panel heater

Also Published As

Publication number Publication date
US4694573A (en) 1987-09-22
WO1986000190A1 (en) 1986-01-03
JPS611088A (ja) 1986-01-07
JPH0436599B2 (ko) 1992-06-16
KR900000510B1 (ko) 1990-01-31

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Legal Events

Date Code Title Description
A201 Request for examination
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 19860205

PA0201 Request for examination

Patent event code: PA02012R01D

Patent event date: 19860205

Comment text: Request for Examination of Application

PG1501 Laying open of application
G160 Decision to publish patent application
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Comment text: Decision on Publication of Application

Patent event code: PG16051S01I

Patent event date: 19891221

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

Patent event code: PE07011S01D

Comment text: Decision to Grant Registration

Patent event date: 19900420

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