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KR880001114A - 오프셋 자동 보정 a/d 변환회로 - Google Patents

오프셋 자동 보정 a/d 변환회로 Download PDF

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Publication number
KR880001114A
KR880001114A KR870005713A KR870005713A KR880001114A KR 880001114 A KR880001114 A KR 880001114A KR 870005713 A KR870005713 A KR 870005713A KR 870005713 A KR870005713 A KR 870005713A KR 880001114 A KR880001114 A KR 880001114A
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KR
South Korea
Prior art keywords
code
output
input analog
conversion circuit
analog voltage
Prior art date
Application number
KR870005713A
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English (en)
Other versions
KR950010397B1 (ko
Inventor
쥰 다까야마
다께시 니노미야
Original Assignee
오오가 노리오
소니가부시끼 가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 오오가 노리오, 소니가부시끼 가이샤 filed Critical 오오가 노리오
Publication of KR880001114A publication Critical patent/KR880001114A/ko
Application granted granted Critical
Publication of KR950010397B1 publication Critical patent/KR950010397B1/ko

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0602—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic
    • H03M1/0604—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic at one point, i.e. by adjusting a single reference value, e.g. bias or gain error
    • H03M1/0607—Offset or drift compensation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

내용 없음

Description

오프셋 자동 보정 A/D 변환회로
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 오프셋 자동 보정 A/D 변환 회로의 원리를 도시하는 블럭회로도. 제2도는 제1도의 귀환 회로의 일실시예를 도시하는 회로도. 제3A도는 제1도의 회로의 입출력의 특성도.

Claims (4)

  1. 일력 아날로그 전압의 특정 레벨과 상기 입력 아날로그 전압에 대응하는 출력 디지탈 값의 특정 출력 코드 사이의 오프셋 에러를 자동적으로 보상하는 바이폴라 A/D 변환기 회로에 있어서, 1.LSB 이상의 잔류 노이즈를 포함하는 입력 아날로그 전압을 출력 디지탈 값으로 변환시키는 A/D변환기와, 상기 출력 디지탈 값에 따라 상기 출력 디지탈 값의 특별 출력 코드보다 크거나 작은 코드의 발생 가능성을 서로 같게하기 위하여 입력 아날로그 전압에 보상 전압을 부가시키는 귀환회로를 구비한 것을 특징으로 하는 오프셋 자동 보정 A/D변환회로.
  2. 제1항에 있어서, 상기 특정 레벨이 입력 아날로그 전압의 영 레벨이고, 상기 특정 출력 코드는 영 값 코드인 것을 특징으로 하는 오프셋 자동 보정 A/D변환회로.
  3. 제2항에 있어서, 상기 귀환 회로에 상기 입력 아날로그 전압에 적분된 출력이 복귀되도록 상기 영 값 코드를 제외한 출력 코드의 MSB를 적분하는 적분기가 제공되는 것을 특징으로 하는 오프셋 자동 보정 A/D변환회로.
  4. 제2항에 있어서, 상기 귀환 회로에 적분된 출력을 입력 아날로그 전압에 복귀시키토록 영 값 코드보다 크거나 작은 +1LSB와 -LSB에서 천이 위치를 가지는 히스테리시스 회로가 제공되는 것을 특징으로 하는 오프셋 자동 보정 A/D변환회로.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019870005713A 1986-06-07 1987-06-05 오프셋 자동 보정 a/d 변환 회로 KR950010397B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP132205 1986-06-07
JP61132205A JPH0758907B2 (ja) 1986-06-07 1986-06-07 オフセツト自動補正ａ／ｄ変換回路

Publications (2)

Publication Number Publication Date
KR880001114A true KR880001114A (ko) 1988-03-31
KR950010397B1 KR950010397B1 (ko) 1995-09-16

Family

ID=15075849

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019870005713A KR950010397B1 (ko) 1986-06-07 1987-06-05 오프셋 자동 보정 a/d 변환 회로

Country Status (6)

Country Link
US (1) US4766417A (ko)
JP (1) JPH0758907B2 (ko)
KR (1) KR950010397B1 (ko)
DE (1) DE3718937C2 (ko)
FR (1) FR2599913B1 (ko)
GB (1) GB2191354B (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100333556B1 (ko) * 1999-11-10 2002-04-22 윤종용 키폰시스템의 용량 증가에 따른 전원보상장치

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4965867A (en) * 1987-08-20 1990-10-23 Pioneer Electronic Corporation Offset compensation circuit
JP2924373B2 (ja) * 1990-11-02 1999-07-26 日本電気株式会社 Ａ／ｄ変換回路
US5523756A (en) * 1994-01-18 1996-06-04 The Grass Valley Group, Inc. Analog-to-digital converter with offset reduction loop
US5583934A (en) * 1995-03-03 1996-12-10 Advanced Micro Devices, Inc. DC level control for an electronic telephone line card
DE19514007C1 (de) * 1995-04-13 1996-09-12 Wandel & Goltermann Verfahren zur Verbesserung des Klirrverhaltens von Analog-Digitalwandlern
US5685149A (en) * 1995-11-14 1997-11-11 Tcam Technologies, Inc. Proportionally controlled thermochemical mechanical actuator
SE514770C2 (sv) * 1999-05-25 2001-04-23 Ericsson Telefon Ab L M Förfarande och arrangemang för korrigering av offsetfel vid A/D-omvandling
AU1493801A (en) 1999-09-27 2001-04-30 Parthus Technologies Plc Method and apparatus for identifying a pre-determined pattern from a received signal via correlation
US7242330B2 (en) * 2003-12-17 2007-07-10 Texas Instruments Incorporated Dynamic compensation of analog-to-digital converter (ADC) offset errors using filtered PWM
JP2010199799A (ja) * 2009-02-24 2010-09-09 Renesas Electronics Corp アナログデジタル変換回路
JP5406145B2 (ja) * 2010-08-31 2014-02-05 日立オートモティブシステムズ株式会社 電流制御用半導体素子、およびそれを用いた制御装置
JP5395127B2 (ja) 2011-07-14 2014-01-22 日立オートモティブシステムズ株式会社 電流制御用半導体素子およびそれを用いた制御装置
JP5706502B2 (ja) * 2013-10-24 2015-04-22 日立オートモティブシステムズ株式会社 電子制御装置

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1366812A (fr) * 1963-05-06 1964-07-17 Labo Cent Telecommunicat Perfectionnements aux dispositifs de codage à réaction
GB1113700A (en) * 1966-11-22 1968-05-15 Standard Telephones Cables Ltd Encoders for electrical signals
SE369338B (ko) * 1973-04-11 1974-08-19 Munters Ab Carl
IT1017612B (it) * 1974-05-15 1977-08-10 Sits Soc It Telecom Siemens Mono codecodificatore in particola re per sistemi telefonici a divisio ne di tempo
US3953805A (en) * 1974-11-07 1976-04-27 Texas Instruments Incorporated DC component suppression in zero CF IF systems
US4186384A (en) * 1975-06-24 1980-01-29 Honeywell Inc. Signal bias remover apparatus
JPS5318373A (en) * 1976-08-04 1978-02-20 Fujitsu Ltd Drift compensation system of a/d conversion circuit
FR2396463A1 (fr) * 1977-06-30 1979-01-26 Ibm France Circuit pour compenser les decalages du zero dans les dispositifs analogiques et application de ce circuit a un convertisseur analogique-numerique
JPS5952576B2 (ja) * 1979-07-13 1984-12-20 株式会社東芝 Ａ／ｄ変換器の安定化回路
JPS59181719A (ja) * 1983-03-31 1984-10-16 Fujitsu Ltd オフセツト補償回路
US4602374A (en) * 1984-02-27 1986-07-22 Nippon Telegraph & Telephone Public Corporation Multi-level decision circuit
US4672359A (en) * 1985-11-12 1987-06-09 Trw Inc. Superconducting analog-to-digital converter and digital magnetometer and related method for its use
EP0237583B1 (de) * 1986-02-07 1989-11-29 Hottinger Baldwin Messtechnik Gmbh Verfahren und Schaltungsanordnung zum Umsetzen einer Messspannung in einen digitalen Wert

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100333556B1 (ko) * 1999-11-10 2002-04-22 윤종용 키폰시스템의 용량 증가에 따른 전원보상장치

Also Published As

Publication number Publication date
KR950010397B1 (ko) 1995-09-16
GB2191354A (en) 1987-12-09
JPH0758907B2 (ja) 1995-06-21
FR2599913A1 (fr) 1987-12-11
US4766417A (en) 1988-08-23
DE3718937C2 (de) 1995-07-27
FR2599913B1 (fr) 1994-05-27
GB2191354B (en) 1990-08-01
JPS62289016A (ja) 1987-12-15
GB8712938D0 (en) 1987-07-08
DE3718937A1 (de) 1987-12-10

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