KR20220070841A - Apparatus and method for changing waveform mode at high speed - Google Patents

Abstract

According to an exemplary embodiment of the present invention, an apparatus and method for changing a waveform mode at high speed can operate a high pulse repetition frequency (PRF) through simplification of a protocol and perform real-time signal processing by changing values of a plurality of transmission registers and a plurality of reception registers into values according to an operation waveform mode at once.

Description

Apparatus and method for changing waveform mode at high speed

The present invention relates to an apparatus and method for changing a high-speed waveform mode, and more particularly, to an apparatus and method for changing a value of a register to control transmission/reception control timing according to an operation waveform mode.

FIG. 1 is a diagram for explaining transmission/reception control timing, FIG. 2 is a diagram for explaining a conventional transmission/reception timing control system, and FIG. 3 is a diagram for explaining a conventional transmission/reception control timing setting process.

Referring to FIG. 1 , it is necessary to complete the setting of the transmission/reception control command for the N+1-th transmission pulse section in the N-th reception section, which is between the N-th transmission pulse section and the N+1-th transmission pulse section.

In the conventional transmission/reception timing control system as shown in FIG. 2, to complete the setting of the transmission/reception control command (eg, the setting command according to the operation mode #N) for the N+1th transmission pulse section, FPGA (Field Programmable Gate) Array) transmit register set, each value of n+1 Tx Registers (T00, T01, ..., Tn-1, Tn) must be set to a value according to operation mode #N, and receive register set n+ Each value of one Rx Register (R00, R01, ..., Rn-1, Rn) must be set to a value according to operation mode #N.

For example, as shown in FIG. 3, in the N-th reception section, N Tx Registers (TxREG_01, TxREG_02, ..., TxREG_N) and M Rx Registers (RxREG_01, RxREG_02, ..., Each value of RxREG_M) must be set to a value according to the operation mode before the N+1th transmission pulse section.

However, the conventional transmission/reception timing control system has limitations in terms of high pulse repetition frequency (PRF) operation and real-time signal processing. The high pulse repetition frequency (high PRF) has a relatively short register setting time compared to the low pulse repetition frequency (low PRF), and it is necessary to set up different operating waveform modes and transmit/receive pulse timing within the pulse repetition interval (PRI) time. do. In order to perform real-time signal processing (eg, driving a detection/tracking algorithm in real time), it is necessary to reduce the share of a communication task of a processor for setting a register. That is, it is necessary to secure the operation timing margin of the signal processing task of the processor (CPU, DSP, etc.).

SUMMARY OF THE INVENTION It is an object of the present invention to provide a high-speed waveform mode changing apparatus and method for changing all values of a plurality of transmit registers and a plurality of receive registers to values according to an operating waveform mode at once.

Other objects not specified in the present invention may be additionally considered within the scope that can be easily inferred from the following detailed description and effects thereof.

According to a preferred embodiment of the present invention for achieving the above object, there is provided an apparatus for changing a high-speed waveform mode, comprising: a storage unit including a plurality of transmit registers and a plurality of receive registers; a transmission/reception timing check unit for checking transmission timing and reception timing for each operation waveform mode, and acquiring values of the plurality of transmission registers and the plurality of reception registers for each operation waveform mode; Values of each of the plurality of transmission registers and the plurality of reception registers for each operation waveform mode obtained through the transmission/reception timing check unit by using the value of one of the plurality of transmission registers and the plurality of reception registers as a reference value a transmit/receive register setting unit for obtaining , in the form of the reference value + a fixed value, and setting the values of the plurality of transmit registers and the plurality of receive registers in the form of the reference value + the fixed value; and an operation mode change unit configured to change the reference value that is the value of the one reference register according to the changed operation waveform mode when the operation waveform mode is changed, wherein when the reference value that is the value of the one reference register is changed, Values of the remaining registers except for the one reference register among the plurality of transmit registers and the plurality of receive registers are also automatically changed.

Here, the storage unit may store the fixed values for each of the plurality of transmit registers and the plurality of receive registers for each operation waveform mode.

Here, the operation mode changing unit changes the values of the plurality of transmission registers and the plurality of reception registers for the operation waveform mode of the n-1 th transmission period at once by executing the register control function once in the n-th reception section. A pulse for the n-1 th transmission period may be controlled, and the register control function may use the operating waveform mode, the reference register, and the reference value as input parameters.

Here, the transmission/reception timing check unit obtains the initial values of the plurality of transmission registers by checking the delay characteristics of the transmitter and the frequency synthesizer, and repeatedly tests to determine the optimal driving timing of the amplifier to determine the optimal driving timing of the plurality of transmissions. By checking the optimum value of the register, the transmission timing is checked for each operation waveform mode, the delay characteristic of the receiver is checked to obtain the initial values of the plurality of reception registers, and the transmission signal leakage section is avoided. By repeatedly testing to determine the timing of the receive signal protection gate and the signal generation time of the local oscillator (LO) for The reception timing may be checked.

Here, the transmission/reception timing check unit, based on the user request information including the operation waveform mode, pulse repetition frequency (PRF) and control timing information, the initial value of the plurality of transmission registers and the plurality of reception registers An initial value is obtained, and actual data obtained from an actual signal generated when the plurality of transmission registers and the plurality of reception registers are set as initial values is compared with the requested data obtained from the user request information, and if there is an error, the By repeatedly testing the process of adjusting the values of the plurality of transmit registers and the values of the plurality of receive registers, the optimal values of the plurality of transmit registers and the optimal values of the plurality of receive registers can be obtained for each operation waveform mode. .

Here, the transmission/reception timing check unit obtains the actual data for a start delay, a frequency, and a duty from the actual signal, and a start delay, a frequency from the user request information The requested data for (frequency) and duty (duty) may be obtained, and an error may be confirmed by comparing the actual data with the requested data.

A high-speed waveform mode changing method according to a preferred embodiment of the present invention for achieving the above object is a high-speed waveform mode changing method performed by a high-speed waveform mode changing device including a plurality of transmit registers and a plurality of receive registers, confirming transmission timing and reception timing for each operating waveform mode, and acquiring values of the plurality of transmission registers and the plurality of reception registers for each operation waveform mode; Each value of the plurality of transmission registers and the plurality of reception registers for each operation waveform mode obtained by using the value of one of the plurality of transmission registers and the plurality of reception registers as a reference value is the reference value + fixed acquiring in the form of a value, and setting the values of the plurality of transmit registers and the plurality of receive registers in the form of the reference value + the fixed value; and changing the reference value that is the value of the one reference register according to the changed operation waveform mode when the operation waveform mode is changed, and when the reference value that is the value of the one reference register is changed, the plurality of Values of the other registers except for the one reference register among the transmit register and the plurality of receive registers are also automatically changed.

Here, in the changing step, by executing the register control function once in the nth reception section, the values of the plurality of transmission registers and the plurality of reception registers for the operation waveform mode of the n-1th transmission section are changed at once It consists of controlling a pulse for an n-1 th transmission section, and the register control function may use the operating waveform mode, the reference register, and the reference value as input parameters.

Here, in the acquiring step, the initial values of the plurality of transmission registers are obtained by checking the delay characteristics of the transmitter and the frequency synthesizer, and the plurality of transmission registers are repeatedly tested to determine the optimal driving timing of the amplifier. By checking the optimum value of , the transmission timing is checked for each operation waveform mode, and the initial values of the plurality of reception registers are obtained by checking the delay characteristics of the receiver, and the transmission signal leakage period is avoided. Through iterative tests to determine the timing of a reception signal protection gate and a signal generation time of a local oscillator (LO), and confirming the optimal values of the plurality of reception registers, the operation waveform mode This may be accomplished by checking the reception timing.

Here, the acquiring step is based on the user request information including the operation waveform mode, pulse repetition frequency (PRF) and control timing information, the initial values of the plurality of transmission registers and the initial values of the plurality of reception registers value is obtained, and actual data obtained from an actual signal generated in a state in which the plurality of transmission registers and the plurality of reception registers are set to initial values is compared with the requested data obtained from the user request information, and if there is an error, the plurality of Obtaining the optimal values of the plurality of transmit registers and the optimal values of the plurality of receive registers for each operation waveform mode by repeatedly testing the process of adjusting the values of the transmit registers and the values of the plurality of receive registers have.

Here, the acquiring step includes acquiring the real data for a start delay, a frequency and a duty from the real signal, and a start delay, a frequency ( frequency) and duty (duty) may be obtained, and the error may be confirmed by comparing the actual data with the requested data.

A computer program according to a preferred embodiment of the present invention for achieving the above technical problem is stored in a computer-readable recording medium, and any one of the above-described high-speed waveform mode changing methods is executed in the computer.

According to the apparatus and method for changing a high-speed waveform mode according to a preferred embodiment of the present invention, the values of the plurality of transmit registers and the plurality of receive registers are changed all at once to values according to the operation waveform mode, thereby simplifying the communication protocol and providing a high pulse rate. A pulse repetition frequency (PRF) operation is possible, and real-time signal processing can be performed.

Effects of the present invention are not limited to the above-mentioned effects, and other effects not mentioned will be clearly understood by those skilled in the art from the following description.

1 is a diagram for explaining transmission/reception control timing.
2 is a diagram for explaining a conventional transmission/reception timing control system.
3 is a view for explaining a conventional setting process of transmission/reception control timing.
4 is a block diagram illustrating an apparatus for changing a high-speed waveform mode according to a preferred embodiment of the present invention.
5 is a diagram for explaining an example of a transmission/reception register setting process according to a preferred embodiment of the present invention.
6 is a diagram for explaining an example of a transmission/reception timing control system according to a preferred embodiment of the present invention.
7 is a diagram for explaining an example of a process of setting transmission/reception control timing according to a preferred embodiment of the present invention.
8 is a flowchart illustrating a method of changing a high-speed waveform mode according to a preferred embodiment of the present invention.
9 is a flowchart for explaining the detailed steps of the acquisition step shown in FIG. 8 .

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. Advantages and features of the present invention, and a method for achieving them will become apparent with reference to the embodiments described below in detail in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments published below, but may be implemented in various different forms, and only these embodiments make the publication of the present invention complete, and common knowledge in the art to which the present invention pertains It is provided to fully inform those who have the scope of the invention, and the present invention is only defined by the scope of the claims. Like reference numerals refer to like elements throughout.

Unless otherwise defined, all terms (including technical and scientific terms) used herein may be used with the meaning commonly understood by those of ordinary skill in the art to which the present invention belongs. In addition, terms defined in a commonly used dictionary are not to be interpreted ideally or excessively unless clearly defined in particular.

In the present specification, terms such as “first” and “second” are for distinguishing one component from other components, and the scope of rights should not be limited by these terms. For example, a first component may be termed a second component, and similarly, a second component may also be termed a first component.

In the present specification, identification symbols (eg, a, b, c, etc.) in each step are used for convenience of description, and identification symbols do not describe the order of each step, and each step is clearly Unless a specific order is specified, the order may differ from the specified order. That is, each step may occur in the same order as specified, may be performed substantially simultaneously, or may be performed in the reverse order.

In this specification, expressions such as “have”, “may have”, “include” or “may include” indicate the existence of a corresponding feature (eg, a numerical value, function, operation, or component such as a part). and does not exclude the presence of additional features.

In addition, the term '~ unit' as used herein means software or a hardware component such as a field-programmable gate array (FPGA) or ASIC, and '~ unit' performs certain roles. However, '-part' is not limited to software or hardware. '~' may be configured to reside on an addressable storage medium or may be configured to refresh one or more processors. Accordingly, as an example, '~' indicates components such as software components, object-oriented software components, class components, and task components, and processes, functions, properties, and procedures. , subroutines, segments of program code, drivers, firmware, microcode, circuitry, data structures and variables. The functions provided in the components and '~ units' may be combined into a smaller number of components and '~ units' or further separated into additional components and '~ units'.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a preferred embodiment of an apparatus and method for changing a high-speed waveform mode according to the present invention will be described in detail with reference to the accompanying drawings.

First, an apparatus for changing a high-speed waveform mode according to a preferred embodiment of the present invention will be described with reference to FIGS. 4 to 7 .

4 is a block diagram illustrating an apparatus for changing a high-speed waveform mode according to a preferred embodiment of the present invention, FIG. 5 is a view for explaining an example of a transmission/reception register setting process according to a preferred embodiment of the present invention, and FIG. It is a diagram for explaining an example of a transmission/reception timing control system according to a preferred embodiment of the present invention, and FIG. 7 is a diagram for explaining an example of a process for setting transmission/reception control timing according to a preferred embodiment of the present invention.

4, the high-speed waveform mode changing apparatus 100 according to a preferred embodiment of the present invention is mounted on a radar searcher (not shown) or the like, and sets the values of a plurality of transmission registers and a plurality of reception registers to the operation waveform mode. Change all values at once.

To this end, the high-speed waveform mode changing apparatus 100 may include a storage unit 110 , a transmission/reception timing check unit 130 , a transmission/reception register setting unit 150 , and an operation mode change unit 170 .

The storage unit 110 includes a plurality of transmission registers 111 and a plurality of reception registers 113 , and stores programs or data necessary for the operation of the high-speed waveform mode changing device 100 , and the high-speed waveform mode changing device ( 100) may store data generated according to the operation.

In particular, the plurality of transmission registers 110 and the plurality of reception registers 113 store values related to transmission/reception control timing according to the operation waveform mode of the high-speed waveform mode changing apparatus 100 .

The transmission/reception timing check unit 130 may check the transmission timing and reception timing for each operation waveform mode, and obtain values of the plurality of transmission registers 111 and the plurality of reception registers 113 for each operation waveform mode.

That is, the transmission/reception timing check unit 130 obtains initial values of the plurality of transmission registers 111 by checking the delay characteristics of the transmitter (not shown) and the frequency synthesizer (not shown), and an amplifier (not shown) By repeatedly testing to determine the optimal driving timing of the plurality of transmission registers 111 and confirming the optimal values of the plurality of transmission registers 111, the transmission timing can be checked for each operating waveform mode.

Then, the transmission/reception timing check unit 130 obtains initial values of the plurality of reception registers 113 by checking the delay characteristics of the receiver (not shown), and a reception signal protection gate for avoiding a transmission signal leakage section Iteratively tested to determine the timing of (gate) (not shown) and the signal generation time of a local oscillator (LO) (not shown) to confirm optimal values of the plurality of receiving registers 113 . Through this, it is possible to check the reception timing for each operating waveform mode.

In more detail, the transmission/reception timing check unit 130 is an initial value of the plurality of transmission registers 111 based on user request information including an operation waveform mode, a pulse repetition frequency (PRF), and control timing information. and initial values of the plurality of reception registers 113 may be obtained.

Then, the transmission/reception timing check unit 130 obtains from an actual signal generated in a state in which the plurality of transmission registers 111 and the plurality of reception registers 113 are set to specific values (eg, initial values, adjustment values, etc.). The process of adjusting the values of the plurality of transmission registers 111 and the values of the plurality of reception registers 113 is repeatedly tested by comparing the actual data with the requested data obtained from the user request information and if there is an error, the plurality of transmission The optimum value of the register 111 and the optimum value of the plurality of reception registers 113 may be obtained for each operation waveform mode. Here, since the actual signal reflects the hardware group delay (IC in/out latency, cable delay, etc.), an error occurs with the signal according to the user's request.

In this case, the transmission/reception timing check unit 130 obtains actual data for a start delay, a frequency, and a duty from an actual signal, and a start delay, a frequency ( frequency) and duty (duty) are obtained, and the error can be confirmed by comparing the actual data with the requested data. For example, if there is a difference between the duty of the actual data and the duty of the requested data, the error rate is corrected to obtain a correction variable (= [(duty of requested data - duty of actual data) * period] / register setup clock), and the obtained The value of the register can be adjusted through the correction variable (register adjustment value = register existing value + correction variable). And, if there is a difference between the Rising Pulse Delay of the actual data and the Rising Pulse Delay of the requested data, the error rate is corrected to obtain a correction variable (= (request data delay - actual data delay) / register setup clock) The value of the register can be adjusted through the correction variable (register adjustment value = register existing value + correction variable).

Through this, the transmit/receive timing check unit 130 determines the transmit/receive timing as shown in FIG. 5, that is, n+1 transmit registers 111, "T00, T01, T02, T03, T04, ..., Tn-1. , Tn" and the optimum values of "R01, R02, R03, R04, ..., Rn-1, Rn" which are the n reception registers 113 may be obtained for each operating waveform mode.

The transmit/receive register setting unit 150 uses the value of one of the plurality of transmit registers 111 and the plurality of receive registers 113 as a reference value, for each operation waveform mode acquired through the transmit/receive timing check unit 130 . Each of the plurality of transmission registers 111 and the plurality of reception registers 113 is obtained in the form of a reference value + a fixed value, and the values of the plurality of transmission registers 111 and the plurality of reception registers 113 are set as a reference value + fixed. It can be set in the form of a value.

In this case, the storage unit 110 may store fixed values for each of the plurality of transmission registers 111 and the plurality of reception registers 113 for each operation waveform mode.

For example, the transmit/receive register setting unit 150 includes n transmit registers 111, “T01, T02, T03, T04, ..., Tn-1, Tn,” and n receive registers ( 113), each value of "R01, R02, R03, R04, ..., Rn-1, Rn" is obtained in the form of a reference value + a fixed value, using the value of "T00", which is a reference register, as a reference value, "T01, T02, T03, T04, ..., Tn-1, Tn" which are n transmit registers 111 and "R01, R02, R03, R04, ..., Rn" which are n receive registers 113 The value of -1, Rn" can be set in the form of a reference value (the value of the reference register T00) + a fixed value. That is, T01 is in the form of "T00 value" as the reference value + "-X1" as the fixed value, T02 is in the form of "T00 value" as the reference value + "-X2" as the fixed value, T03 is the reference value "T00" value of" + fixed value "+X3", T04 is in the form of "T00 value" + fixed value "-X4", Tn-1 is reference value "T00 value" + fixed value In the form of “-Xn-1”, Tn may be set in the form of “value of T00” as a reference value + “+Xn” as a fixed value. And, R01 is in the form of "value of T00" as a reference value + "-Y1" as a fixed value, R02 is in the form of "value of T00" as a reference value + "+Y2" as a fixed value, R03 is in the form of "T00" as a reference value value of" + fixed value "-Y3", R04 is the reference value "T00 value" + fixed value "+Y4" form, Rn-1 is the reference value "T00 value" + fixed value In the form of "-Yn-1", Rn may be set in the form of "value of T00" as a reference value + "+Yn" as a fixed value.

When the operating waveform mode is changed, the operation mode change unit 170 may change a reference value that is a value of one reference register according to the changed operation waveform mode.

As such, when the reference value, which is the value of one reference register, is changed, values of the remaining registers except for one reference register among the plurality of transmission registers 111 and the plurality of reception registers 113 may also be automatically changed. That is, each of the plurality of transmission registers 111 and the plurality of reception registers 113 maintains their fixed values as they are and only the reference values are changed, so that their values are automatically changed naturally.

That is, the operation mode change unit 170 executes the register control function once in the n-th reception section, so that the plurality of transmission registers 111 and the plurality of reception registers 113 for the operation waveform mode of the n-1th transmission section are executed. By changing the value of , it is possible to control the pulse for the n-1 th transmission section.

Here, the register control function may use an operating waveform mode, a reference register, and a reference value as input parameters.

For example, as shown in FIG. 6, the transmission/reception timing control system according to the present invention completes the setting of the transmission/reception control command (eg, setting command according to operation mode #N) for the N+1th transmission pulse section, If only the value of Tx Register "T00", which is the reference register, is changed, n Tx Registers (T01, T02, ..., Tn-1, Tn) and n Rx Registers (R01, R02, ..., Rn-) 1, Rn) is also automatically changed.

That is, as shown in FIG. 7, if only the value of Tx Register "T00", which is the reference register, is changed in the N-th reception section according to a register control function once, the remaining registers associated therewith, the plurality of Tx registers and the plurality of Rx registers The value is also automatically changed. “Register control Function()” shown in FIG. 7 refers to a register control function, “Mode” refers to an operating waveform mode, “TRXREG_COMMON” refers to a reference register, and “XX” refers to a reference value.

Then, a method of changing the high-speed waveform mode according to a preferred embodiment of the present invention will be described with reference to FIGS. 8 and 9 .

8 is a flowchart illustrating a method of changing a high-speed waveform mode according to a preferred embodiment of the present invention.

Referring to FIG. 8 , the high-speed waveform mode changing apparatus 100 checks the transmission timing and the reception timing for each operation waveform mode, and sets the values of the plurality of transmission registers 111 and the plurality of reception registers 113 for each operation waveform mode. Acquire (S110).

That is, the high-speed waveform mode changing apparatus 100 obtains initial values of the plurality of transmission registers 111 by checking the delay characteristics of the transmitter and the frequency synthesizer, and repeatedly tests to determine the optimal driving timing of the amplifier Thus, by checking the optimum values of the plurality of transmission registers 111, it is possible to check the transmission timing for each operation waveform mode. Then, the high-speed waveform mode changing apparatus 100 obtains the initial values of the plurality of reception registers 113 by checking the delay characteristics of the receiver, and the reception signal protection gate for avoiding the transmission signal leakage section. By repeatedly testing to determine the timing and the signal generation time of a local oscillator (LO) and checking the optimal values of the plurality of reception registers 113, the reception timing can be checked for each operating waveform mode.

Then, the high-speed waveform mode changing apparatus 100 uses the value of one of the plurality of transmission registers 111 and the plurality of reception registers 113 as a reference value, and a plurality of transmission registers ( 111) and each of the plurality of reception registers 113 are obtained in the form of a reference value + a fixed value, and the values of the plurality of transmission registers 111 and the plurality of reception registers 113 are set in the form of a reference value + a fixed value do (S130).

In this case, the high-speed waveform mode changing apparatus 100 may store fixed values for each of the plurality of transmission registers 111 and the plurality of reception registers 113 for each operation waveform mode.

Thereafter, when the operating waveform mode is changed, the high-speed waveform mode changing apparatus 100 changes a reference value that is a value of one reference register according to the changed operating waveform mode ( S150 ).

As such, when the reference value, which is the value of one reference register, is changed, values of the remaining registers except for one reference register among the plurality of transmission registers 111 and the plurality of reception registers 113 may also be automatically changed.

That is, the high-speed waveform mode changing apparatus 100 executes the register control function once in the n-th reception section, so that the plurality of transmission registers 111 and the plurality of reception registers 113 for the operation waveform mode of the n-1th transmission section are executed. ) can be changed at once to control the pulse for the n-1 th transmission section. Here, the register control function may use an operating waveform mode, a reference register, and a reference value as input parameters.

9 is a flowchart for explaining the detailed steps of the acquisition step shown in FIG. 8 .

Referring to FIG. 9 , the high-speed waveform mode changing apparatus 100 includes initial values and multiple values of a plurality of transmission registers 111 based on user request information including an operating waveform mode, a pulse repetition frequency (PRF), and control timing information. It is possible to obtain the initial values of the reception registers 113 (S111).

Then, the high-speed waveform mode changing apparatus 100 may set the plurality of transmit registers 111 and the plurality of receive registers 113 as initial values ( S112 ).

Thereafter, the high-speed waveform mode changing apparatus 100 obtains from an actual signal generated in a state in which the plurality of transmission registers 111 and the plurality of reception registers 113 are set to specific values (eg, initial values, adjustment values, etc.). An error may be confirmed by comparing the actual data with the requested data obtained from the user request information (S113).

In this case, the high-speed waveform mode changing apparatus 100 acquires actual data on a start delay, a frequency, and a duty from an actual signal, and a start delay and a frequency from the user request information. Request data for (frequency) and duty (duty) is obtained, and an error can be confirmed by comparing the actual data with the requested data.

When an error occurs (S114-Y), the high-speed waveform mode changing device 100 sets the plurality of transmit registers 111 and the plurality of receive registers 113 to the adjusted values (S115), and performs step S113 again can do.

For example, if there is a difference between the duty of the actual data and the duty of the requested data, the error rate is corrected to obtain a correction variable (= [(duty of requested data - duty of actual data) * period] / register setup clock), and the obtained The value of the register can be adjusted through the correction variable (register adjustment value = register existing value + correction variable). And, if there is a difference between the Rising Pulse Delay of the actual data and the Rising Pulse Delay of the requested data, the error rate is corrected to obtain a correction variable (= (request data delay - actual data delay) / register setup clock) The value of the register can be adjusted through the correction variable (register adjustment value = register existing value + correction variable).

On the other hand, if no error occurs (S114-N), the high-speed waveform mode changing apparatus 100 acquires the optimum values of the plurality of transmission registers 111 and the optimum values of the plurality of reception registers 113 for each operation waveform mode. It can be (S116).

Even if all the components constituting the embodiment of the present invention described above are described as being combined or operated in combination, the present invention is not necessarily limited to this embodiment. That is, within the scope of the object of the present invention, all the components may operate by selectively combining one or more. In addition, all of the components may be implemented as one independent hardware, but a part or all of each component is selectively combined to perform some or all of the functions combined in one or a plurality of hardware program modules It may be implemented as a computer program having In addition, such a computer program is stored in a computer readable media such as a USB memory, a CD disk, a flash memory, etc., read and executed by a computer, thereby implementing the embodiment of the present invention. The recording medium of the computer program may include a magnetic recording medium, an optical recording medium, and the like.

The above description is merely illustrative of the technical idea of the present invention, and various modifications, changes, and substitutions are possible within the range that does not depart from the essential characteristics of the present invention by those of ordinary skill in the art to which the present invention pertains. will be. Accordingly, the embodiments disclosed in the present invention and the accompanying drawings are for explaining, not limiting, the technical spirit of the present invention, and the scope of the technical spirit of the present invention is not limited by these embodiments and the accompanying drawings . The protection scope of the present invention should be construed by the following claims, and all technical ideas within the scope equivalent thereto should be construed as being included in the scope of the present invention.

100: high-speed waveform mode change device;
110: storage unit;
111: transmit register;
113: receive register;
130: transmit/receive timing confirmation unit;
150: transmit/receive register setting unit,
170: operation mode change unit

Claims (12)

a storage unit including a plurality of transmit registers and a plurality of receive registers;
a transmission/reception timing check unit for checking transmission timing and reception timing for each operation waveform mode, and acquiring values of the plurality of transmission registers and the plurality of reception registers for each operation waveform mode;
Values of each of the plurality of transmission registers and the plurality of reception registers for each operation waveform mode obtained through the transmission/reception timing check unit by using the value of one of the plurality of transmission registers and the plurality of reception registers as a reference value a transmit/receive register setting unit that obtains , in the form of the reference value + a fixed value, and sets the values of the plurality of transmit registers and the plurality of receive registers in the form of the reference value + the fixed value; and
an operation mode change unit configured to change the reference value that is the value of the one reference register according to the changed operation waveform mode when the operation waveform mode is changed;
includes,
When the reference value, which is the value of the one reference register, is changed, the values of the other registers except for the one reference register among the plurality of transmit registers and the plurality of receive registers are also automatically changed,
High-speed waveform mode change device. In claim 1,
The storage unit,
Storing the fixed values for each of the plurality of transmit registers and the plurality of receive registers for each operation waveform mode,
High-speed waveform mode change device. In claim 1,
The operation mode change unit,
By executing the register control function once in the nth reception section, the values of the plurality of transmission registers and the plurality of reception registers for the operation waveform mode of the n-1th transmission section are changed at once in the n-1th transmission section by executing the register control function once. control the pulses for
The register control function is
Using the operating waveform mode, the reference register and the reference value as input parameters,
High-speed waveform mode change device. In claim 1,
The transmission/reception timing confirmation unit,
Obtaining the initial values of the plurality of transmission registers by checking the delay characteristics of the transmitter and the frequency synthesizer, and confirming the optimum values of the plurality of transmission registers by repeatedly testing to determine the optimal driving timing of the amplifier Through, check the transmission timing for each operation waveform mode,
The initial values of the plurality of reception registers are obtained by checking the delay characteristics of the receiver, and the timing of the reception signal protection gate for avoiding the transmission signal leakage section and the signal generation of the local oscillator (LO) Checking the reception timing for each operation waveform mode by checking the optimal values of the plurality of reception registers by repeatedly testing to determine the time,
High-speed waveform mode change device. In claim 4,
The transmission/reception timing confirmation unit,
Obtaining the initial values of the plurality of transmission registers and the initial values of the plurality of reception registers based on user request information including an operating waveform mode, a pulse repetition frequency (PRF) and control timing information,
When there is an error by comparing actual data obtained from an actual signal generated in a state in which the plurality of transmit registers and the plurality of receive registers are set to initial values, and the requested data obtained from the user request information, if there is an error, the values of the plurality of transmit registers and obtaining the optimum values of the plurality of transmission registers and the optimum values of the plurality of reception registers for each operation waveform mode by repeatedly testing the process of adjusting the values of the plurality of reception registers,
High-speed waveform mode change device. In claim 5,
The transmission/reception timing confirmation unit,
Acquire the real data for start delay, frequency and duty from the real signal, and start delay, frequency and duty from the user request information obtaining the requested data for , and comparing the actual data with the requested data to check an error,
High-speed waveform mode change device. A high-speed waveform mode changing method performed by a high-speed waveform mode changing device including a plurality of transmit registers and a plurality of receive registers, the method comprising:
checking transmission timing and reception timing for each operating waveform mode, and acquiring values of the plurality of transmission registers and the plurality of reception registers for each operation waveform mode;
Using the value of one of the plurality of transmission registers and the plurality of reception registers as a reference value, the values of each of the plurality of transmission registers and the plurality of reception registers for each operation waveform mode obtained by using the reference value + fixed acquiring in the form of a value, and setting the values of the plurality of transmit registers and the plurality of receive registers in the form of the reference value + the fixed value; and
changing the reference value that is the value of the one reference register according to the changed operating waveform mode when the operating waveform mode is changed;
includes,
When the reference value, which is the value of the one reference register, is changed, the values of the other registers except for the one reference register among the plurality of transmit registers and the plurality of receive registers are also automatically changed,
How to change the high-speed waveform mode. In claim 7,
The change step is
By executing the register control function once in the nth reception section, the values of the plurality of transmission registers and the plurality of reception registers for the operation waveform mode of the n-1th transmission section are changed at once in the n-1th transmission section by executing the register control function once. It consists of controlling the pulse for
The register control function is
Using the operating waveform mode, the reference register and the reference value as input parameters,
How to change the high-speed waveform mode. In claim 7,
The acquisition step is
Obtaining the initial values of the plurality of transmission registers by checking the delay characteristics of the transmitter and the frequency synthesizer, and confirming the optimum values of the plurality of transmission registers by repeatedly testing to determine the optimal driving timing of the amplifier Through, check the transmission timing for each operation waveform mode,
The initial values of the plurality of reception registers are obtained by checking the delay characteristics of the receiver, and the timing of the reception signal protection gate for avoiding the transmission signal leakage section and the signal generation of the local oscillator (LO) By repeatedly testing to determine the time and confirming the optimal values of the plurality of reception registers, it consists in confirming the reception timing for each operation waveform mode,
How to change the high-speed waveform mode. In claim 9,
The acquisition step is
Obtaining the initial values of the plurality of transmission registers and the initial values of the plurality of reception registers based on user request information including an operating waveform mode, a pulse repetition frequency (PRF) and control timing information,
When there is an error by comparing actual data obtained from an actual signal generated in a state in which the plurality of transmit registers and the plurality of receive registers are set to initial values, and the requested data obtained from the user request information, if there is an error, the values of the plurality of transmit registers and obtaining the optimum values of the plurality of transmission registers and the optimum values of the plurality of reception registers for each operation waveform mode by repeatedly testing the process of adjusting the values of the plurality of reception registers,
How to change the high-speed waveform mode. In claim 10,
The acquisition step is
Acquire the real data for start delay, frequency and duty from the real signal, and start delay, frequency and duty from the user request information Obtaining the requested data for , and comparing the actual data with the requested data to confirm an error,
How to change the high-speed waveform mode. A computer program stored in a computer-readable recording medium in order to execute the high-speed waveform mode changing method according to any one of claims 7 to 11 in a computer.

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