KR20120031344A - Light emitting diode chip and method for fabricating the same - Google Patents

Abstract

Disclosed are a light emitting diode chip and a method of manufacturing the same. The light emitting diode chip manufacturing method includes preparing a wafer for a light emitting diode including a substrate, a lower semiconductor layer, an active layer, and an upper semiconductor layer, cutting the wafer into individual light emitting diode chips with a laser accompanied by a change in focus, and Unevenness is formed on the side of the light emitting diode chip.

Description

LIGHT EMITTING DIODE CHIP AND METHOD FOR FABRICATING THE SAME

The present invention relates to a light emitting diode chip and a method of manufacturing the same, and more particularly to a light emitting diode chip and a method of manufacturing the light emitting efficiency is improved.

A light emitting diode is a photoelectric conversion element having a structure in which a P-type semiconductor and an N-type semiconductor are joined. When a forward voltage is applied, electrons and holes move and recombine through a junction between the P-type semiconductor and the N-type semiconductor. Radiates light. In this case, since the color of the emitted light is determined by the gap energy, a light emitting diode emitting light having a desired color may be manufactured according to the selection of the semiconductor material.

Such a light emitting diode can be implemented in various colors, and is widely used as a display device and a backlight for various electronic products, instrument panels, and electronic displays.

In addition, the light emitting diode consumes less power and has a longer life than a conventional incandescent lamp or a luminaire such as a fluorescent lamp, thereby replacing the existing luminaire and expanding its use area for general lighting. However, in order to use the light emitting diode for general lighting purposes, it is very important to increase the light emitting efficiency of the light emitting diode, and various techniques have been developed for this purpose.

In general, light emitting diodes are manufactured by sequentially forming semiconductor layers on a substrate and sequentially etching the formed semiconductor layers to form light emitting regions. Subsequently, the manufactured light emitting diode is manufactured into a developed light emitting diode chip through a process of separating a substrate using a diamond wheel.

1 is a schematic cross-sectional view of a light emitting diode chip manufactured according to a general light emitting diode chip manufacturing method.

Referring to FIG. 1, the semiconductor layer 16 including the lower semiconductor layer 15, the active layer 17, and the upper semiconductor layer 19 is sequentially positioned on the substrate 11. The transparent electrode layer 21 is positioned on the semiconductor layer 16, and the electrode pads 23 are positioned on the transparent electrode layer 21 and the lower semiconductor layer 15. The buffer layer 13 may be interposed between the semiconductor layer 16 and the substrate 11.

After the light emitting diode is manufactured as described above, the substrate 11 of the light emitting diode chip is separated from the light emitting diode chip, as shown in FIG. Conventionally, researches to improve the light extraction efficiency by forming a pattern on the upper surface of the light emitting diode have been mainly conducted, but there is a limit to increase the light extraction efficiency only by the pattern formed on the upper surface of the light emitting diode. There is a need for research on improving light extraction efficiency.

An object of the present invention is to provide a light emitting diode chip with improved luminous efficiency and a method of manufacturing the same.

According to an aspect of the present invention, a wafer for a light emitting diode comprising a substrate, a lower semiconductor layer, an active layer and an upper semiconductor layer is prepared, and the wafer is cut into individual light emitting diode chips with a laser accompanied by a change in focus, so that the individual A light emitting diode chip manufacturing method for forming irregularities on a side surface of a light emitting diode chip is provided.

In example embodiments, a plurality of upper regions including at least an active layer and an upper semiconductor layer may be formed on a lower region including the substrate and the lower semiconductor layer, to prepare the wafer, and to surround each of the upper regions. A light emitting diode chip is manufactured by separating the individual LED chips by irradiating a laser to the lower region with a surrounding trajectory.

According to another embodiment, an upper region including at least an active layer and an upper semiconductor layer is formed on a lower region including the substrate and the lower semiconductor layer to prepare the wafer, and a laser is applied to the upper region and the lower region. Irradiation is performed to separate the individual LED chips to manufacture LED chips.

According to another aspect of the present invention, in the method of manufacturing a light emitting diode chip, preparing a wafer for a light emitting diode comprising a substrate, a lower semiconductor layer, an active layer and an upper semiconductor layer, and irradiates a laser to the wafer to penetrate the wafer. One or more through holes are formed, wherein the through holes are used to separate the individual light emitting diode chips from the wafer.

In example embodiments, a plurality of upper regions including at least an active layer and an upper semiconductor layer may be formed on a lower region including the substrate and the lower semiconductor layer to prepare the wafer and surround the periphery of the upper region. A plurality of through holes are formed in the trajectory, and concavities and convexities are formed in the side surfaces of the individual light emitting diode chips through the plurality of through holes.

According to another embodiment, a plurality of upper regions including at least an active layer and an upper semiconductor layer is formed on a lower region including the substrate and the lower semiconductor layer to prepare the wafer, and the laser is irradiated to the upper region. A plurality of through holes are formed in the wafer by the laser irradiated to the lower region. It is preferable to change the focus of the laser while irradiating the laser onto the wafer.

A light emitting diode chip according to an aspect of the present invention includes a substrate, a lower semiconductor layer, an active layer, and an upper semiconductor layer, which are cut and separated from a wafer, and include irregularities on a side cut by a laser.

According to one embodiment, the unevenness is formed at least on the side of the substrate and the lower semiconductor layer.

In example embodiments, the light emitting diode chip may include a first side surface on which the unevenness is formed as a whole, and a second side surface on which the unevenness is formed only to a height lower than the active layer in the height direction.

According to one embodiment, the irregularities may be formed by successive layers in the height direction. At this time, the layer has regularity by the scanning direction of the laser.

According to an embodiment, the unevenness may include a portion of the shape of the through hole penetrating the wafer, and according to another embodiment, the unevenness may include a portion of the shape of the plurality of through holes penetrating the wafer.

According to the embodiment of the present invention, the light emitting diode chip is manufactured such that irregularities are formed on the side surface of the light emitting diode chip, thereby increasing the light emitting efficiency of the light emitting diode chip.

1 is a schematic cross-sectional view of a light emitting diode chip manufactured according to a general light emitting diode chip manufacturing method.
2 is a flowchart illustrating a method of manufacturing a light emitting diode chip according to an embodiment of the present invention.
3 is a cross-sectional view illustrating a light emitting diode chip cut from a wafer according to an embodiment of the present invention.
4 shows examples of cut planes resulting from cutting a wafer with a laser accompanied by a focus change.
5A, 5B, and 5C are plan views illustrating a light emitting diode chip according to another embodiment of the present invention.
6 is a perspective view for explaining a method of separating a light emitting diode chip from a wafer according to another embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments are provided as examples to sufficiently convey the spirit of the present invention to those skilled in the art. Accordingly, the present invention is not limited to the embodiments described below and may be embodied in other forms. And, in the drawings, the width, length, thickness, etc. of the components may be exaggerated for convenience. Like numbers refer to like elements throughout.

2 is a flowchart illustrating a method of manufacturing a light emitting diode chip according to an embodiment of the present invention.

Referring to FIG. 2, first, a substrate is prepared (S101). The substrate may be, for example, a sapphire (Al ₂ O ₃ ) substrate, but is not limited thereto. The substrate may be variously selected according to the material of the semiconductor layer to be formed on the substrate.

Subsequently, semiconductor layers are formed on the substrate (S103). As the semiconductor layers, a lower semiconductor layer, an active layer, and an upper semiconductor layer are sequentially formed. The lower semiconductor layer, the active layer, and the upper semiconductor layer may be formed of a gallium nitride-based compound semiconductor material, that is, (Al, In, Ga) N, respectively. In particular, the active layer has a composition element and composition ratio determined so as to emit light of a desired wavelength such as ultraviolet or blue light, and the lower semiconductor layer and the upper semiconductor layer are formed of a material having a larger band gap than the active layer.

In addition, the lower semiconductor layer, the upper semiconductor layer, and the active layer may be intermittently or using metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy, or hydride vapor phase epitaxy (HVPE) techniques, or the like. Can be grown continuously.

Here, the lower semiconductor layer and the upper semiconductor layer are N type and P type, or P type or N type, respectively. In the compound semiconductor layer of the gallium nitride series, the N-type semiconductor layer may be formed by doping with silicon (Si) as an impurity, and the P-type semiconductor layer may be formed by doping with magnesium (Mg) as an impurity.

The lower semiconductor layer and / or the upper semiconductor layer may be a single layer as shown, but may have a multilayer structure. In addition, the active layer may have a single quantum well or multiple quantum well structures.

In addition, before forming the lower semiconductor layer, a buffer layer may be interposed between the semiconductor layers and the substrate. The buffer layer is formed to mitigate lattice mismatch between the substrate and the lower semiconductor layer to be formed thereon, and may be formed of, for example, gallium nitride (GaN) or aluminum nitride (AlN).

Subsequently, photoresist patterns defining light emitting regions are formed on the upper semiconductor layer, and the upper semiconductor layer, the active layer, and the lower semiconductor layer are sequentially etched using the formed photoresist patterns as an etching mask (S105).

Each of the light emitting regions thus formed includes a lower semiconductor layer positioned on a substrate, an upper semiconductor layer positioned over an area of the lower semiconductor layer, and an active layer interposed between the lower semiconductor layer and the upper semiconductor layer. Other areas of the layer are exposed.

Meanwhile, before forming the metal wires, metal layers may be formed on the upper semiconductor layer, ohmic contact layers may be further formed on the exposed lower semiconductor layer, and ohmic contact layers may also be formed on the upper semiconductor layer. The detailed description thereof is omitted here.

Subsequently, a light emitting diode wafer (hereinafter referred to as a “wafer”) manufactured through the above processes is cut with a laser and separated into individual light emitting diode chips (S107). At this time, the laser irradiated onto the wafer involves a continuous change of focus and adjustment. As the focus changes continuously, irregularities are formed on the sides of the individual light emitting diode chips, that is, the cut surfaces. Unevenness can be formed on all cut surfaces, but only desired cut surfaces can be formed by changing the focus of the laser as needed. The unevenness may contribute to increasing the light extraction efficiency of the light emitting diode by reducing the total reflection at the side of the light emitting diode chip and increasing the surface area of the side from which light is emitted.

In cutting by the laser, the roughness of the cut surface can be adjusted by adjusting the focus interval or width of the laser. Here, the laser may be irradiated to the lower surface and the upper surface of the substrate one by one or at the same time to be cut into light emitting diode chips of individual chip units, or the lower surface or the upper surface of the substrate may be cut into light emitting diode chips of individual units.

Referring to FIG. 3, it can be seen that a light emitting diode chip is cut from a wafer according to an embodiment of the present invention.

A portion of the wafer is shown in FIG. 3 and indicated by reference numeral 1. The wafer 1 includes a lower region L including the N-type electrode pads 36 and an upper region U including the P-type electrode pads 37. By mesa etching, the upper region U is divided into a plurality. The lower region L includes a substrate 31 and an N type lower semiconductor layer 32, and the plurality of divided upper regions U are sequentially formed on the upper portion of the N type lower semiconductor layer 32 and thereon. An active layer 33 and a P-type upper semiconductor layer 34 is included. In addition, the upper region U includes a transparent electrode layer 35 formed on the upper surface of the P-type upper semiconductor layer 34.

The laser B indicated by the arrow is irradiated obliquely with respect to the wafer 1, whereby the wafer 1 is cut to have an inclined side surface. An upper region U and a corresponding N-type electrode pad 36 are included in the trajectory to which the laser is irradiated, and the LED chip 30 is cut and separated from the wafer 1 so as to correspond to the laser trajectory. Can be. Note that in order to obtain a light emitting diode chip having a multi-cell structure including a plurality of active layers 33, the laser may be irradiated with a locus including a plurality of upper regions U therein.

Irradiation of the laser B is accompanied by a continuous change of focus, whereby unevenness 39 is formed on the cutting surface of the wafer 1 or the light emitting diode chip 30. When the laser is scanned in the same trajectory as mentioned above, successive layered irregularities in the form of stripes are formed along the height direction. When the laser B is irradiated only on the outer circumference of the upper region U, the unevenness 39 is formed only on the side surfaces of the substrate 31 and the N-type lower semiconductor layer 32, as shown in FIG. (33), unevenness does not occur in the P-type upper semiconductor layer 34 and the transparent electrode layer 35. However, when using the wafer 1 in which a part of the N-type upper semiconductor layer is exposed by the etching hole (see FIG. 6), or when it is necessary to further increase the light extraction efficiency regardless of the wafer structure, the focus change May be applied to the cutting of the active layer 33, the P-type upper semiconductor layer 34 and / or the transparent electrode layer 35, in which case the unevenness is the active layer 33, the P-type upper semiconductor layer. It is also formed in the 34 and / or transparent electrode layer 35.

According to the irradiation direction and angle of the laser, the cutting surface of the wafer 1 has a different shape. When using the method of irradiating the laser obliquely, the inclined cutting surface I can be obtained as shown in FIG. In the case of the method of irradiating the laser in the vertical direction, a substantially vertical cut surface V can be obtained as shown in Fig. 4B. Similar to the inclined cut plane, the vertical cut plane includes irregularities caused by the change in focus of the laser.

In addition, when cutting the wafer with a laser, a method of irradiating the laser in one direction from the top to the bottom or from the bottom to the top may be used, and a method of irradiating the laser in two directions sequentially or simultaneously with respect to the middle portion of the wafer. This can be used. In addition, the wafer may be cut only with a laser, and alternatively, the wafer may be further cut using a breaking force by physical force after forming a cutting groove or a cutting hole with the laser.

5A, 5B and 5C are diagrams for describing other embodiments of the present invention.

FIG. 5A illustrates a plurality of through holes H passing through the lower region L including the substrate and the lower semiconductor layer along the periphery of the upper region U including the active layer and the upper semiconductor layer. , Cutting the individual LED chips from the wafer 1. The plurality of through holes H are formed by laser irradiation, wherein the laser irradiation may involve a continuous change of focus. The light emitting diode chip may be cut and separated from the wafer by using the plurality of through holes H formed to be connected to each other by a laser. As a result, cross-sectional unevenness 39 ′ is formed on the side surface of the light emitting diode chip. This cross-sectional unevenness also improves light extraction from the side of the light emitting diode chip.

FIG. 5B illustrates an example in which the cross-sectional irregularities are partially formed by omitting the through holes H in some regions, such as near the edges of the LED chip. The individual light emitting diode chips may be quadrangular as shown in FIGS. 5A and 5C or parallelograms as shown in FIG. 5B, or some other geometric shape.

5A and 5B form a plurality of through holes H with a laser only in a region including only the lower region L, that is, the substrate and the lower semiconductor layer, and by using the through holes H. The unevenness 39 'is formed on the side by cutting the individual LED chips, but as shown in FIG. 5C, the laser beam is also irradiated to the upper region U, that is, the region including the upper semiconductor layer and the active layer, so that the through hole ( H) can be formed. 5A and 5B include a plurality of through holes H with respect to one side of the LED chip, while the embodiment of FIG. 5C shows one through hole relatively large to one side of the LED chip. H).

Referring back to FIG. 3, the LED chip 30 includes a substrate 31. The lower semiconductor layer 32, the active layer 33, and the upper semiconductor layer 34 are sequentially formed on the substrate 31. The light emitting diode chip 30 is cut from the wafer by a laser accompanied by a focus change, and the cut surface thereof, that is, the side surface of the light emitting diode chip has the unevenness 39 by the laser as described above.

By the unevenness 39, the emission surface area of the light emitted from the active layer 33 toward the substrate can be increased, and the light loss caused by total internal reflection can be reduced, thereby improving the luminous efficiency of the light emitting diode chip. You can.

A portion of the lower semiconductor layer 32 is exposed by mesa formation, and an N-type electrode pad 36 is formed in the vicinity of the exposed portion.

The active layer 33 is limitedly formed on a portion of the lower semiconductor layer 32 by mesa formation, and the upper semiconductor layer 34 is formed on the active layer 33. The transparent electrode layer 35 may be formed on the upper semiconductor layer 34. The transparent electrode layer 35 has a plate shape and transmits light emitted from the upper semiconductor layer 34 to the outside. The transparent electrode layer 35 may improve light emission efficiency by evenly distributing the current input through the P-type electrode pad 37.

The P-type electrode pad 37 and the N-type electrode pad 36 are formed on the transparent electrode layer 35 and on the lower semiconductor layer 32. The P-type electrode pad 37 and the N-type electrode pad 36 are connected to a lead (not shown) by wiring to receive power from an external power source.

6 shows a process of cutting the wafer 1 with a laser accompanied by a focus change and separating the wafer 1 into individual LED chips 30 according to another embodiment of the present invention. Referring to FIG. 6, since the region where the N-type electrode pad 36 is installed is formed by the etching hole h, in the remaining portion except for the portion where the etching hole h is formed, the upper region and the lower region have no step. It is connected. In this case, when cutting and separating the individual light emitting diode chips 30 from the wafer 1, the cutting by the laser accompanying the focus change is made to include both the upper region U and the lower region L. FIG. As shown in FIG. 6, when the laser is irradiated obliquely, the light emitting diode chip may be cut and separated into a substantially trapezoidal cross section as shown in FIG. 6 or a substantially parallelogram cross section as shown in FIG. 3.

The invention being thus described, it will be obvious that the same way may be varied in many ways. Such modifications are intended to be within the spirit and scope of the invention as defined by the appended claims.

30 LED chip 31 substrate
32: lower semiconductor layer 33: active layer
34: upper semiconductor layer 35: transparent electrode layer
36: N type electrode pad 37: P type electrode pad
39, 39 ': unevenness

Claims (13)

In the light emitting diode chip manufacturing method,
Preparing a wafer for a light emitting diode comprising a substrate, a lower semiconductor layer, an active layer and an upper semiconductor layer,
Cutting the wafer into individual light emitting diode chips with a laser accompanied by a change in focus,
The light emitting diode chip manufacturing method, characterized in that the irregularities formed on the side of the individual LED chip. The method according to claim 1,
Preparing a wafer by forming a plurality of upper regions including at least an active layer and an upper semiconductor layer on a lower region including the substrate and the lower semiconductor layer,
And irradiating a laser to the lower region with a trajectory surrounding each of the upper regions to separate the individual LED chips. The method according to claim 1,
Preparing the wafer by forming an upper region including at least an active layer and an upper semiconductor layer on a lower region including the substrate and the lower semiconductor layer,
And irradiating a laser to the upper region and the lower region, respectively, to separate the individual LED chips. In the light emitting diode chip manufacturing method,
Preparing a wafer for a light emitting diode comprising a substrate, a lower semiconductor layer, an active layer and an upper semiconductor layer,
Irradiating a laser onto the wafer to form one or more through holes penetrating the wafer,
And using the through hole to separate the individual light emitting diode chip from the wafer. The method of claim 4,
Preparing a wafer by forming a plurality of upper regions including at least an active layer and an upper semiconductor layer on a lower region including the substrate and the lower semiconductor layer,
By forming a plurality of through holes as a trajectory surrounding the upper region,
The method of claim 1, wherein the plurality of through holes to form irregularities on the side of the individual light emitting diode chip. The method of claim 4,
Preparing a wafer by forming a plurality of upper regions including at least an active layer and an upper semiconductor layer on a lower region including the substrate and the lower semiconductor layer,
And a plurality of through holes formed in the wafer by a laser irradiated to the upper region and a laser irradiated to the lower region. The method of claim 4, wherein the focus of the laser is changed while irradiating the laser onto the wafer. A light emitting diode chip which is cut and separated from a wafer and comprises a substrate, a lower semiconductor layer, an active layer, and an upper semiconductor layer,
A light emitting diode chip comprising irregularities on the side cut by a laser. The light emitting diode chip according to claim 8, wherein the irregularities are formed on at least side surfaces of the substrate and the lower semiconductor layer. The light emitting diode chip according to claim 8, further comprising a first side surface on which the unevenness is formed entirely along the height direction, and a second side surface on which the unevenness is formed only up to a height lower than the active layer along the height direction. The light emitting diode chip according to claim 8, wherein the unevenness is formed by successive layers in the height direction. The light emitting diode chip of claim 8, wherein the unevenness includes a portion of a shape of a through hole penetrating through the wafer. The light emitting diode chip of claim 8, wherein the unevenness includes a portion of a shape of a plurality of through holes penetrating through the wafer.

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