KR20090105844A - Manufacturing method of multilayer ceramic substrate, electronic component and multilayer ceramic substrate - Google Patents

Abstract

In a multilayer ceramic substrate surface-mounted with an active element and a passive element on one outermost surface, the multilayer ceramic substrate is formed by stacking a plurality of ceramic substrate layers, and at least in the via hole of the at least one outermost ceramic substrate layer. A surface layer terminal electrode formed of a surface via electrode and a metal plating layer deposited on the end face thereof, and via wiring connecting the surface terminal electrode and the wiring on the ceramic substrate layer therein, the surface layer terminal electrode connecting the active element. The via hole diameter of the multilayer ceramic substrate is smaller than the via hole diameter of the surface layer terminal electrode connecting the passive element.

Description

MULTILAYER CERAMIC SUBSTRATE, ELECTRONIC COMPONENT, AND METHOD OF MANUFACTURING MULTILAYER CERAMIC SUBSTRATE}

The present invention relates to a multilayer ceramic substrate, an electronic component and a method for manufacturing the multilayer ceramic substrate.

Background Art [0002] Multi-layer ceramic substrates are widely used in today's high-performance and small sized devices such as mobile phones. In a general multilayer ceramic substrate, a plurality of ceramic substrate layers are stacked, and a wiring layer having internal wiring is formed between each ceramic substrate layer. These wiring layers are connected by wiring called via wiring.

Japanese Unexamined Patent Publication No. 2007-305740 (Patent Document 1) discloses a structural example of such a multilayer ceramic substrate. In the multilayer ceramic substrate disclosed in Patent Document 1, a ceramic laminate in which a plurality of ceramic layers are laminated, a recess formed on one main surface of the ceramic laminate, a connecting electrode exposed inside the recess, A terminal electrode mainly comprising a conductive resin filled in the recess and conducting with the connecting electrode is provided.

However, in the multilayer ceramic substrate disclosed in Patent Document 1, the main purpose is to improve the impact resistance of the connection terminal electrode with the mother substrate. Therefore, it is preferable that conductive resin is required for the connecting portion, and that the depth of the resin is 100 µm. However, the finer the size of the electrode, the more difficult the resin is to be filled and the production is not easy. Moreover, it is not practical to make metal plating stably adhere to the surface of such conductive resin. In addition, Patent Document 1 discloses that Ag-Pd alloys and Ag-Pt alloys have a small specific resistance and are suitable for high frequency applications. However, the effect on the mechanical strength when the surface-mounting component is used for the surface to be connected is used. It is not considered about.

On the other hand, Japanese Laid-Open Patent Publication No. 2005-286303 discloses that a terminal electrode on a surface is bent toward an inner layer and covered with an insulator to reinforce an end portion and to realize a laminated ceramic substrate having excellent mechanical strength. Since the dimension of the reinforcing portion extending toward the inner layer requires 50 to 100 µm in consideration of the positioning accuracy during the process, there is a limit to the application to a small, high density future product.

In Japanese Patent Laid-Open No. 2001-189550, the surface lead portion of the via hole conductor is formed to be concave (that is, recessed) by 20 µm or less from the surface of the multilayer ceramic substrate, and the curved surface of the bump is concave. A technique for exhibiting a self position correction function (self-alignment) by coupling to a negative edge is disclosed. However, also in this patent document 3, the mechanical strength at the time of connecting bump and via-hole conductor is not considered. In addition, for the purpose of self-alignment, it is necessary to relatively deepen the depth of the abdomen. When the recesses are formed relatively deep in this manner, when the solder paste is formed by printing, bubble traces are likely to remain in the recesses, which may hinder electrical and mechanical connection reliability. At this time, since the via conductor is formed using a conductive paste having a large shrinkage rate even when metal plating is formed, the plating chemical may adhere to the inner wall of the via hole, resulting in corrosion.

By the way, LGA (LAND GRID ARRAY), BGA (BALL GRID ARRAY), spherical and square pad-shaped surface electrodes are formed on the outermost surface of the multilayer ceramic substrate as a complicated wiring pattern. The interval between these electrodes is narrowed at intervals of several 100 to 150 µm, and in the case of a semiconductor package component, there is a tendency to be further narrowed by flip chip mounting. For this reason, BGA is mainly used by forming several 100 µm solder balls as bumps, but in this case, the number of solder balls is in the range of several tens to several hundreds, sometimes 1000 or more. The number varies depending on the use and function of the semiconductor element, but requires a connection shear strength of about 50 gf or more per electrode. This value is at a high level as the connection by solder balls of several 100 mu m.

On the other hand, in the case of a chip component, the number of electrodes is originally small, and a method of using spherical and rectangular pad-shaped surface electrodes or LGA can be selectively used in preference to securing connection strength. However, there is no change in what is preferable to be a higher density and higher strength electrode.

Under these circumstances, a multilayer ceramic substrate having a terminal electrode structure having high frequency performance, insulation reliability, corrosion resistance, and high mechanical strength and a method of manufacturing the same have been required.

This invention is made | formed in view of the said situation, First, it aims at narrowing down the surface terminal electrode, and aiming at the compact density of the multilayer ceramic substrate itself. In addition, even if the terminal electrode is made small, the structural structure can improve the bonding strength with the surface-mounting component and the like, and the multilayer ceramic substrate having low possibility of corrosion due to the remaining of plating chemicals, electronic components using the same, and such multilayer ceramic substrate It is one of the objects to provide a method for producing the same.

One aspect of the present invention is a multilayer ceramic substrate in which a plurality of ceramic substrate layers are laminated, which is provided on a ceramic substrate layer on at least one of the front and back surfaces, and is a metal plating layer deposited on a surface via electrode and its end surface. A surface layer terminal electrode; And via wirings for connecting the surface terminal electrodes with wirings on the ceramic substrate layer therein, wherein the surface via electrodes have a cross-section of the outermost surface in a via hole formed in the ceramic substrate layer of the outermost surface. The surface of the metal plating layer deposited on the end surface of the surface via electrode is in a recessed position than the surface of the ceramic substrate layer, and the surface of the ceramic substrate layer is substantially flush with the surface of the ceramic substrate layer on the outermost surface or the surface of the ceramic substrate layer on the outermost surface. It is in position. Here, the said substantially coplanar means to allow even the projection below 3 micrometers in thickness, even if it is about 3 micrometers.

EMBODIMENT OF THE INVENTION Hereinafter, embodiment of this invention is described, referring drawings. 1 is a chart showing a manufacturing process of a multilayer ceramic substrate according to the present embodiment.

[Manufacture of Multilayer Ceramic Substrate]

In the process of forming the multilayer ceramic substrate of the present embodiment, first, a plurality of ceramic green sheets are generated. For this reason, on the organic carrier film (for example, PET film), the slurry which consists of the powder of the low temperature baking ceramic material, the powder of a glass component, and the mixture of an organic binder, a plasticizer, and a solvent is a film of predetermined thickness by a doctor blade method. It is formed in a shape and dried (S1). Although the thickness after drying of this slurry differs according to the objective, in this example, it is set to about 20-200 micrometers.

In addition, the low-temperature sinterable ceramic material used for the ceramic green sheet is a ceramic material capable of co-firing with a conductor material such as silver (Ag) (hereinafter referred to as "conductor paste") at 800 to 1000 ° C, so-called LTCC (Low Temperature). Any ceramics for Co-fired Ceramics can be used. When converted, the main component of Al, Si, Sr and Ti as an example to Al ₂ O _3, SiO _2, SrO, TiO _2, respectively, Al ₂ O _3: 10 to 60% by mass, SiO _2: 25 to 60 mass% , SrO: 7.5 to 50% by mass, TiO ₂ : 20% by mass or less (including 0), and at least one of the groups Bi, Na, and K is Bi ₂ O as a subcomponent with respect to 100 parts by mass of the main component. 0.1 to 10 parts by mass in terms of ₃ , 0.1 to 5 parts by mass in terms of Na ₂ O, 0.1 to 5 parts by mass in terms of K ₂ O, and at least one of Cu, Mn and Ag in terms of CuO 0.01 to 5 parts by mass, 0.01 to 5 parts by mass in terms of MnO ₂ , 0.01 to 5 parts by mass of Ag, and once the mixture containing other unavoidable impurities is calcined to 700 ° C. to 850 ° C., which is then ground and averaged. And dielectric ceramic compositions composed of finely ground particles having a particle diameter of 0.6 to 2 mu m.

In addition, the production of the ceramic green sheet which can be fired at low temperature is not limited to the doctor blade method described herein, but may be performed by, for example, a rolling (extrusion) method, a printing method, an inkjet coating method, a transfer method, or the like. In the case of using a ceramic green sheet, it is cut next to obtain a plurality of ceramic green sheets (S2). Although it is easy to handle with a green sheet, it is also a reasonable manufacturing method to provide it to processes, such as printing, after repeating winding / unwinding in roll form without cutting.

In each ceramic green sheet, via holes are formed using a laser or the like according to the desired circuit (S3), and a conductor paste containing silver (Ag) as a main component is placed in each via hole through a printing screen. The via conductor is pressed into the via hole with a squeegee and the excess conductor paste is peeled off to produce the via conductor (S4). In addition, on the surface of each ceramic green sheet including the ceramic green sheet of the first layer on the upper surface, a conductor pattern corresponding to the target circuit is formed by using a conductor paste such as silver (Ag) in a thickness of 5 to 35 µm. It is formed by printing (S5). Internal conductors such as an inductor, a transmission line, a capacitor and a ground electrode are formed by these conductor patterns, and they are connected to each other by via wires by the via conductors to form a target circuit wire. In addition, the via hole may be drilled by a mechanical puncher (mechanical puncher).

In addition, in the case of the ceramic green sheet of the first layer on the upper surface, it is necessary that the fine conductor pattern be narrowly approached so that printing can be carried out so that a large number of small mounting components or semiconductor components can be mounted. At this time, if the via hole is filled with a conductive paste mainly composed of Ag and the step of forming the surface conductor pattern over a plurality of times, positional shifting is likely to occur, which makes it difficult to achieve high density. Therefore, the filling printing of the via hole may also be performed in one time as well as printing of the surface conductor pattern.

Next, the plurality of ceramic green sheets on which the via conductors and / or the conductor patterns are formed are pressed by pressing (S6), and the step (S7) of peeling the carrier film is repeatedly repeated as many as the number of ceramic substrate layers to form a minute. A multilayer multilayer ceramic laminate (hereinafter, simply referred to as "unsintered multilayer ceramic body") is produced.

As an example, the ceramic green sheet which is located on the outermost surface side of the green multilayer ceramic body is set on the fixing film, pressed in a mold at a predetermined pressure, temperature, and time to be pressed. For example, the pressure is 1 to 5 MPa (10 to 50 kgf / cm 2), the temperature is 30 to 60 ° C., the time is 3 to 15 seconds, or the like. The mold above and below thermocompression bonding may have a simple flat plate shape with a built-in heater. After the pressing by the press is completed, the carrier film of the ceramic green sheet is peeled off. At this time, the green sheet is fixed to the film for fixing and does not peel together at the time of peeling of a carrier film.

Next, the ceramic green sheet of the second layer is laminated. The conductive pattern constituting the internal circuit wiring is printed on the ceramic green sheet. It sets so that the main surface of a ceramic green sheet may contact the ceramic green sheet of a 1st layer, and it presses and crimps similarly to the case of the ceramic green sheet of a 1st layer. At this time, when the press temperature is a temperature at which the pressure-sensitive adhesive in the printing paste softens and adheres, the printing portion is bonded to the opposite ceramic green sheet by the pressing force. Therefore, the ceramic green sheets are bonded via the printed conductor paste. Also, where the ceramic layers are in direct contact with each other without electrodes, they are softened and fixed as in the case of sandwiching the electrodes. Although the crimping | compression-bonding temperature at this time also depends on the kind of adhesive, the low temperature of about 40-90 degreeC may be sufficient, and joining strength can be adjusted by changing a pressing force. After the pressing, the carrier film of the ceramic green sheet is peeled off. After the ceramic green sheet of the third layer, the laminate is laminated in the same process as the ceramic green sheet of the second layer. Moreover, in order to integrate a laminated body strongly, you may perform a crimping process further after laminating | stacking the whole.

In addition, you may perform part or all of a series of processes of crimping | bonding, peeling, and lamination in the atmosphere which reduced pressure. By doing in this way, the bubble between ceramic green sheets is easy to be removed, the dimensional precision at the time of lamination | stacking can be maintained, and delamination can be reduced.

In this embodiment, a conductor paste mainly composed of Ag is used on the underside of the green micro multilayer ceramic body thus obtained (opposite side opposite to the surface of the ceramic substrate layer on the outermost surface), and according to the intended circuit, The bottom surface electrode is printed and formed (S8).

Moreover, you may form an overcoat material suitably around the board | substrate surface and the conductor pattern of a bottom surface. As a material of this overcoat material, it is preferable that a sintering shrinkage characteristic and a thermal expansion characteristic approximate the raw material of a microcrystalline multilayer ceramic body. For example, what added the additive component for giving the function which improves the visibility (namely, visual recognition) of a coating part to the slurry of the same material as a ceramic green sheet is mentioned. By forming an electrode coating region by coating the overcoat on the edge of the surface conductor pattern, it is possible to prevent mechanical protection of the conductor pattern on the surface and short-circuit such that solder provided on the conductor pattern in a subsequent step flows out and comes into contact with the conductive portion. . In addition, the conductor pattern and the overcoat material of the base surface do not necessarily need to be provided in the state of a microcrystalline multilayer ceramic body, and may be formed with respect to the multilayer ceramic substrate after sintering.

In this embodiment, the microcrystalline multilayer ceramic body thus obtained is thermocompressed at 10 to 40 MPa (100 to 400 kgf / cm 2) and 85 ° C. in a CIP (Cold Isostatic Press) apparatus, and each layer is integrated. One micro multilayer ceramic body is used.

Next, grooves cut out by a jig such as a knife cutter are formed on the surface of the green multilayer ceramic body to form divided grooves (S9). The division grooves are formed in different shapes depending on the size of the aggregated substrate and the size of the product substrate. The dividing grooves are formed with a sufficient margin so as not to adversely affect the conductor pattern constituting the circuit, and are formed at a distance of about 100 to 250 占 퐉 from the conductor end in plan view. The divided grooves are, for example, V-shaped grooves, and the depth thereof is, for example, when the divided grooves are placed on the upper and lower sides so that the sum of the groove depths on both sides becomes 30% or less of the thickness of the green multilayer ceramic body. do. This depth varies depending on the thickness of the green multilayer ceramic body, but is generally set at about 0.01 to 0.2 mm. This is because when the depth is too deep, the cutter is poor in deformation, which tends to cause deformation, and thus becomes a starting point of cracking during the sintering process. In addition, the dividing groove does not necessarily need to be formed on both surfaces, and may be either one of the upper surface and the lower surface.

In addition, the dividing method may be not only a method of dividing along a V-shaped groove, but also a dicing or scribing method after a later firing step without forming a groove.

Next, the unfired multilayer ceramic body is integrally fired at a sintering temperature of 800 to 1000 ° C. in a firing furnace (S10). In this step, in the cross section of the via hole, as illustrated in FIG. 2A, the surface F of the surface layer via electrode which is a part of the external terminal electrode and the outermost surface of the ceramic substrate layer S are approximately. It is on the same side.

[Etching of the surface via electrode]

In the present embodiment, the surface via electrode (here, Ag) is immersed in an etching solution having a function of dissolving, thereby removing a part of the surface via electrode (S11). That is, in this step, in the cross section of the via hole, as illustrated in FIG. 2B, the surface F of the surface via electrode is located in the via hole with respect to the ceramic substrate layer surface S of the outermost surface. It is etched to the position where it becomes concave. In addition, in the following description, after a plating layer is formed on this surface via electrode, the surface here is called a cross section, and it distinguishes. Here, as the etching solution, a mixed solution containing any one of nitric acid, aqua regia or hydrogen peroxide can be used. When the conductor material to be used is copper or an alloy containing copper as a main component, ammonium persulfate can also be used as an etching solution. Thereby, the surface of the surface via electrode can be recessed with respect to the surface of the ceramic substrate layer of the outermost surface, and a preferable surface property can be obtained. Thereby, Ni plating, Au plating, etc. can be formed into a high quality film on an electrode in a post process. That is, by using etching liquid, Ag stuck to the unevenness | corrugation of a via hole inner wall can also be melt | dissolved and removed, and can contribute to the sticking strength (anchor effect) improvement. Moreover, by performing this etching process, since the via hole surface becomes wet enough and a micro bubble is removed, the defect by the micro precipitation defect in a subsequent plating process can be prevented.

In dissolving the surface via electrode, the type, concentration, and temperature of the etching solution are adjusted to obtain a sufficient etching effect without causing damage to the electrode and lowering the adhesion strength between the electrode and the ceramics. . This adjustment is to be set experimentally and empirically, but for example, 1 to 20% by volume in nitric acid, 1 to 25% by volume in aqua regia, 1 to 30% by volume in etching solution containing hydrogen peroxide, and 1 to hydrochloric acid. It is preferable to contain 30 volume%. It is also necessary to pay sufficient attention to the stirring method in the etching bath. In each etching step, the remaining electrode thickness is measured using a measuring method such as fluorescent X-ray, and compared with the thickness before etching to confirm the etching reaction rate and to strictly control the process conditions. In addition, when the component of an etching liquid contains a component which is easy to volatilize, or a component which is easy to decompose, it is preferable to collect a sample of a liquid regularly, and to titrate and monitor the density | concentration for every component. The monitoring of the concentration of the etched conductor metal eluted in the liquid is also performed on a regular basis as well.

In addition, about quantitative control, such as the depth of a recessed part by etching, it controls by the kind, density | concentration, and temperature of etching liquid. However, if the concentration is extremely thin, for example, the performance of the etching liquid is likely to deteriorate with only a small amount of processing, and it is necessary to adjust the frequency frequently so that the concentration is not too thin. Moreover, since the main component of etching liquid is often volatile, it is suitable to set temperature as 50 degrees C or less. This is because if the temperature is higher than this, the concentration of the etching solution and the compounding ratio of the components are likely to change. In addition, stirring operations such as circulation of the etching liquid and vertical movement and rotation of the ceramic substrate are effective for controlling the reaction speed including the uniformity of the etching liquid. After combining these adjustment methods, it is preferable to perform fine adjustment at the etching process time, monitoring each batch of batch or every lot.

For such etching treatment, in addition to the method of immersion in the etchant, a method of applying the etchant as transferred to a roller-shaped coating head, a method of spraying the etchant in a fractional shape from the bottom, or the like on a horizontally held ceramic substrate may be employed. do. In these methods, the end portion of the substrate to be held may be sealed by pressing with rubber packing or the like, so that the etching liquid on the opposite surface can be prevented from being returned to each single surface. What is necessary is just to select the surface to seal with a packing material according to a design of an apparatus, and the kind and property of etching liquid. Usually, since a small surface layer terminal electrode is unevenly distributed on the upper surface on which semiconductors or small chip components are mounted, the structure of the surface layer terminal electrode of the present invention is effective for such an upper surface layer. However, the lower surface layer (bottom surface) on the opposite side is often provided with only about 20 to 30 LGA (LAND GRID ARRAY) electrodes having a large dimension of 1 mm or more. In the surface layer (bottom surface), the terminal electrode structure of this embodiment may not necessarily be required. In such a case, the one-sided treatment is often effective. Single-side treatment is also excellent in environmental load, such as the minimum amount of water required for the subsequent rinsing step, and also has an advantage on the manufacturing process in which the design of equipment including drying and the overall process management are easy and inexpensive.

[Metal Plating Layer]

By the way, after an etching process, sufficient rinse is performed (S12) and plating is continued (S13). In this plating process, it is common to perform electroless plating so that plating may be uniformly formed even in a component having a complicated circuit structure. As an example, Ni based plating 3-10 micrometers, and then Au plating 0.03-0.5 micrometer are deposited. Here, in order to prevent the chemical reaction such as unwanted diffusion when Ni-based plating layer is used as a product, the buffer layer may be plated between Au plating.

 By this plating process, as shown to Fig.2 (c), the metal plating layer M is deposited on the surface via electrode F, and the surface MF of this metal plating layer and the ceramic substrate layer of the outermost surface are deposited. The surface S is approximately flush with the surface (as described later, so that the protrusion is less than the thickness of the metal plating layer (up to 3 m in the above example)). Specifically, since a solder ball or the like is placed on the surface of the metal plating layer, it is preferable not to protrude largely and to not form a deep recess. As this range empirically, it is 3 micrometers or less from the ceramic substrate layer surface S of outermost surface in the direction which becomes a convex part, More preferably, it is about 3 micrometers from the ceramic substrate layer surface S of the outermost surface in the direction which becomes a recessed part. It is preferable to be in a deep position and to be a depth to 10 micrometers or less. By the above, the surface layer terminal electrode which consists of surface via electrode F and the metal plating layer M adhered on the upper surface (cross section) is formed. At this time, it is important that the metal plating layer is closely adhered along the unevenness without voids or gaps between the end face of the surface layer via electrode and the inner wall of the via hole.

[In the case of non-shrinkage method]

In addition, after the step S9 and the formation of the divided grooves, a restraining green sheet that restrains the substrate from shrinking during firing may be disposed on the surface of the green multilayer ceramic body, and a so-called non-shrinkage method may be used. Herein, the green sheet for restraint fabricates a ceramic slurry in which an organic binder, a plasticizer, and a solvent are added to an inorganic material that is not sintered at the firing temperature of the green multilayer ceramic body. , 100 to 200 m).

The ceramic material used for the restraining green sheet does not sinter at the firing temperature (about 800 to 1000 ° C) of the glass ceramic material used for the ceramic green sheet, and may have a function of not shrinking the surface of the green multilayer ceramic body. . It is common to use alumina as an inorganic material. Moreover, the thing similar to what was used for the ceramic green sheet can be used for an organic binder, a plasticizer, and a solvent.

Then, prior to the sintering step, the restraint green sheet is positioned on the top and bottom surfaces of the microcrystalline multilayer ceramic body, respectively, and laminated so that the restraint green sheet has a thickness of about 200 µm, and in the CIP apparatus, 10 to 40 By thermocompression bonding at MPa (100-400 kgf / cm <2>) and 85 degreeC, the laminated body which integrated the restraint layer which consists of restraint green sheets, and a microcrystalline multilayer ceramic body is obtained.

Next, this laminated body is integrally baked at 800-1000 degreeC which is the temperature which a micro multilayer ceramic body sinters, carrying out binder removal of a restraint layer suitably in the baking furnace in process S10.

In this way, when the restraining green sheet is used, most of the inorganic particles after firing can be easily removed, but inorganic particles remaining on the surface via electrode may not be easily removed. In such a case, it is effective to perform ultrasonic cleaning to remove residual inorganic particles. Ultrasonic cleaning in the etching solution as well as the pretreatment of the etching (process S11) is preferable because the surface of the surface via electrode Ag can be etched and the inorganic particles can be removed. In addition, in the rinsing step S12, ultrasonic cleaning may be performed to ensure cleaning.

[Shape Holes and Shapes of Surface Terminal Electrodes]

By the way, in forming the via hole of process S3, you may form the via hole in the taper hole shape which spreads toward the outermost surface S, as illustrated in FIG.

The tapered shape of the via hole increases the lateral distance of the ceramic in contact with the metal plating layer, further increasing the area of the metal plating layer in contact with the inner wall of the via hole and increasing the anchor effect, thereby contributing to the increase in strength. . In particular, since the via hole inner wall surface has a concave-convex shape intertwined with each other in reality, the effect is great. On the other hand, in the case of a straight concave portion having a deep through hole, the metal plating layer may hardly be precipitated closely from the bottom of the concave portion, and a plating solution or the like tends to be introduced into the uneven surface of the inner wall of the via in the middle.

On the other hand, when the via hole is tapered, the plating liquid is easily circulated from the relatively wide opening to the inside of the relatively narrow via, so that the growth rate of plating can be maintained quickly and uniformly. If it is to a depth of about 15 micrometers, it is possible to grow a plating to substantially coplanar height with the surface of a ceramic substrate layer within practical plating time. At this time, the metal plating layer is deposited from the bottom portion of the via as if filling the via hole without gaps sequentially, thereby preventing the plating chemical from being left in the minute uneven portion of the inner wall of the via. Therefore, the adhesiveness of the metal plating layer to an inner wall of a via improves, and contributes to improving the mechanical joint strength by the anchor effect. In addition, it is difficult to cause problems such as plating liquid remaining inside to cause bleeding and corrosion later. However, the direction of the tapered hole is not limited, and the via hole may be formed in a tapered shape that narrows toward the outermost surface, for example.

In the multilayer ceramic substrate produced by the method of the present embodiment, as shown schematically in FIGS. 2C and 4, the surface of the surface terminal electrode first has a surface layer via electrode with respect to the ceramic substrate surface S of the outermost surface. This surface F is formed so that it may be in a recessed position. In addition, a metal plating layer is deposited on the surface via electrode, but the surface MF of the metal plating layer is also in a substantially coplanar or recessed position with the ceramic substrate surface S of the outermost surface.

The surface via electrode is fired together with firing of the ceramic substrate in the firing step (S10). At this time, the boundary (empty hole inner wall surface) between the metal material of the surface via electrode and the ceramic substrate is taken into a concave-convex concave-convex shape, and it is considered that the anchor effect is exerted and mutual adhesion is produced. In the range of the firing temperature of 850 ° C to 1000 ° C, silver (Ag) and copper (Cu), which are materials of the surface via electrode, react with each other at the interface with the ceramic to diffuse and increase adhesion. Contributes to raising.

In addition, although the boundary between a surface layer terminal electrode and a ceramic substrate is shown typically linearly in FIGS. 2-4, unevenness | corrugation is formed as shown in FIG. 13 and FIG.

As shown in the scanning electron micrograph (magnification: 3000 times) of FIG. 13, the cross section of the surface terminal electrode 4 is shown, the Ni base plating layer (hereinafter simply referred to as "Ni base layer") 3a is the surface via electrode 2. There is no vacancy or a gap between the cross section F of the cross section. Similarly, the Ni-based plating layer 3a is in close contact with the unevenness of the inner wall of the via without voids or gaps. As described above, the metal plating layers 3a and 3b are precipitated along the unevenness, and the interface is closely matched (no gap), and the length and the width of the interface affect the connection strength.

As illustrated in FIG. 14, the adhesion length L of the interface is the depth (thickness) of the ceramic substrate between the start point ds and the end point de that the metal plating layer 3 closely matches the via inner wall. It measured by drawing a virtual center line in the direction of), and the length is 2 micrometers or more. Although it is considered that the connection length increases as the length increases, there are also manufacturing restrictions such as etching accuracy and effort when removing the surface layer via electrode described above, and therefore the preferred range is about 3 to 8 µm. The concave-convex width w of the interface passes through the point (the point closest to the center of the hollow hole) of the largest convex portion between the start point and the end point of the metal plating layer 3 closely matching (no gap). In an imaginary line parallel to the center line and a parallel line parallel to the imaginary line, an imaginary line passing through the point of the least concave portion (the point furthest from the hollow hole center) is drawn, and the distance between both lines is measured as the uneven width w. As a result, it is preferable that this uneven | corrugated width w shall be 0.6 micrometer or more. The uneven width (w) includes the heat shrinkage behavior of the ceramic material used, the heat shrinkage behavior of the conductor material filling the via hole, the precision of the via hole processing, the residue after processing in the case of laser via processing, the inner wall of the via hole or the surrounding heat. It depends on many factors, including the shape and size of the affected area. Laser processing conditions are effective as process parameters that are easy to control, and major processing conditions such as energy, pulse width, and the number of shots can be changed to affect factors such as heat affected zones. The preferable range of the uneven | corrugated width w is about 0.9-5 micrometers empirically.

In addition, when the metal plating layer 3 has the Ni base layer 3a and the Au coating layer 3b, the nickel base layer 3a having a relatively high strength traces the unevenness of the inner wall of the via hole. The close contact with the inner wall is also believed to contribute to the strength improvement. That is, the Young's modulus of nickel (Ni) is 200 GPa, which is higher than 83 GPa of silver (Ag) and 130 GPa of copper (Cu), which are materials of the surface via electrode 2, and thus nickel (Ni) is used. It is possible to maintain the state in close contact with the inner wall of the via hole more strongly and to resist external force, and to sufficiently exhibit the anchor fixing effect. Here, it is preferable that the thickness of the nickel (Ni) base layer 3a is 3 micrometers or more, and the more preferable range is 4-8 micrometers.

[Shear strength]

13 and 14 illustrate a cross section of the surface layer terminal electrode 4 in the multilayer ceramic substrate of the present embodiment, but in the conventional general substrate shown in FIG. 17, the via wiring is extended to the outermost surface and continuous to the via wiring. The cross section of the surface via electrode 2 connected to the surface is substantially the same as the surface S of the outermost ceramic substrate, or protrudes from the outermost ceramic substrate surface S. FIG. In this conventional example, the surface terminal electrodes are in close contact with each part R of the surface side opening of the via hole, and stress is concentrated when an external force is applied from the transverse direction as in the shear strength test. These easy parts are likely to be the starting point of destruction.

On the other hand, as illustrated in FIG. 2 (c), FIG. 4, or FIGS. 13 and 14, the end surface of the surface layer via electrode 2 which extends the via wiring toward the outermost surface and is continuously connected to the via wiring ( F) is recessed in the depth direction of the via hole from the surface S of the outermost surface ceramic substrate 1, and the metal plating layer 3 deposited on the end surface F of the outermost surface ceramic substrate 1 When the surface S is in substantially the same plane or recessed position, the upper edge of the surface via electrode 2 is in close contact with the via hole inner wall surface, and the surface side of the via hole is likely to be damaged by concentration of stress. It is not in close contact with each part of the opening part. Here, substantially coplanar means the state which protrudes from the surface S of the outermost surface ceramic substrate 1 by the quantity less than the thickness of the metal plating layer 3 (for example, 3 micrometers or less). Although the metal plating layer 3 may be deposited on each part of the surface side opening part of a via hole (the metal plating layer 3 does not necessarily need to spread by the diameter of a via hole, the recessed part of the surface layer via electrode 2 surface is shallow). In this case, the outermost surface side of the metal plating layer 3 may protrude somewhat from the surface S of the outermost surface ceramic substrate 1 to spread out in an umbrella shape), and this protrusion may be up to 3 µm. If it is 3 micrometers or less, even if the interface length in close contact with the inner wall of a via hole is about 2 micrometers, the anchor effect is excellent and damage can be avoided. In addition, although there is an anchor effect due to interlocking irregularities between the material constituting the metal plating layer 3 and the ceramic substrate, the chemical reaction and the mutual diffusion are smaller than the material of the surface via electrode 2. Therefore, the stress concentration as it leads to fracture is difficult to be laid down, and consequently, it is considered to be high strength.

In addition, a shear strength test is a test which measures the intensity | strength of the surface electrode of an LTCC board | substrate, As illustrated in FIG. 5, the surface layer terminal electrode (surface layer via electrode Ag and metal plating layer) which contact | connects the lower layer wiring E as shown in FIG. (MF)), and the shear test tool T which mounts the solder ball B and has a surface substantially perpendicular to the ceramic substrate surface S, has a constant height (for example, from the ceramic substrate surface S). In the state held at 30 占 퐉, the parallel movement is performed at a predetermined movement speed (for example, 0.2 mm / s), and a shear force is applied from the transverse direction to the solder ball B to measure the breaking strength. .

Since this breaking strength changes also with the area (pad area) of the surface of a metal plating layer, you may normalize and evaluate the measured value of the breaking strength measured by this test using the pad area measured beforehand.

In addition, as in the conventional general structure, when the metal plating layer 3 is deposited on the surface of the surface via electrode 2 on approximately the same surface as the surface of the ceramic substrate on the outermost surface, as shown in FIG. 17, the metal plating layer The end of (3) has a tip shape and abuts on the surface S of the ceramic substrate (Q). Therefore, when an external force is applied from the transverse direction as in the shear strength test, the stress tends to concentrate on the end of the sharpened metal plating layer, which easily becomes a starting point of failure. Usually, since nickel (Ni) having high strength can be used as the base layer as the metal plating layer, the possibility of causing stress concentration and becoming a starting point of breakdown becomes higher.

In the multilayer ceramic substrate of this embodiment, as illustrated in FIGS. 2C and 4, the surface of the via electrode is recessed in the depth direction of the via hole from the surface of the outermost ceramic substrate, and above (cross section). ), When the metal plating layer deposited is in the same plane (protruding from the surface by less than the thickness of the metal plating layer (for example, 3 µm or less)) to the recessed position of the outermost ceramic substrate, The edge part does not become a tip shape, but strongly adheres on the entire circumferential surface of the via hole inner wall. For this reason, since it is a structure in which the fracture by stress concentration is hard to occur, it becomes high strength.

Therefore, the shear strength test results when the diameters of the solder balls were 300 µm and 125 µm while varying the depth d from the surface of the outermost surface ceramic substrate to the surface of the surface via electrode were shown in Table 1 below. It shows in Table 2 (when solder ball diameter is 300 micrometers), and FIG. In addition, the thickness of a metal plating layer (Ni base layer + Au coating layer) is adjusted to 4-8.5 micrometers here, and in the Example, the surface of a metal plating layer has entered into the recessed position or the position which protruded below 3 micrometers. The depth d from the surface of the outermost ceramic substrate to the end face of the surface via electrode is divided by the via hole diameter (the smaller the hole, the closer the pad diameter is) φ. This is because the larger the via hole diameter, that is, the larger the pad diameter, the greater the moment relative to the external force and the easier it is to break.

Since these actual measurement results change substantially linearly, when these results are displayed in a straight line by the first regression, the straight line showing the shear strength f is assuming that the solder ball diameter is 125 µm.

f = -0.0747 × (d / φ) +0.006

And the solder ball diameter is 300 μm,

f = -0.0713 × (d / φ) +0.0028

It becomes In addition, the value of d is taken here so that it may become positive (+) when protruding and negative (-) when it protrudes, making the surface of the outermost ceramic substrate into a reference | standard (+/- 0) (the following description). And so on).

Here, the strength per unit area of the surface terminal electrode is sufficient as long as 0.0064 gf / μm ² can be obtained when the solder ball diameter is 125 μm. This is equivalent to the strength of about 50 gf per electrode for a surface terminal electrode having a diameter of 100 μm, and in general, the absolute strength of about 500 gf is considered as a whole considering that there are 10 or more connection electrodes per semiconductor chip. It is a value equivalent to what can be obtained. In general, a gap between the semiconductor chip and the ceramic substrate is filled with a resin material called underfill, which may further provide a reinforcing effect.

When the solder ball diameter having a relatively large moment of shear force is 300 µm, the point where the shear strength test tool contacts the solder ball becomes high, and the moment of force becomes large, so that the target value of strength decreases spontaneously. Although the contact point height when the solder ball diameter was 125 micrometers was an average of 45 micrometers, the contact point height when the solder ball diameter was 300 micrometers was 103 micrometers. The moment of shear force (shear strength) is 2.29 times accordingly. Here, when solder ball diameter was 300 micrometers, it was judged that the required intensity | strength per unit area should just be 0.0028 gf / micrometer <^2> or more. When the solder ball diameter is large, the diameter of the surface terminal electrode is generally designed to be large in accordance with it. Since at least 150 micrometers or more of diameters are normally selected, when it corresponds to the intensity | strength of about 49 gf per electrode at that time, and 10 or more connection electrodes exist, the absolute intensity of about 500 gf can be obtained as a whole.

As mentioned above, when d / phi <0, when a solder ball diameter is 300 micrometers, a condition is satisfied. Moreover, when the solder ball diameter which the moment of shear force becomes comparatively small is 125 micrometers, a condition is satisfied by setting it as d / phi <-0.005. At this time, the diameter of the surface terminal electrode could only be measured up to 150 µm. This is because the solder ball becomes flat at a diameter larger than that, so that shear strength cannot be measured.

Moreover, when d is too deep, it becomes a cause of a defect and is not preferable also in manufacture. Since it is against the request of miniaturization, it is preferable to make depth into the depth of about 15 micrometers or less. This is because, in the case of a compact and high-density component, the thickness of each layer of the ceramic substrate including the outermost surface layer may be 15 µm or less, and the depth exceeds the thickness of the layer. That is, when the surface layer terminal electrode has a diameter of 100 µm, the depth d can satisfy d / φ <-0.005 by making or having a depth of 0.5 µm, and assuming a high-density ceramic substrate. When the depth (d) is a concave portion having a maximum of about 15 μm in practical use compared to the layer thickness of a thin, high-density ceramic substrate, when the diameter of the surface terminal electrode is 125 μm, it is about d / φ ≧ -0.12. desirable. In addition, since the depth of the surface via electrode is less than 15 μm (d> -15 μm) and the thickness of the metal plating layer (Ni + Au) is adjusted to 4 to 8.5 μm, the surface of the metal plating layer is 10 μm from the substrate surface. It is in depth less than. When it protrudes, it is preferable that the self-alignment effect of naturally entering a stable position can be obtained when the solder ball is placed on the surface by placing the solder ball on the order of 3 µm or less. In addition, the stability of the solder ball is relatively improved, which is preferable.

Thus, from the results in Table 1 and Table 2, the depth d to the cross section of the surface via electrode when the surface of the ceramic substrate layer at the outermost surface is ± 0 (neg, the inside of the substrate is negative), and the via Bonding strength between components by adjusting the depth d from the surface of the outermost ceramic substrate to the surface of the surface via electrode so that the ratio d / φ to the hole diameter φ becomes a negative value of -0.12 or more. Can improve.

According to this structure, it is possible to maintain a high shear strength even when using a combination of smaller surface layer terminal electrodes and smaller solder balls (100 μm or less in diameter), thereby realizing a multilayer ceramic substrate that can be more compact and cope with high integration. have.

[Tension test]

Moreover, the effect of this Example was confirmed not only by the shear test mentioned above but by another evaluation method. For example, as shown in Fig. 7, the solder ball is sandwiched between the sides by applying a push from the side with a chucking mechanism or the like, and pulled up to the vertical (upper surface of the board) with a force. Fracture test, i.e., strength in tensile test was also evaluated. Table 3 shows the results of the tensile test. In this case, unlike the shear test, since stress concentration does not occur in the tip portion, it is considered that only the effect of improving the strength due to the adhesion of the metal plating layer, especially high strength nickel, to the inner wall of the via hole can be evaluated. Therefore, although the strength improvement effect of this Example was about half or less compared with the shear test, it was confirmed that high strength was also obtained about 2 to 30% similarly. In addition, in the case of a tensile test, since a solder ball must be hold | maintained mechanically, evaluation was performed using the large solder ball of (phi) 500micrometer.

In addition, although the test results in the state where the solder balls were mounted on the microelectrodes one by one are described so far, the semiconductor electronic components, which are one of the actual surface mounting components, are mounted, so that the shear strength and the pull strength Was measured, and the same strength improvement effect was confirmed. In the case of an actual semiconductor electronic component, the number of solder balls when connecting with a ceramic substrate is in the range of 10 to 100, sometimes 1000 or more. The number varies depending on the purpose and function of the semiconductor electronic component, and the dimensions of the surface electrode for the connection and the thickness of the semiconductor electronic component are also various, so that the moment due to the test load is different. Is omitted.

In addition, in the present embodiment, when the via hole is tapered, the contact distance between the metal plating layer and the via hole side surface (empty hole inner wall) increases as described above. In addition, the contact area between the surface via electrode and the via hole inner wall also increases. Thereby, intensity | strength can be improved more. Moreover, by making the taper shape which spreads toward the outermost surface in this way, circulation of the plating chemical at the time of metal plating layer formation becomes easy, residual | survival in an unevenness | corrugation is reduced, and the clearance gap of the interface between a ceramic substrate and a metal plating layer can be made smaller. Can be. In addition, the problem of corrosion resistance due to the residual plating solution is less likely to occur.

[Length and Width of Uneven Inner Wall of Empty Hole]

Next, the shape of the surface terminal electrode was observed for the multilayer ceramic substrate used in the tensile test. The sample grind | polished the cross section of a multilayer ceramic substrate, and formed the observation surface, and photographed the surface terminal electrode vicinity using the scanning electron microscope (magnification: 3000 times). The example is shown in FIG. 13, and a trace is shown in FIG. Since minute unevenness | corrugation was formed in the inner wall of a via hole, the interface surface of this unevenness | corrugation and a metal plating layer was measured. As shown in FIG. 14, the virtual center line was drawn between the starting point ds and the end point de of the interface in the depth (thickness) direction of the ceramic substrate to measure the adhesion length L of the interface. In addition, an imaginary line passing through the point of the largest convex portion (the point closest to the hollow hole center) between the start point and the end point, and a imaginary line passing through the largest convex portion at the minimum concave boundary plane in a parallel imaginary line parallel to the imaginary line. Then, the distance between both lines was measured as the uneven width w. Shear strength is 0.0064 gf / μm ² or more at the solder ball diameter of 125 μm and 0.0028 gf / μm ² or more at the solder ball diameter of 300 μm as in the above embodiment, and the tensile strength is 0.046 gf at the solder ball diameter of 500 μm. It is based on / micrometer ² or more. Table 4 shows the measurement results.

Although the contact length and uneven | corrugated width | variety of an unevenness | corrugation are considered to mutually mutually influence each other, when the adhesion length of an interface surface is 2.2 micrometers (other than Example 3-13) or more from Table 4, the uneven | corrugated width is 0.9 micrometers ( More than Example 3-13), a tensile strength of 0.048 gf / μm ² or more can be obtained. Moreover, the minimum 0.0028 gf / micrometer <^2> or more minimum in each Example was obtained also about the shear strength separately performed. Therefore, from the result of the Example and comparative example of Table 4, it is considered that the minimum of a contact length is 2 micrometers, and the minimum of uneven | corrugated width is 0.6 micrometer. On the other hand, the difference in tensile strength is not so much that the adhesion length is 7.8 탆 (Example 3-1) and 11.9 탆 (Example 3-5). Since the improvement effect is not seen in the tensile strength which is considered that the dependence of a close contact length is high, a close contact length is considered to be enough as about 8 micrometers at maximum. In addition, the larger the uneven width, the more the strength tends to increase. On the other hand, similar results were obtained for the shear strength which is considered to be highly dependent. Unevenness of the inner wall of the via hole is strictly difficult to control, but from the results of the experiment, it is assumed that a maximum of about 5 μm is sufficient.

[Other Forms of Surface Via Electrodes]

The conductor paste for via conductor used in the Example by the said 1st manufacturing method is 88-94 mass% of silver (Ag) powder with an average particle diameter of less than 3.0 micrometers. If the average particle diameter of Ag powder is 3.0 micrometers or more, the filling property to the small diameter via of less than 80 micrometers of diameter (phi) at the time of printing will worsen. If the Ag powder is less than 88% by mass, the shrinkage amount of the paste is large, and as will be described later, the surface of the surface electrode terminal tends to be concave immediately after firing, even without etching, which is a form of the above embodiment. Moreover, when Ag powder is more than 95 mass%, a viscosity will become high and pasting becomes difficult. In addition, Pd powder may be added to the via conductor paste in order to further increase the via filling after firing. By containing Pd, sintering of Ag is suppressed and there exists an effect of preventing shrinkage before ceramics.

This conductor paste for via conductors can also be used as a conductor paste for conductor patterns formed on the surface of a ceramic green sheet. Since the conductor paste for via conductors has the same effects as described above, even if the via paste and the conductor paste forming the conductor pattern are made of the same material, the characteristics and functions as the via conductor and the surface conductor pattern can be exhibited satisfactorily. have.

In the above description, the surface of the surface via electrode is removed by etching so that the surface of the surface via electrode is recessed from the surface of the ceramic substrate layer on the outermost surface. However, the process and material shown here are an example and are not limited to this.

For example, for the ceramic green sheet on the surface layer, a conductor paste having a volume shrinkage ratio greater than the volume shrinkage ratio at the time of sintering is used, and for each ceramic green sheet laminated on the other lower layer, the conductor used in the first embodiment is used. By using a paste or the like, via conductors (via wires) and conductor patterns (circuit wirings) are formed in accordance with the desired circuit. Table 5 shows examples and comparative examples of such conductor pastes.

As shown in the example of Table 5, the filling of the via may be insufficient due to shrinkage, but a gap may occur, but the filling of the via is made by containing palladium (Pd) powder and adjusting the content (mass%) of silver (Ag). You can recover. In order to obtain a desired shrinkage (d <0, and there is no gap), those shown in Examples in Table 5 may be used. 9 and 10 show the results of measuring the shear strength and the tensile strength while varying the content of Ag powder for each example in which the solder ball is 125 µm for the example of Table 5. 11 and 12 show changes in shear strength and tensile strength when the Ag powder content is 73 mass% and the Pd content is changed. 9 and 10, for example, when the silver (Ag) powder having an average particle diameter of less than 3.0 µm is 65 to 85 mass%, desired shear strength and tensile strength can be obtained. In addition, it is preferable from FIG. 11 and FIG. 12 that Pd content is less than 3 mass%. Moreover, it is preferable that Pd content becomes 0.1 mass% or more from a via filling property.

Therefore, it is preferable that Ag powder is 65-85 mass%, Pd content is 0.1 mass% or more and 3 mass% or less, and Ag and Pd powder total amount may be 65.1-88 mass%. Thus, as the paste used for the surface electrode, the content of Ag powder is small, and the volume shrinkage of the conductor paste after firing is larger than that of the ceramic green sheet. Therefore, the surface of the surface via electrode after firing is recessed from the surface of the ceramic substrate layer at the outermost surface. It becomes the indent position.

In this case, in the ceramic green sheet which becomes the ceramic substrate layer of the outermost surface, a via conductor (via wiring) and a conductor pattern (circuit pattern) may be simultaneously formed in the via hole by one printing. That is, you may form these via conductor and conductor pattern from the conductor paste of the same material.

According to this aspect, the via conductor of the ceramic green sheet of the surface layer using the conductor paste shrinks more during firing, and the surface of the surface via electrode is recessed in the substrate (inside the hollow hole) than the surface of the ceramic substrate layer. Done. Therefore, the surface layer terminal electrode structure in this embodiment can be obtained. However, as the volumetric shrinkage rate is different, there is a tendency for a vacancy or gap to occur between the via hole inner wall. Therefore, the plating chemical easily enters the unevenness of the inner wall of the via hole. However, for the via wiring and the internal wiring of the lower layer, the conventional conductor paste as described above is used, so that the volume shrinkage during firing is about the same as that of the ceramic substrate. Therefore, in the lower layer, defects such as voids and gaps do not occur between the via conductor and the via hole inner wall, and the penetration of the plating liquid can be prevented here, and the problem of corrosion resistance can be avoided.

In this case, the etching process of the process S11 shown in FIG. 1 is not necessarily required. However, you may use combining an etching process. In addition, in the process shown in FIG. 1, you may perform a some process simultaneously as possible.

[Other example of manufacturing method of multilayer ceramic substrate]

Moreover, another example of the manufacturing method of the multilayer ceramic substrate by a present Example is shown next. In this example, via holes are formed in the first ceramic green sheet to be positioned on the outermost surface side of the green multilayer ceramic body. This via hole is formed by laser processing and penetrates through the ceramic green sheet. Although the shape of the opening of the via hole is almost circular in plan view, in the ceramic green sheet, the diameter decreases as it goes from the incidence side to the exit side of the laser light, and is tapered in three dimensions. The diameter of the laser beam incident side of the opening is set to approximately 60 µm. In addition, the ceramic green sheet is formed on a support film, and the support film may use a chemically stable PET plastic (polyethylene terephthalate) film.

Next, using a screen and a squeegee, the silver paste is printed and filled into the via hole. In printing of a 1st ceramic green sheet, what is necessary is what is 65 mass% Ag content and 0.1 mass% Pd content in a conductor paste. In addition, when printing, not only the via hole is filled, but also the portion where the via hole does not exist may be formed with a conductor pattern according to design needs. In this case, the screen is provided with a mesh woven with a fine wire such as metal or nylon, and an image of a print pattern is formed by an oil agent or a metal foil adhered thereon. The image opening of the screen and the opening by laser processing of the ceramic green sheet are arranged to be aligned with each other, and printing is performed.

Next, a second ceramic green sheet laminated adjacent to the first ceramic green sheet of the microcrystalline multilayer ceramic body is produced. Also in this 2nd ceramic green sheet, forming a via hole by laser processing is the same as that of a 1st ceramic green sheet. However, in the second ceramic green sheet, the laser beam incident side diameter of the opening does not necessarily have to be the same as the diameter of the first ceramic green sheet.

Next, the silver paste is printed and filled into the openings using the screen and the squeegee. In the printing of the second ceramic green sheet, an Ag content of 85% by mass and a Pd content of 0.3% by mass in the conductor paste are used, and the other screens and the squeegee are similar to those of the first ceramic green sheet. Hereinafter, the third ceramic green sheet is also produced in the same manner as the second ceramic green sheet.

Finally, the final ceramic green sheet which is located on the outermost surface side opposite to the first ceramic green sheet in the microcrystalline multilayer ceramic body is produced. The procedure for forming the via hole opening portion by laser processing is the same as that of the first and second ceramic green sheets. Next, the silver paste is printed and filled into the openings using the screen and the squeegee. In the printing of the final ceramic green sheet, one having 65 mass% Ag content and 0.1 mass% Pd content in the conductor paste may be used.

The first ceramic green sheet, which is located on the outermost surface side of the green multilayer multilayer ceramic body, is set on the fixing film, pressed in a mold at a predetermined pressure, temperature, and time to be pressed. For example, the pressure is 1 to 5 MPa (10 to 50 kgf / cm 2), the temperature is 30 to 60 ° C., the time is 3 to 15 seconds, or the like. The mold above and below thermocompression bonding should just be a flat plate shape incorporating a heater. After the pressing by the press is completed, the carrier film of the ceramic green sheet is peeled off. At this time, the green sheet is fixed to the film for fixing and does not peel together at the time of peeling of a carrier film.

Next, a second ceramic green sheet is laminated. It is assumed that the conductive pattern constituting the internal circuit wiring is printed on each ceramic green sheet. One surface of the ceramic green sheet is set to be in contact with the ceramic green sheet of the first layer, and is pressed and pressed in the same manner as in the case of the first ceramic green sheet. At this time, when the press temperature is a temperature at which the pressure-sensitive adhesive in the printing paste softens and adheres, the printing portion is bonded to the counterpart ceramic green sheet by pressing force. Therefore, ceramic green sheets are bonded through a printed conductor paste. In addition, the places where the ceramic layers are in direct contact with each other without electrodes are softened and fixed and bonded as in the case of interposing the electrodes. Although the crimping | compression-bonding temperature at this time also depends on the kind of adhesive, what is necessary is just a low temperature about 40-90 degreeC normally, and joining strength can be adjusted by changing a pressing force. After the pressing, the carrier film of the ceramic green sheet is peeled off. After the third ceramic green sheet, the final ceramic green sheet is laminated in the same process as the second ceramic green sheet. Moreover, in order to integrate a laminated body strongly, you may remove a film for fixation after laminating | stacking the whole, and may perform a crimping process further.

It is the same as the above-mentioned embodiment that you may perform part or all of these series of crimping | bonding, peeling, and lamination | stacking in the atmosphere which reduced pressure. Thereafter, the green micro multilayer ceramic body is further inverted, and a surface conductor pattern is printed and formed on the outermost surface opposite to the first ceramic green sheet. In addition, an insulating paste may be printed and formed on the surface of the first ceramic green sheet side of the microcrystalline multilayer ceramic body and the outermost surface opposite to it as necessary. In this way, the final crimping step may be performed on the entire green multilayer ceramic body having completed the printing and laminating steps to ensure integration and flattening.

Thereafter, the above-described microcrystalline multilayer ceramic body is appropriately formed with a shallow groove for dividing, and cut into a size that is easy to handle, and then sintered. Sintering conditions are made into 900 degreeC and about 2 hours in an atmospheric baking atmosphere, for example. In the firing atmosphere, by changing the moisture content and the oxygen concentration during the firing, it is often done to promote the evaporation or combustion of unnecessary components such as organic substances in the multilayer ceramic body and to control the reaction and diffusion in order to derive the performance of the material.

In the via hole of the thus obtained sintered multilayer ceramic body, a metal plating layer composed of a Ni base layer and Au coating is formed by electroless plating, thereby completing a multilayer ceramic substrate.

In fact, the cross-section of the multilayer ceramic substrate completed by the above-described method was observed, and the internal state was observed. The position of the surface via electrode is d = -2 μm, which is about 2.1 μm deeper than the surface of the ceramic substrate. The ratio (d / φ) with a diameter of 60 µm was -0.033. The total plating thickness of 4 micrometers of Ni base layers and 0.05 micrometers of Au coatings was 4.05 micrometers, and the surface layer terminal electrode containing plating protruded about 2 micrometers from the surface of a ceramic substrate. In the via via electrode of the multilayer ceramic substrate, there were no gaps between the via hole and the junction between the internal wiring.

In addition, the multilayer ceramic substrate is divided into individual pieces, soldered to a test printed circuit board, and placed in a constant temperature and humidity chamber to apply a DC voltage of + 4V to a path according to the original electrical design in an environment of 85 ° C 85% RH. High temperature, high humidity energization test ”was carried out. During the total test time of 1000 hours, there was no insulation failure and no appearance abnormality.

[Example by the non-shrinkage method]

Also, in the case of the manufacturing method using the constrained green sheet, in-plane shrinkage is prevented on the surface of the ceramic substrate. However, since the restraining force is weak in the thickness direction, some recesses are formed when the via electrode shrinks.

The multilayer ceramic substrate of this embodiment is manufactured by a process in which the non-contraction method is applied to the first embodiment described above. In this multilayer ceramic substrate, a plurality of ceramic substrate layers 1a, 1b,... This is laminated. In addition, the via hole 11 is formed in the ceramic substrate layer 1a of the outermost surface, and the via wiring 12 is formed inside this via hole 11. In addition, description about the cross section of FIG. 8 and the following description are not limited to any manufacturing embodiment, but are common to each Example mentioned above.

In the via hole 11, the surface via electrode 2 is formed. The surface of the surface via electrode 2 is in a recessed position than the surface of the ceramic substrate layer 1a at the outermost surface in the via hole 11 formed in the ceramic substrate layer 1a at the outermost surface. In other words, the surface via electrodes 2 are formed of ceramic substrate layers 1a, 1b,. It is electrically connected to the wiring pattern P of an image. That is, the surface via electrode 2 is in a state where the via wiring 12 extends toward the outermost surface and is continuously (electrically) connected to the via wiring 12.

In addition, a metal plating layer 3 is deposited on the surface of the surface via electrode 2, and the surface MF of the metal plating layer 3 is substantially flush with the surface of the ceramic substrate layer S of the outermost surface ( In-plane including protrusions by 3 µm or less from the surface S).

In the example shown in FIG. 8, the cross section of the via hole 11 forms a tapered shape with a larger diameter toward the outermost surface, and the metal plating layer 3 extends from the inner wall of the via hole 11 to the outermost ceramic substrate surface. It is attached (left end). This embodiment can also be regarded as approximately the same plane. However, the metal plating layer 3 does not need to be deposited on the surface of the ceramic substrate in the via hole 11.

In addition, although the surface of this metal plating layer 3 may protrude more than the ceramic substrate surface S of outermost surface, in that case, it will protrude 3 micrometers or more, and the diameter of the said protruding part will be a via hole 11 It may be larger than the diameter of). In addition, the diameter (phi) in the case of a tapered via hole shall use the diameter of the metal plating layer 3 seen from above.

[Electronic parts]

When using such a multilayer ceramic substrate, a surface mounting component is mounted on the surface of the metal plating layer 3 using solder balls, and an electronic component is comprised. This electronic component can be used, for example, in electronic devices such as mobile phones.

The electronic components to be mounted may include passive components such as capacitors, inductors, and resistors, as well as active components such as semiconductor products, and module components including an array in which a plurality of passive components are integrated. In the multilayer ceramic substrate of this embodiment, the cross-sections of all surface layer via electrodes corresponding to each of these electronic components do not have to be in a recessed position than the surface of the ceramic substrate layer on the outermost surface. In addition, the size of the via hole does not have to be the same. In other words, a via hole having a diameter of 60 μm may be formed in a portion where the semiconductor component is mounted, and a via hole having a diameter of 100 μm may be formed in a portion where the chip capacitor and the chip resistor are mounted. . Here, a via hole having a diameter of 60 µm is formed in a portion where the semiconductor component is mounted. In the case of the first ceramic green sheet, since the arrangement of the pads for semiconductor connection is narrow with a pitch of 150 to 200 µm, This is because the via diameter needs to be reduced in the portion corresponding to the narrow pitch.

In some examples, specifically, a semiconductor product having an outline size of 3 mm square and a thickness of 0.25 mm is flip chip mounted. Here, the shape of the flip chip connection pad formed on the mounting surface of the semiconductor product facing the multilayer ceramic substrate is approximately square with one side of 100 µm, and the spacing between the pads is between 150 µm and 200 µm depending on the place. You may make it different. The shape of the surface via electrode for flip chip connection provided on the surface facing the semiconductor of the multilayer ceramic substrate is approximately circular with a diameter of 100 µm, and the arrangement interval of the surface via electrode is consistent with that of the semiconductor product to be mounted. The passive components use two types of ceramic chip capacitors and chip resistors, 1 × 0.5 mm and 0.6 × 0.3 mm.

The multilayer ceramic substrate was produced as follows. The production of low-temperature sinterable ceramic materials and the production of ceramic green sheets are the same as described above. The via hole is formed in the first ceramic green sheet, which is located on the outermost surface side of the microcrystalline multilayer ceramic body. However, in the process of forming the via hole, the portion in which the semiconductor component is mounted at the time of mounting the upper surface part is mounted. The via processing of 60 micrometers in diameter (phi) is subjected to the via processing of 100 micrometers in diameter (phi) in the part where a chip capacitor and chip resistance are mounted.

In the case of forming these via holes by laser processing, via processing is performed with a via having a diameter of 100 µm first, followed by changing processing conditions such as an optical component such as a collimator inside the laser processing apparatus and pulse width and the number of shots. What is necessary is just to perform the via processing of (phi) 60micrometer. In addition, the order of which to process (phi) 100micrometer and (phi) 60micrometer first may be either. In this manner, via holes having different diameters are mixed in the first ceramic green sheet. It is also possible to form this via hole by a mechanical puncher. In that case, via holes of different diameters are processed in a single operation by placing pins of φ 100 μm and φ 60 μm at predetermined positions of the mold holding the processing pins. It may be difficult to process stably.

Next, using a screen and a squeegee, the silver paste is printed and filled into the via hole. The printing process of the conductor is performed by dividing a plurality of times. First, the via-processed part having a diameter of 60 µm on which the semiconductor component is mounted was subjected to 80% by mass of Ag content and 0.1% by mass of Pd content (paste having a relatively large volume shrinkage during sintering). Via filling printing is performed. After drying this conductor paste, the via-processed part with a diameter (phi) of 100 micrometers in which a chip capacitor and chip resistance is mounted is 90 mass% of Ag content, and 0 mass% of Pd content in the conductor paste (volume shrinkage at the time of sintering). Via filling printing is performed using this relatively small paste) and printing of the surface wiring pattern on the surface is also performed.

Next, a second ceramic green sheet laminated adjacent to the first ceramic green sheet of the microcrystalline multilayer ceramic body is produced. Also in this 2nd ceramic green sheet, forming a via hole by laser processing is the same as that of a 1st ceramic green sheet. However, in the second ceramic green sheet, the diameter of the via hole processing does not necessarily need to be changed depending on whether the component mounted on the upper surface is a semiconductor component or a chip capacitor or chip resistor. That is, the via holes of only one type of diameter may be used without mixing the via holes having different diameters.

That is, after the second ceramic green sheet, it is often possible to slightly widen the pitch by repositioning the wiring, and the via processing diameter is not limited to requiring a fine via such as φ 60 μm at all times. It is possible to match with the thing which it is easy to make bold. In addition, whether or not such fine vias are actually required from the ceramic green sheets of which layers depends on the design of the individual components and the multilayer ceramic substrate.

Printing to a 2nd ceramic green sheet performs via filling printing using 90 mass% Ag content and 0 mass% Pd content in a conductor paste. In addition, printing of the surface wiring pattern at the time of this printing may also be performed together. Similarly, via hole processing and conductor printing are also performed for the third and subsequent ceramic green sheets.

Next, the first ceramic green sheet, which is located on the outermost surface side of the green multilayer ceramic body, is set on the fixing film, pressed in a mold at a predetermined pressure, temperature, and time to be pressed. For example, the pressure is 1 to 5 MPa (10 to 50 kgf / cm 2), the temperature is 30 to 60 ° C., the time is 3 to 15 seconds, or the like. The mold above and below thermocompression bonding should just be a flat plate shape incorporating a heater. After the pressing by the press is completed, the carrier film of the ceramic green sheet is peeled off. At this time, the green sheet is fixed to the film for fixing and does not peel together at the time of peeling of a carrier film.

Pressing and laminating | stacking after a 2nd ceramic green sheet are performed similarly to the Example mentioned above, and a micro multilayer ceramic body is obtained.

Thereafter, the above-described microcrystalline multilayer ceramic body is appropriately formed with a shallow groove for dividing, or cut into a size that is easy to handle, and then sintered at 900 ° C. for about 2 hours and further plated. It is also performed in the same manner as in the above embodiment.

Thus, the via part of the obtained sintered multilayer ceramic body was observed and measured, and the depth d to the surface layer via electrode of the part which mounts a semiconductor component was -1 micrometer, and the filling property was favorable. The shear strength measured by mounting a solder ball having a diameter of 125 μm was 0.0069 gf / μm ² , and the tensile strength measured by mounting a solder ball having a diameter of 500 μm was 0.0496 gf / μm ² . In addition, the multilayer ceramic substrate was divided into individual pieces, soldered to a test printed circuit board, and placed in a constant temperature and humidity chamber to apply a DC voltage of + 4V to a path according to the original electrical design in an environment of 85 ° C 85% RH. High temperature and high humidity energization test ”. During the total test time of 1000 hours, there was no insulation failure and no appearance abnormality. When assembling a semiconductor component and assembling it as an electronic component, since the surface layer terminal electrode is substantially coplanar with the surface of the ceramic substrate, the self-alignment effect is also exerted without causing the solder ball to deviate from the center of the pad, and the assembly can be carried out with good precision. In addition, since the solder ball mounting method was used instead of the solder paste printing method for semiconductor mounting, it was a good connection state with almost no trace of void shape inside the solder after assembly.

In addition, another embodiment for producing a multilayer ceramic substrate for use in the electronic component according to the present embodiment will be described. In this embodiment, the production of a low-temperature sinterable ceramic material, the production of ceramic green sheets, and the formation of via holes are the same as those described above. When the silver paste is printed and filled into the via holes using a screen and a squeegee, The same applies to dividing the printing process into a plurality of times, but the filling process of the conductor paste is different for the portion where the passive components are placed.

In this embodiment, first, both the part which performed via processing of 60 micrometers in diameter (phi) on which a semiconductor component is mounted, and the part which performed via processing of 100 micrometers in diameter (phi) on which a passive component is mounted, such as a chip condenser and chip resistance, are performed. The via paste was printed by using 80 mass% Ag content and 0.1 mass% Pd content (relatively large volumetric shrinkage at the time of sintering), and after drying the conductor paste, a chip capacitor, a chip resistor, etc. Second conductor printing using 90 mass% of Ag content and 0 mass% of Pd content (relative volume reduction at sintering) in the area where the passive component is mounted and the surface wiring pattern part of the surface. Is done. In this way, conductors are printed on a portion where passive components such as chip capacitors and chip resistors are mounted to form surface pad electrodes. This part of the surface pad electrode does not necessarily have a clear two-layer structure, but includes a portion in which the two kinds of conductor pastes described above are mixed, and can be said to be a conductor structure having a concentration gradient.

The manufacturing method after a 2nd ceramic green sheet and the used conductor paste are the same as the method described in the previous Example. Incidentally, groove formation, sintering and plating for pressing, laminating, and dividing are also performed in the same manner as in the previous embodiment.

Thus, the via part of the obtained sintered multilayer ceramic body was observed and measured, and the depth d to the surface layer via electrode of the part which mounts a semiconductor component was -1 micrometer, and the filling property was favorable. Since the conductors were printed on the portions where the chip capacitors and the chip resistors were doubled, they were convex in a convex shape in a positive direction than the surface of the ceramic multilayer substrate.

The multilayer ceramic substrate is divided into individual pieces, soldered to a test printed circuit board, and placed in a constant temperature and humidity chamber to apply a DC voltage of + 4V to a path according to the original electrical design in an environment of 85 ° C and 85% RH. Energization test ”. During the total test time of 1000 hours, there was no insulation failure and no appearance abnormality. Moreover, when mounting a semiconductor component and assembling it as an electronic component, since the surface-layer terminal electrode is substantially coplanar with the surface of a ceramic substrate, the self-alignment effect is also exhibited and the assembly can be carried out with high precision, without having a solder ball deviate from the center of a pad. . In addition, since the solder ball mounting method was used instead of the solder paste printing method for semiconductor mounting, it was in a good connection state with almost no void shape inside the solder after assembly.

15 shows an example of a cross section of the multilayer ceramic substrate 10 of the present embodiment in which an electronic component is mounted. On the upper surface of the multilayer ceramic substrate 10 of this embodiment, pad electrodes for mounting a large number of components are formed as conductor patterns, and passive components 22 such as resistors and capacitors (chip components in FIG. 15) are formed on the electrodes. ) And an active component 21 by a semiconductor chip such as an IC 21 is mounted. The multilayer ceramic substrate includes a substrate layer on the outermost surface and each substrate layer laminated thereon, and on each substrate layer, internal wiring such as an inductor, a transmission line, a capacitor, and a ground electrode is formed by a conductor pattern, and these are connected to the via wiring. By connecting to each other, the intended circuit wiring is constituted. The pad electrode for connecting this board | substrate to a mother board | substrate may be formed in the lowermost board | substrate suitably.

In this multilayer ceramic substrate, the LGA using the solder paste on the surface of the pad electrode 223 for the active component 21 is surface-mounted by the BGA connecting portion 212 using the solder ball 213. The surface is mounted by the connecting portion 222. At this time, the diameter of the via hole 211 of the BGA connection part is smaller than the diameter of the via hole 221 of the LGA connection part with respect to the via hole diameter on which the surface layer terminal electrode is formed. And as shown in FIG. 16, with respect to the BGA connection part 212 (electrode to which the IC chip 21 of FIG. 15 is mounted) with a comparatively small via hole diameter, the cross section of the surface via electrode 2 is a ceramic of the outermost surface. In the via hole formed in the substrate layer, the surface of the metal plating layer 3 deposited on the end face of the surface layer via electrode 2 is located at a recessed position than the ceramic substrate layer surface S of the outermost surface. The ceramic substrate layer surface S is formed so as to protrude from the ceramic substrate layer surface S of the outermost surface to the recessed portion by less than the thickness of the metal plating layer 3. On the other hand, in the LGA connection portion 222 using the rectangular or square pad electrode 223 at a lower density than the BGA connection portion 212, the height of the surface of the metal plating layer 3 ′ is the metal plating layer 3 for BGA connection. It is set higher than the height of the surface of (Au plating layer 3b). Therefore, connection of the passive component 22 can be easily performed by using the solder paste 224 on the pad electrode 223 surface.

Thus, although the via hole formed in the ceramic substrate layer of outermost surface is mixed somewhat, the LGA connection part uses a comparatively large via hole. Since the bonding strength between the electrode formed in the relatively large via hole and the electronic component is relatively large, the conventional electrode may be formed. However, in the BGA connection portion having the relatively small via hole, the cross-section of the surface via electrode is the outermost surface. In the via hole formed in the ceramic substrate layer, the surface of the metal plating layer deposited at a position more than the surface of the ceramic substrate layer on the outermost surface and deposited on the end face of the surface layer via electrode is formed from the surface of the ceramic substrate layer on the outermost surface. By forming it so that it may be in the recessed position rather than the surface of the ceramic substrate layer of substantially coplanar or outermost surface, connection strength can be exhibited high and processing efficiency can be improved.

Moreover, in the Example of this invention, the following is also characterized. That is, in the multilayer ceramic substrate, active elements and passive elements are surface-mounted on the outermost surface thereof, and the via hole diameters of the surface layer terminal electrodes connecting the active elements are the via hole diameters of the surface layer terminal electrodes connecting the passive elements. It can be made smaller than.

In this case, the via hole for the active element and the passive element of the one outermost ceramic substrate layer is filled with a conductor paste having a relatively large volumetric shrinkage during sintering to form a surface layer via electrode, and at least the passive element. For the via hole for the dragon, a surface pad electrode having a double conductor may be formed by using a conductor paste having a relatively small volumetric shrinkage during sintering.

Moreover, the electronic component mounts surface mounting components using the solder ball with respect to the said metal plating layer using any one of the above-mentioned multilayer ceramic substrates.

In addition, the surface layer terminal electrode for connecting the active element is connected to the metal plating layer inside the via hole using a solder ball (bump), and for the surface layer terminal electrode for connecting the passive element to the surface layer pad electrode outside the via hole. You may connect using a solder paste on the adhered metal plating layer surface. In the present embodiment, like the former, the connection using the solder balls is called a BGA connection, and the connection using the solder paste on the pad electrode surface like the latter is called the LGA connection.

At this time, the height of the surface of the metal plating layer for connecting the passive element may be higher than the height of the surface of the metal plating layer for connecting the active element.

According to this embodiment, first, the via wiring inside the via hole is directly used as the surface layer via electrode, so that the electrode size can be arranged in a small and narrow density with high density. Therefore, it can be set as a small multilayer ceramic substrate as a whole.

In addition, since the surface via electrode is formed at a position recessed from the outermost surface of the ceramic substrate, and the surface of the metal plating layer deposited thereon and the surface of the ceramic substrate layer on the outermost surface are formed substantially coplanar or recessed, The starting point of breakage does not occur at the end, and the bonding strength is further improved by the anchor effect with the via hole inner wall. Therefore, when a solder ball is bonded on this metal plating layer, the strength of the said joining can be improved by a structural structure.

Moreover, according to the manufacturing method of the Example of this invention, even if there is a recessed space inside a via hole, the micro bubble in a recess is removed, and plating liquid etc. do not remain. Therefore, no pores or gaps are formed between the metal plating layer and the inner wall of the via, and the penetration of the chemical solution can be prevented, thereby making it possible to obtain a multilayer ceramic substrate having a low possibility of causing problems of insulation and corrosiveness.

1 is a flowchart showing an example of a method of manufacturing a multilayer ceramic substrate according to an embodiment of the present invention;

2 is an explanatory diagram showing an example of a cross section in a manufacturing process of a multilayer ceramic substrate according to an embodiment of the present invention;

3 is a cross-sectional view showing a shape example of a via hole formed in a multilayer ceramic substrate according to an embodiment of the present invention;

4 is a cross-sectional view showing an internal example of a via hole in a multilayer ceramic substrate according to an embodiment of the present invention;

5 is an explanatory diagram showing an example of a shear test;

6 is an explanatory diagram illustrating a relationship between a depth d and a shear strength from a surface of an outermost ceramic substrate to a cross section of a surface via electrode in a multilayer ceramic substrate according to an embodiment of the present invention;

7 is an explanatory diagram showing an example of a tensile test;

8 is a sectional view showing an example of a multilayer ceramic substrate according to an embodiment of the present invention;

9 is an explanatory diagram showing, by Pd content, the relationship between Ag concentration and shear strength of a conductor paste according to an embodiment of the present invention;

10 is an explanatory diagram showing, by Pd content, the relationship between Ag concentration and tensile strength of a conductor paste according to an embodiment of the present invention;

11 is an explanatory diagram showing the relationship between the shear strength when the Ag concentration of the conductor paste according to the embodiment of the present invention is made constant and the Pd content is changed;

12 is an explanatory diagram showing the relationship between the tensile strength when the Ag concentration of the conductor paste according to the embodiment of the present invention is made constant and the Pd content is changed;

13 is an explanatory view showing a cross-sectional example of a surface layer terminal electrode in a multilayer ceramic substrate according to the embodiment of the present invention;

14 is a schematic diagram showing a cross-sectional example of a surface layer terminal electrode in a multilayer ceramic substrate according to an embodiment of the present invention;

15 is an explanatory view showing an example of a cross section of the multilayer ceramic substrate 10 of the present embodiment in which the electronic component according to the embodiment of the present invention is mounted;

16 is an explanatory diagram showing a BGA connection part and an LGA connection part of FIG. 15;

17 is a cross-sectional view showing an example of a conventional multilayer ceramic substrate.

<Description of the symbols for the main parts of the drawings>

1: ceramic substrate layer 2: surface via electrode

3: metal plating layer 4: surface terminal electrode

11, 211 and 221: via hole 12: via wiring

21: active component (element) 22: passive component (element)

212: BGA connection 222: LGA connection

Claims (15)

In a multilayer ceramic substrate in which a plurality of ceramic substrate layers are laminated, A surface layer terminal electrode provided on the ceramic substrate layer of at least one of the front surface and the rear surface, the surface layer electrode comprising a surface via electrode and a metal plating layer deposited on the end surface; And A via wiring connecting the surface terminal electrode and the wiring on the ceramic substrate layer therein; The metal via electrode has a cross section in a via hole formed in the ceramic substrate layer on the outermost surface, and is located in a recessed position than the surface of the ceramic substrate layer on the outermost surface, and is deposited on the end surface of the surface via electrode. The surface of a plating layer is a multilayer ceramic substrate in the position which is substantially coplanar with the surface of the ceramic substrate layer of the outermost surface, or more than the surface of the ceramic substrate layer of the outermost surface. 2. The depth (d, the inside of the substrate is negative) and the diameter of the via hole of the surface via electrode when the surface of the ceramic substrate layer on the outermost surface is ± 0. The ratio (d / phi) with () is a negative value between 0 and -0.12, The multilayer ceramic substrate characterized by the above-mentioned. The multilayer ceramic substrate according to claim 1, wherein the metal plating layer has a boundary surface in contact with an inner wall of the via hole, without gaps. The boundary surface of the metal plating layer is in contact with the inner wall of the via hole without gaps, and when the boundary surface is viewed from a cross section in the depth direction, the adhesion length L of the interface surface is 2 µm or more. Multilayer ceramic substrate, characterized in that. The boundary surface of the metal plating layer is in contact with the inner wall of the via hole without gaps, and when the boundary surface is viewed from the cross section in the depth direction, the boundary surface is the maximum and minimum uneven width of the unevenness ( w) is 0.6 mu m or more. The multilayer ceramic substrate according to claim 1, wherein the metal plating layer is made of a Ni base layer and an Au coating layer, and the thickness of the Ni base layer deposited on the end face of the surface via electrode is 3 µm or more. The multilayer ceramic substrate according to claim 1, wherein the via hole formed in the ceramic substrate layer on the outermost surface is formed in a tapered hole shape widening toward the outermost surface. 2. The via hole diameter of the surface layer terminal electrode connecting the active element is the via hole diameter of the surface layer terminal electrode connecting the passive element. It is smaller than the multilayer ceramic substrate. The via hole for the active element and the passive element of the one outermost ceramic substrate layer is filled with a conductor paste having a relatively large volumetric shrinkage during sintering to form a surface layer via electrode. The via hole for the passive element is a surface ceramic pad electrode having a double conductor, using a conductor paste having a relatively small volumetric shrinkage during sintering. An electronic component comprising using a multilayer ceramic substrate according to claim 1 to mount a surface mounting component on the metal plating layer using a solder ball. The surface layer terminal electrode according to claim 10, wherein the surface layer terminal electrode for connecting the active element of the multilayer ceramic substrate is connected to the metal plating layer inside the via hole by using a solder ball (bump), and the surface layer terminal electrode for connecting the passive element. And an electronic component connected using a solder paste on a surface of a metal plating layer deposited on the surface pad electrode outside the via hole. The electronic component according to claim 11, wherein the height of the surface of the metal plating layer for connecting the passive element is higher than the height of the surface of the metal plating layer for connecting the active element. A plurality of ceramic green sheets including via wirings for connecting the internal wirings of the ceramic green sheet laminates are laminated and pressed, and the surface layer via electrodes are formed by via wirings provided in the via holes of the ceramic substrate layer on the outermost surface. Forming a multilayer ceramic laminate; A sintering step of firing the microcrystalline multilayer ceramic laminate to obtain a sintered multilayer ceramic laminate; The surface layer via electrode of the sintered multilayer ceramic laminate and an etching solution having a function of dissolving it are reacted to remove a part of the surface layer via electrode after the sintering, and the surface layer after the sintering is performed on the surface of the ceramic substrate layer after the sintering. Pitting the end face of the via electrode; And A metal plating layer is deposited on the surface via electrode of the sintered multilayer ceramic laminate, and the metal plating layer is formed at a position in which the surface of the metal plating layer is roughly flush with the surface of the ceramic substrate layer on the outermost surface or the surface of the ceramic substrate layer on the outermost surface. Method of manufacturing a multilayer ceramic substrate comprising the step of forming a. A printing step of printing and forming the internal wiring and the via wiring using a conductor material at predetermined positions of the plurality of ceramic green sheets to be laminated; About the ceramic green sheet of the outermost surface, The process of forming via wiring provided in the via hole using the conductor material which has a volume shrinkage rate at the time of sintering rather than the said conductor material; Laminating and pressing the plurality of ceramic green sheets and the ceramic green sheet on the outermost surface to form a microcrystalline multilayer ceramic laminate; The surface layer via is fired on the surface of the ceramic substrate layer by the volume shrinkage of the surface via via electrode formed by firing the micro multilayer multilayer ceramic laminate and provided in the via hole of the ceramic substrate layer on the outermost surface. A sintering step of obtaining a sintered multilayer ceramic laminate by recessing the end face of the electrode; And A metal plating layer is deposited on the surface via electrode of the sintered multilayer ceramic laminate, and the metal plating layer is formed at a position where the surface is recessed more than the surface of the ceramic substrate layer on the same plane or surface as the surface of the ceramic substrate layer on the outermost surface. Method for producing a multilayer ceramic substrate comprising the step of forming so that. 15. The method of claim 14, after forming the surface via electrode using a conductor paste having a relatively large volumetric shrinkage during sintering with respect to the ceramic green sheet of the outermost surface, and at least for via holes for passive elements. A surface pad electrode is formed using a conductor paste having a relatively small volumetric shrinkage ratio.

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