KR200148611Y1 - 리드 프레임 - Google Patents
리드 프레임 Download PDFInfo
- Publication number
- KR200148611Y1 KR200148611Y1 KR2019950016806U KR19950016806U KR200148611Y1 KR 200148611 Y1 KR200148611 Y1 KR 200148611Y1 KR 2019950016806 U KR2019950016806 U KR 2019950016806U KR 19950016806 U KR19950016806 U KR 19950016806U KR 200148611 Y1 KR200148611 Y1 KR 200148611Y1
- Authority
- KR
- South Korea
- Prior art keywords
- paddle
- lead frame
- epoxy resin
- ground
- semiconductor chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 25
- 239000003822 epoxy resin Substances 0.000 claims abstract description 16
- 229920000647 polyepoxide Polymers 0.000 claims abstract description 16
- 238000004519 manufacturing process Methods 0.000 claims abstract description 6
- 239000002184 metal Substances 0.000 abstract description 6
- 230000007547 defect Effects 0.000 abstract description 4
- 230000000694 effects Effects 0.000 abstract description 2
- 239000004593 Epoxy Substances 0.000 abstract 1
- 238000000034 method Methods 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
Claims (1)
- 반도체 칩을 부착하기 위한 패들의 주변에 다수개의 인너리들이 나열설치되어 있는 반도체 패키지 제조용 리드 프레임에 있어서, 상기 패들의 접지면까지 에폭시 레진이 밀려나오는 것을 차단하기 위하여 일측에 경사면을 형성한 것을 특징으로 하는 리드 프레임.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019950016806U KR200148611Y1 (ko) | 1995-07-08 | 1995-07-08 | 리드 프레임 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019950016806U KR200148611Y1 (ko) | 1995-07-08 | 1995-07-08 | 리드 프레임 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR970007236U KR970007236U (ko) | 1997-02-21 |
KR200148611Y1 true KR200148611Y1 (ko) | 1999-06-15 |
Family
ID=19417824
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR2019950016806U Expired - Lifetime KR200148611Y1 (ko) | 1995-07-08 | 1995-07-08 | 리드 프레임 |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR200148611Y1 (ko) |
-
1995
- 1995-07-08 KR KR2019950016806U patent/KR200148611Y1/ko not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
KR970007236U (ko) | 1997-02-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6830961B2 (en) | Methods for leads under chip in conventional IC package | |
US8704342B2 (en) | Resin sealing type semiconductor device and method of manufacturing the same, and lead frame | |
KR960012449A (ko) | 반도체장치 | |
EP0710982B1 (en) | Personalized area leadframe coining or half etching for reduced mechanical stress at device edge | |
US7875968B2 (en) | Leadframe, semiconductor package and support lead for bonding with groundwires | |
US6531761B1 (en) | High density direct connect LOC assembly | |
US5296743A (en) | Plastic encapsulated integrated circuit package and method of manufacturing the same | |
KR200148611Y1 (ko) | 리드 프레임 | |
US6909179B2 (en) | Lead frame and semiconductor device using the lead frame and method of manufacturing the same | |
KR950006232Y1 (ko) | 반도체 패키지용 리드프레임 패들 | |
KR100281122B1 (ko) | 반도체패키지 | |
KR200169520Y1 (ko) | 반도체 패키지의 리드프레임 | |
KR200161011Y1 (ko) | 리드 프레임 | |
KR200235610Y1 (ko) | 적층형반도체패키지 | |
KR970006222Y1 (ko) | 리드프레임 | |
KR100213435B1 (ko) | 반도체 칩의 마스터 전극 패드 및 이를 이용한 탭 패키지 | |
JPH02198160A (ja) | 樹脂封止半導体装置 | |
KR0179808B1 (ko) | 비엘피 패키지 | |
KR0129004Y1 (ko) | 리드 프레임 | |
KR0142756B1 (ko) | 칩홀딩 리드 온 칩타입 반도체 패키지 | |
KR0135672B1 (ko) | 반도체 패키지용 리드프레임 | |
JP3251436B2 (ja) | リードフレーム、半導体装置及び半導体装置の製造方法 | |
KR200147422Y1 (ko) | 메탈패턴을 형성한 리드온 칩 패키지 | |
KR19980085416A (ko) | 홈을 갖는 리드 프레임 | |
JPH05291460A (ja) | 樹脂封止型半導体フラットパッケージ |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
UA0108 | Application for utility model registration |
Comment text: Application for Utility Model Registration Patent event code: UA01011R08D Patent event date: 19950708 |
|
UA0201 | Request for examination |
Patent event date: 19950708 Patent event code: UA02012R01D Comment text: Request for Examination of Application |
|
UG1501 | Laying open of application | ||
E902 | Notification of reason for refusal | ||
UE0902 | Notice of grounds for rejection |
Comment text: Notification of reason for refusal Patent event code: UE09021S01D Patent event date: 19980518 |
|
AMND | Amendment | ||
E601 | Decision to refuse application | ||
UE0601 | Decision on rejection of utility model registration |
Comment text: Decision to Refuse Application Patent event code: UE06011S01D Patent event date: 19980928 |
|
J201 | Request for trial against refusal decision |
Free format text: TRIAL AGAINST DECISION OF REJECTION FOR APPEAL AGAINST DECISION TO DECLINE REFUSAL |
|
UJ0201 | Trial against decision of rejection |
Patent event code: UJ02012R01D Comment text: Request for Trial against Decision on Refusal Patent event date: 19981107 Patent event code: UJ02011S01I Comment text: Decision to Refuse Application Patent event date: 19980928 Appeal identifier: 1998101003630 Request date: 19981107 Appeal kind category: Appeal against decision to decline refusal Decision date: 19981224 |
|
UB0901 | Examination by re-examination before a trial |
Patent event code: UB09011R01I Patent event date: 19981107 Comment text: Request for Trial against Decision on Refusal Patent event code: UB09011R02I Patent event date: 19980714 Comment text: Amendment to Description, etc. Appeal kind category: Appeal against decision to decline refusal Request date: 19981107 Decision date: 19981224 |
|
B701 | Decision to grant | ||
UB0701 | Decision of registration after re-examination before a trial |
Patent event date: 19981224 Patent event code: UB07012S01D Comment text: Decision to Grant Registration Patent event date: 19981207 Patent event code: UB07011S01I Comment text: Transfer of Trial File for Re-examination before a Trial Request date: 19981107 Decision date: 19981224 Appeal kind category: Appeal against decision to decline refusal |
|
REGI | Registration of establishment | ||
UR0701 | Registration of establishment |
Patent event date: 19990318 Patent event code: UR07011E01D Comment text: Registration of Establishment |
|
UR1002 | Payment of registration fee |
Start annual number: 1 End annual number: 3 Payment date: 19990319 |
|
UG1601 | Publication of registration | ||
UR1001 | Payment of annual fee |
Payment date: 20020219 Start annual number: 4 End annual number: 4 |
|
UR1001 | Payment of annual fee |
Payment date: 20030218 Start annual number: 5 End annual number: 5 |
|
UR1001 | Payment of annual fee |
Payment date: 20040218 Start annual number: 6 End annual number: 6 |
|
FPAY | Annual fee payment |
Payment date: 20050221 Year of fee payment: 7 |
|
UR1001 | Payment of annual fee |
Payment date: 20050221 Start annual number: 7 End annual number: 7 |
|
LAPS | Lapse due to unpaid annual fee |