KR19990000764A - Device isolation method of semiconductor device - Google Patents

Abstract

The present invention relates to a device isolation method of a semiconductor device, comprising: forming a mask layer exposing a field region of an element on a semiconductor substrate; and forming a trench in an exposed portion of the semiconductor substrate on which the mask layer is not formed. And isotropically etching the mask layer such that a side surface thereof is spaced apart from the upper edge of the trench by a predetermined width, and a portion higher than the semiconductor substrate in the trench extends by the predetermined width side by side. And forming a field oxide film in contact with each other, and removing a portion of the field oxide film that extends laterally by the predetermined width so that the field oxide film remains only in the trench while removing the mask layer. Therefore, since the field oxide film is not recessed in the upper corner portion of the trench, no conductive material remains when forming the gate thereafter, thereby preventing short circuit of the device, and also preventing leakage current from flowing because the electric field applied to the gate is not concentrated. can do.

Description

Device isolation method of semiconductor device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device isolation method of a semiconductor device, and more particularly, to a device isolation method capable of preventing an active region from being reduced due to an increase in device isolation region by using a trench.

As the integration of semiconductor devices continues, technology development for reducing the device isolation region occupying a considerable area of the semiconductor device is actively progressing.

In general, semiconductor devices have isolated devices by a local oxide of silicon (LOCOS) method. The LOCOS method is a device isolation region by forming and oxidizing a pad oxide film between the nitride film and the semiconductor substrate in order to solve the stress caused by the thermal characteristics of the nitride film and the semiconductor substrate, which are the oxide masks defining the active region. A field oxide film to be used is formed. The field oxide film is grown not only in the vertical direction of the semiconductor substrate but also in the oxidizing agent (Oxidant: O ₂ ) in the horizontal direction along the pad oxide film, thus growing under the pattern edge of the nitride film.

The phenomenon in which the field oxide film encroaches on the active region is called Bird's Beak because its shape is similar to that of a bird's beak. This bird beak is half the thickness of the field oxide film. Therefore, the length of the buzz bek should be minimized to reduce the size of the active area.

In order to reduce the length of the buzz beak, a method of reducing the thickness of the field oxide film was introduced. However, when the thickness of the field oxide film is reduced in the 16M DRAM class or higher, the capacitance between the wiring and the semiconductor substrate increases and the signal transmission speed decreases. Is generated. In addition, there is a problem that the threshold voltage Vt of the parasitic transistor formed in the isolation region between the elements is lowered by the wiring used as the gate of the element, thereby lowering the isolation characteristic between the elements.

Thus, a method for device isolation while reducing the length of the buzz bee has been developed. As a method of isolation of the device while reducing the length of the buzz beak, the thickness of the stress buffer pad oxide film was reduced and the polysilicon buffered polysilicon layer (PBLOCOS) between the nitride film of the semiconductor substrate and the sidewall of the pad oxide film were nitrided. Protected Sealed Interface LOCOS (SILO), and Recessed Osxide LOCOS technologies to form field oxide films in semiconductor substrates.

However, the above techniques are not suitable for device isolation technology of next-generation devices having an integration level of 256M DRAM or more due to the flatness of the isolation region surface and the precise design rule.

Therefore, a buried oxide (BOX) type trench isolation technology has been developed that can overcome the problems of various device isolation techniques. BOX type device isolation technology A trench is formed in a semiconductor substrate and an oxide film is buried by chemical vapor deposition (hereinafter referred to as CVD). Therefore, it is possible to prevent loss of the active region due to the occurrence of a buzz beak, and a flat surface can be obtained by embedding and etching back the oxide film in the trench.

1 (A) to (D) are process diagrams showing a device isolation method according to the prior art.

Referring to FIG. 1A, the first oxide film 13 is formed on the semiconductor substrate 11 by thermal oxidation, and the nitride film 15 is formed on the first oxide film 13 by the CVD method. A predetermined portion of the first oxide film and the nitride film 13 and 15 is selectively removed to expose the semiconductor substrate 11 by photolithography to define the device isolation region and the active region. The trench 17 is formed by dry etching the exposed device isolation region of the semiconductor substrate 11 to a predetermined depth using the first oxide film and the nitride film 13 and 15 as a mask.

Referring to FIG. 1B, a second oxide film 19 is formed on the inner surface of the trench 17 by a thermal oxidation method. At this time, the second oxide film 19 is not formed on the surface of the nitride film 15.

Referring to FIG. 1C, silicon oxide is deposited by CVD to fill the trench 17 on the nitride film 15. Then, the silicon oxide is deposited on the nitride film 15 so as to remain only in the trench 17 by chemical mechanical polishing (hereinafter referred to as CMP) method to form the field oxide film 21. When the silicon oxide CMP is formed to form the field oxide film 21, the silicon oxide in the trench 17 is also removed to be etched to a predetermined thickness of the nitride film 15, for example, about 1/2 thickness.

Referring to FIG. 1D, the nitride film 15 is removed by a wet etching method. Then, the first oxide film 13 is removed to expose the semiconductor substrate 11. At this time, a portion higher than the semiconductor substrate 11 of the field oxide film 21 is also etched and removed.

However, in the conventional device isolation method of the semiconductor substrate described above, when the nitride oxide film and the first oxide film are removed after the field oxide film is planarized by the CMP method, the field oxide film is etched not only on the upper side but also on the side surface. Since it is recessed, a conductive material remains when the gate is formed later, and the device is short-circuited, and there is a problem that a leakage current flows due to concentration of an electric field applied to the gate.

Accordingly, an object of the present invention is to provide a device isolation method of a semiconductor device which can prevent the field oxide film from being excessively etched in the upper corner of the trench to be recessed.

The device isolation method of the semiconductor device according to the present invention for achieving the above object is a step of forming a mask layer for exposing the field region of the device on the semiconductor substrate, and the exposed portion of the semiconductor substrate is not formed with the mask layer Forming a trench in the trench, isotropically etching the mask layer such that a side surface thereof is spaced apart from the upper edge of the trench by a predetermined width, and a portion higher than the semiconductor substrate in the trench extends laterally by the predetermined width Forming a field oxide film in contact with the side surface of the mask layer; and removing a portion of the field oxide film that extends laterally by the predetermined width so that the field oxide film remains only in the trench while removing the mask layer. do.

Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

1 (A) to (D) are process drawings showing a device isolation method of a semiconductor device according to the prior art.

2 (A) to (D) are process drawings showing the device isolation method of the semiconductor device according to the embodiment of the present invention.

* Description of the symbols for the main parts of the drawings *

31 semiconductor substrate 33 first oxide film

35 nitride film 37 trench

39: second oxide film 41: field oxide film

2 (A) to (D) are process diagrams showing the device isolation method according to the present invention.

Referring to FIG. 2A, a first oxide film 33 is formed on the semiconductor substrate 31 by thermal oxidation, and a nitride film 35 is formed on the first oxide film 33 by a CVD method. A predetermined portion of the first oxide film and the nitride film 33 and 35 is selectively removed to expose the semiconductor substrate 31 by a photolithography method to define the device isolation region and the active region. The trench 37 is formed by dry etching the exposed portion of the semiconductor substrate 31 to a predetermined depth by using the first oxide film and the nitride films 33 and 35 as masks.

Referring to FIG. 2B, a second oxide film 39 is formed on the inner surface of the trench 37 by a thermal oxidation method. At this time, the second oxide film 39 is not formed on the surface of the nitride film 39. The nitride film 35 is selectively wet etched by the width w so that the first oxide film 33 is exposed. At this time, since the nitride film 35 is isotropically etched, not only the width w but also the thickness is reduced. Then, silicon oxide is deposited by the CVD method to fill the trench 37 on the second oxide film 39 and the nitride film 35. Then, the silicon oxide on the nitride film 35 is removed by the CMP method so as to remain at a predetermined thickness, for example, about 1/2 of the thickness of the nitride film 35, thereby forming the field oxide film 47. At this time, the field oxide film 41 is formed to overlap the upper portion of the first oxide film 33 exposed by the width w.

Referring to FIG. 2D, the nitride film 35 and the first oxide film 33 are removed by a wet etching method to expose the semiconductor substrate 31. At this time, since the field oxide film 41 is isotropically etched and not only a portion formed higher than the semiconductor substrate 31 but also a portion overlapped with the first oxide layer 33 is removed, the upper corner of the trench 37 is prevented from sinking. Therefore, the field oxide film 41 is formed flat without the recessed portion in the trench 37.

As described above, the device isolation method of the semiconductor device according to the present invention forms a second oxide film on the inner surface of the trench, selectively wet-etches the nitride film by a width (w) to expose the first oxide film, and then exposes the first oxide film to the trench. A field oxide layer overlapping the width (w) is formed, and the nitride layer and the first oxide layer are removed by a wet etching method such that the semiconductor substrate is exposed, while not only the portion where the field oxide layer is higher but also the portion overlapping the first oxide layer is removed. do.

Therefore, in the present invention, since the field oxide film is not recessed in the upper corner portion of the trench, no conductive material remains when the gate is formed thereafter, thereby preventing short circuit of the device, and also, since the electric field applied to the gate is not concentrated, the leakage current is increased. There is an advantage to prevent the flow.

Claims (1)

Forming a mask layer exposing the field region of the device on the semiconductor substrate; Forming a trench in an exposed portion of the semiconductor substrate on which the mask layer is not formed; Isotropically etching the mask layer such that a side surface thereof is spaced apart from the upper edge of the trench by a predetermined width; Forming a field oxide film in the trench in which a portion higher than the semiconductor substrate extends laterally by the predetermined width to be in contact with the side surface of the mask layer; Removing the mask layer while removing the mask layer so that the field oxide film remains only in the trench and extends laterally by the predetermined width.