KR102711424B1 - 돌멘 구조를 갖는 반도체 장치 및 그 제조 방법 - Google Patents
돌멘 구조를 갖는 반도체 장치 및 그 제조 방법 Download PDFInfo
- Publication number
- KR102711424B1 KR102711424B1 KR1020217029577A KR20217029577A KR102711424B1 KR 102711424 B1 KR102711424 B1 KR 102711424B1 KR 1020217029577 A KR1020217029577 A KR 1020217029577A KR 20217029577 A KR20217029577 A KR 20217029577A KR 102711424 B1 KR102711424 B1 KR 102711424B1
- Authority
- KR
- South Korea
- Prior art keywords
- chip
- adhesive
- film
- support
- piece
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/562—Protection against mechanical damage
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
- H01L25/0657—Stacked arrangements of devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/18—Assemblies consisting of a plurality of semiconductor or other solid state devices the devices being of the types provided for in two or more different main groups of the same subclass of H10B, H10D, H10F, H10H, H10K or H10N
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8312—Aligning
- H01L2224/83136—Aligning involving guiding structures, e.g. spacers or supporting members
- H01L2224/83138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
- H01L2224/8314—Guiding structures outside the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83385—Shape, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83399—Material
- H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83399—Material
- H01L2224/8349—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83399—Material
- H01L2224/83493—Material with a principal constituent of the material being a solid not provided for in groups H01L2224/834 - H01L2224/83491, e.g. allotropes of carbon, fullerene, graphite, carbon-nanotubes, diamond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
- H01L2224/83862—Heat curing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/85399—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
- H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/0651—Wire or wire-like electrical connections from device to substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
- H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
- H01L2225/06562—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking at least one device in the stack being rotated or offset
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
- H01L24/92—Specific sequence of method steps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, the devices being individual devices of subclass H10D or integrated devices of class H10
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Die Bonding (AREA)
- Adhesives Or Adhesive Processes (AREA)
- Adhesive Tapes (AREA)
- Dicing (AREA)
Abstract
Description
도 2의 (a), 도 2의 (b), 및 도 2의 (c)는, 제1 칩과 복수의 지지편의 위치 관계의 예를 모식적으로 나타내는 평면도이다.
도 3의 (a)는, 지지편 형성용 적층 필름의 일 실시형태를 모식적으로 나타내는 평면도이며, 도 3의 (b)는, 도 3의 (a)의 b-b선에 있어서의 단면도이다.
도 4는, 점착층과 지지편 형성용 필름을 첩합하는 공정을 모식적으로 나타내는 단면도이다.
도 5의 (a), 도 5의 (b), 도 5의 (c), 및 도 5의 (d)는, 지지편의 제작 과정을 모식적으로 나타내는 단면도이다.
도 6은, 기판 상이며 제1 칩의 주위에 복수의 지지편을 배치한 상태를 모식적으로 나타내는 단면도이다.
도 7은, 접착제편 부착 칩의 일례를 모식적으로 나타내는 단면도이다.
도 8은, 기판 상에 형성된 돌멘 구조를 모식적으로 나타내는 단면도이다.
도 9는, 반도체 장치의 제2 실시형태를 모식적으로 나타내는 단면도이다.
도 10은, 지지편 형성용 적층 필름의 다른 실시형태를 모식적으로 나타내는 단면도이다.
2…점착층
5…열경화성 수지층
6…수지층
10…기판
20, 20A…지지편 형성용 적층 필름
50…밀봉재
100, 200…반도체 장치
D…지지편 형성용 필름
D2…3층 필름(지지편 형성용 필름)
Da…지지편
Dc…지지편(경화물)
T1…제1 칩
T2…제2 칩
T2a…접착제편 부착 칩
T2c…접착제편 부착 칩(경화물)
Ta…접착제편
Tc…접착제편(경화물)
Claims (4)
- 기판과, 상기 기판 상에 배치된 제1 칩과, 상기 기판 상이며 상기 제1 칩의 주위에 배치된 복수의 지지편과, 상기 복수의 지지편에 의하여 지지되고 또한 상기 제1 칩을 덮도록 배치된 접착제편 부착 칩을 포함하며, 상기 접착제편 부착 칩이, 제2 칩 및 상기 제2 칩의 일방의 면 상에 마련된 접착제편을 포함하는, 돌멘 구조를 갖는 반도체 장치의 제조 방법으로서,
(A) 기재 필름과, 점착층과, 적어도 열경화성 수지층을 갖는 지지편 형성용 필름을 이 순서로 구비하는 적층 필름을 준비하는 공정과,
(B) 상기 지지편 형성용 필름을 개편화함으로써, 상기 점착층의 표면 상에 복수의 지지편을 형성하는 공정과,
(C) 상기 점착층으로부터 상기 지지편을 픽업하는 공정과,
(D) 기판 상에 제1 칩을 배치하는 공정과,
(E) 상기 기판 상이며 상기 제1 칩의 주위에 복수의 상기 지지편을 배치하는 공정과,
(F) 제2 칩과, 상기 제2 칩의 일방의 면 상에 마련된, 접착제편을 구비하는 접착제편 부착 칩을 준비하는 공정과,
(G) 복수의 상기 지지편의 표면 상에 상기 접착제편 부착 칩을 배치함으로써 돌멘 구조를 구축하는 공정을 포함하고,
상기 지지편 형성용 필름은, 당해 지지편 형성용 필름에 접착제편 부착 칩의 접착제편을 열압착하고, 당해 지지편 형성용 필름을 170℃에서 1시간 경화시킨 후의 상기 지지편과 상기 접착제편 부착 칩의 250℃에 있어서의 시어 강도가, 3.2MPa 이상인, 반도체 장치의 제조 방법. - 청구항 1에 있어서,
상기 지지편 형성용 필름이, 열경화성 수지층으로 이루어지는 필름, 혹은, 열경화성 수지층과, 당해 열경화성 수지층보다 높은 강성을 갖는 수지층 또는 금속층과, 열경화성 수지층을 이 순서로 갖는 3층 필름인, 반도체 장치의 제조 방법. - 기판과,
상기 기판 상에 배치된 제1 칩과,
상기 기판 상이며 상기 제1 칩의 주위에 배치된 복수의 지지편과,
상기 복수의 지지편에 의하여 지지되고 또한 상기 제1 칩을 덮도록 배치된 접착제편 부착 칩을 포함하며,
상기 접착제편 부착 칩이, 제2 칩 및 상기 제2 칩의 일방의 면 상에 마련된 접착제편을 포함하고,
상기 지지편과 상기 접착제편 부착 칩의 250℃에 있어서의 시어 강도가, 3.2MPa 이상인, 돌멘 구조를 갖는 반도체 장치. - 청구항 3에 있어서,
상기 지지편이, 열경화성 수지 조성물의 경화물로 이루어지거나, 혹은, 상기 경화물의 층과, 수지층 또는 금속층과, 상기 경화물의 층이 이 순서로 적층된 구조인, 반도체 장치.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2019/017713 WO2020217404A1 (ja) | 2019-04-25 | 2019-04-25 | ドルメン構造を有する半導体装置及びその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20210145737A KR20210145737A (ko) | 2021-12-02 |
KR102711424B1 true KR102711424B1 (ko) | 2024-09-26 |
Family
ID=72941128
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020217029577A Active KR102711424B1 (ko) | 2019-04-25 | 2019-04-25 | 돌멘 구조를 갖는 반도체 장치 및 그 제조 방법 |
Country Status (7)
Country | Link |
---|---|
US (1) | US20220157802A1 (ko) |
JP (1) | JP7294410B2 (ko) |
KR (1) | KR102711424B1 (ko) |
CN (1) | CN113574663A (ko) |
SG (1) | SG11202110111YA (ko) |
TW (1) | TWI830901B (ko) |
WO (1) | WO2020217404A1 (ko) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2020217394A1 (ja) * | 2019-04-25 | 2020-10-29 | 日立化成株式会社 | ドルメン構造を有する半導体装置及びその製造方法、並びに、支持片形成用積層フィルム及びその製造方法 |
JP2023102570A (ja) | 2022-01-12 | 2023-07-25 | 株式会社レゾナック | 個片化体形成用積層フィルム及びその製造方法、並びに半導体装置の製造方法 |
WO2025023100A1 (ja) * | 2023-07-21 | 2025-01-30 | 株式会社レゾナック | 半導体装置及び半導体装置の製造方法 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006005333A (ja) * | 2004-05-20 | 2006-01-05 | Toshiba Corp | 積層型電子部品とその製造方法 |
JP2013127014A (ja) * | 2011-12-16 | 2013-06-27 | Hitachi Chemical Co Ltd | 接着シート |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002222889A (ja) * | 2001-01-24 | 2002-08-09 | Nec Kyushu Ltd | 半導体装置及びその製造方法 |
KR20030018204A (ko) * | 2001-08-27 | 2003-03-06 | 삼성전자주식회사 | 스페이서를 갖는 멀티 칩 패키지 |
US6787916B2 (en) * | 2001-09-13 | 2004-09-07 | Tru-Si Technologies, Inc. | Structures having a substrate with a cavity and having an integrated circuit bonded to a contact pad located in the cavity |
US6930378B1 (en) * | 2003-11-10 | 2005-08-16 | Amkor Technology, Inc. | Stacked semiconductor die assembly having at least one support |
US7064430B2 (en) * | 2004-08-31 | 2006-06-20 | Stats Chippac Ltd. | Stacked die packaging and fabrication method |
TWI292617B (en) * | 2006-02-03 | 2008-01-11 | Siliconware Precision Industries Co Ltd | Stacked semiconductor structure and fabrication method thereof |
CN101432867B (zh) * | 2006-03-21 | 2013-10-23 | 住友电木株式会社 | 可用于芯片堆叠、芯片和晶片粘结的方法和材料 |
US20080029885A1 (en) * | 2006-08-07 | 2008-02-07 | Sandisk Il Ltd. | Inverted Pyramid Multi-Die Package Reducing Wire Sweep And Weakening Torques |
CN102272908A (zh) * | 2009-03-23 | 2011-12-07 | 日立化成工业株式会社 | 晶片接合用树脂浆料、使用该浆料的半导体装置的制造方法及半导体装置 |
KR20110083969A (ko) * | 2010-01-15 | 2011-07-21 | 삼성전자주식회사 | 반도체 패키지 및 그 제조 방법 |
JP5840479B2 (ja) * | 2011-12-20 | 2016-01-06 | 株式会社東芝 | 半導体装置およびその製造方法 |
CN104169383B (zh) * | 2012-03-08 | 2016-11-09 | 日立化成株式会社 | 粘接片材及半导体装置的制造方法 |
KR101906269B1 (ko) * | 2012-04-17 | 2018-10-10 | 삼성전자 주식회사 | 반도체 패키지 및 그 제조 방법 |
JP2015176906A (ja) * | 2014-03-13 | 2015-10-05 | 株式会社東芝 | 半導体装置および半導体装置の製造方法 |
US9418974B2 (en) | 2014-04-29 | 2016-08-16 | Micron Technology, Inc. | Stacked semiconductor die assemblies with support members and associated systems and methods |
DE102015204698B4 (de) * | 2015-03-16 | 2023-07-20 | Disco Corporation | Verfahren zum Teilen eines Wafers |
US10297575B2 (en) * | 2016-05-06 | 2019-05-21 | Amkor Technology, Inc. | Semiconductor device utilizing an adhesive to attach an upper package to a lower die |
-
2019
- 2019-04-25 CN CN201980094137.9A patent/CN113574663A/zh active Pending
- 2019-04-25 SG SG11202110111YA patent/SG11202110111YA/en unknown
- 2019-04-25 KR KR1020217029577A patent/KR102711424B1/ko active Active
- 2019-04-25 US US17/438,943 patent/US20220157802A1/en active Pending
- 2019-04-25 JP JP2021515423A patent/JP7294410B2/ja active Active
- 2019-04-25 WO PCT/JP2019/017713 patent/WO2020217404A1/ja active Application Filing
-
2020
- 2020-04-17 TW TW109112888A patent/TWI830901B/zh active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006005333A (ja) * | 2004-05-20 | 2006-01-05 | Toshiba Corp | 積層型電子部品とその製造方法 |
JP2013127014A (ja) * | 2011-12-16 | 2013-06-27 | Hitachi Chemical Co Ltd | 接着シート |
Also Published As
Publication number | Publication date |
---|---|
KR20210145737A (ko) | 2021-12-02 |
US20220157802A1 (en) | 2022-05-19 |
JP7294410B2 (ja) | 2023-06-20 |
CN113574663A (zh) | 2021-10-29 |
SG11202110111YA (en) | 2021-11-29 |
TW202044423A (zh) | 2020-12-01 |
JPWO2020217404A1 (ko) | 2020-10-29 |
WO2020217404A1 (ja) | 2020-10-29 |
TWI830901B (zh) | 2024-02-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR102711424B1 (ko) | 돌멘 구조를 갖는 반도체 장치 및 그 제조 방법 | |
JP7494841B2 (ja) | ドルメン構造を有する半導体装置及びその製造方法、並びに、支持片形成用積層フィルム及びその製造方法 | |
KR102703891B1 (ko) | 반도체 장치 및 그 제조 방법, 및 반도체 장치의 제조에 사용되는 구조체 | |
US11935870B2 (en) | Method for manufacturing semiconductor device having dolmen structure, method for manufacturing support piece, and laminated film | |
JP7247733B2 (ja) | ドルメン構造を有する半導体装置の製造方法 | |
KR102764810B1 (ko) | 돌멘 구조를 갖는 반도체 장치 및 그 제조 방법, 및, 지지편 형성용 적층 필름 및 그 제조 방법 | |
KR102750779B1 (ko) | 돌멘 구조를 갖는 반도체 장치 및 그 제조 방법, 지지편의 제조 방법, 및, 지지편 형성용 적층 필름 | |
KR102780310B1 (ko) | 지지편의 제조 방법, 반도체 장치의 제조 방법, 및 지지편 형성용 적층 필름 | |
KR102707748B1 (ko) | 돌멘 구조를 갖는 반도체 장치의 제조 방법, 지지편의 제조 방법, 및 지지편 형성용 적층 필름 | |
KR102741215B1 (ko) | 돌멘 구조를 갖는 반도체 장치 및 그 제조 방법, 및, 지지편 형성용 적층 필름 및 그 제조 방법 | |
KR102755201B1 (ko) | 돌멘 구조를 갖는 반도체 장치 및 그 제조 방법, 및, 지지편 형성용 적층 필름 및 그 제조 방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PA0105 | International application |
Patent event date: 20210914 Patent event code: PA01051R01D Comment text: International Patent Application |
|
A201 | Request for examination | ||
PA0201 | Request for examination |
Patent event code: PA02012R01D Patent event date: 20211102 Comment text: Request for Examination of Application |
|
PG1501 | Laying open of application | ||
E902 | Notification of reason for refusal | ||
PE0902 | Notice of grounds for rejection |
Comment text: Notification of reason for refusal Patent event date: 20230315 Patent event code: PE09021S01D |
|
E902 | Notification of reason for refusal | ||
PE0902 | Notice of grounds for rejection |
Comment text: Notification of reason for refusal Patent event date: 20230906 Patent event code: PE09021S01D |
|
PE0701 | Decision of registration |
Patent event code: PE07011S01D Comment text: Decision to Grant Registration Patent event date: 20240626 |
|
GRNT | Written decision to grant | ||
PR0701 | Registration of establishment |
Comment text: Registration of Establishment Patent event date: 20240924 Patent event code: PR07011E01D |
|
PR1002 | Payment of registration fee |
Payment date: 20240924 End annual number: 3 Start annual number: 1 |
|
PG1601 | Publication of registration |