KR102685228B1 - Pattern calculation apparatus, pattern calculation method, mask, exposure apparatus, device production method, computer program, and recording medium - Google Patents

Abstract

The pattern calculation device 2 creates a mask pattern 1311d formed on the mask 131 for forming a device pattern in which a plurality of unit device pattern portions 1511u are arranged on the substrate 151 with exposure light EL. It is a pattern calculation device that calculates patterns. The pattern calculation device calculates a unit mask pattern portion 1311u for forming one unit device pattern portion, and further calculates a mask pattern by arranging a plurality of calculated unit mask pattern portions, and calculates a unit mask pattern portion, Assuming that a specific mask pattern portion 1311n corresponding to at least a portion of the unit mask pattern portion is adjacent to the unit mask pattern portion, the unit mask pattern portion is calculated.

Description

Pattern calculation device, pattern calculation method, mask, exposure device, device manufacturing method, computer program, and recording medium {PATTERN CALCULATION APPARATUS, PATTERN CALCULATION METHOD, MASK, EXPOSURE APPARATUS, DEVICE PRODUCTION METHOD, COMPUTER PROGRAM, AND RECORDING MEDIUM}

The present invention relates to the technical field of, for example, a pattern calculation device and a pattern calculation method for calculating a mask pattern formed on a mask used in an exposure device, and also includes a mask, an exposure device and an exposure method, a device manufacturing method, It relates to the technical field of computer programs and recording media.

Exposure equipment is used to expose a substrate (for example, a glass substrate coated with a resist, etc.) with an image of a mask pattern formed on a mask. Exposure equipment is used, for example, to manufacture flat panel displays such as liquid crystal displays and organic EL (Electro Luminescence) displays. In such an exposure apparatus, it is required to appropriately calculate (in other words, determine) a mask pattern in order to manufacture a mask.

US Patent Application Publication No. 2010/0266961 Specification

According to the first aspect, there is provided a pattern calculating device for calculating a mask pattern formed on a mask for forming a device pattern having a plurality of unit device pattern portions arranged on a substrate with exposure light, wherein one of the mask patterns includes the unit device pattern portion. A unit mask pattern portion to be formed on the substrate is calculated, and the mask pattern is calculated by arranging a plurality of the calculated unit mask pattern portions. When calculating the unit mask pattern portion, at least a portion of the unit mask pattern portion corresponds to the unit mask pattern portion. A pattern calculation device is provided that calculates the unit mask pattern portion after assuming that a specific mask pattern portion is adjacent to the unit mask pattern portion.

According to a second aspect, there is a pattern calculating device for calculating a mask pattern formed on a mask for forming a device pattern on a substrate with exposure light, wherein the mask is configured to emit at least the exposure light to form at least a portion of the device pattern. A first mask area that is irradiated twice and a second mask area that is irradiated with the exposure light once to form at least another part of the device pattern, and at least one of the mask patterns calculated based on the device pattern. A pattern calculation device is provided that partially corrects the first and second mask areas based on a correspondence relationship between the first and second mask areas and the mask pattern.

According to a third aspect, there is a pattern calculating device for calculating a mask pattern formed on a mask for forming a device pattern on a substrate with exposure light, wherein the mask is configured to emit at least the exposure light to form at least a portion of the device pattern. It includes a first mask area that is irradiated twice, and at least a part of the mask pattern calculated based on the device pattern is adjusted to the deviation on the substrate of exposure characteristics by the exposure light through the first mask area. A pattern calculation device for correction based on a pattern is provided.

According to a fourth aspect, there is a pattern calculation device for calculating a mask pattern formed on a mask for forming a device pattern on a substrate with exposure light, wherein the mask is configured to emit the exposure light for exposing the substrate through a first projection optical system. It includes a third mask area to be irradiated and a fourth mask area to be irradiated with the exposure light for exposing the substrate through a second projection optical system, and at least a portion of the mask pattern calculated based on the device pattern. , a pattern calculating device is provided that performs correction based on a correspondence relationship between the third and fourth mask areas and the mask pattern.

According to a fifth aspect, there is provided a pattern calculating device for calculating a mask pattern formed on a mask for forming a device pattern on a substrate with exposure light, wherein the mask is configured to emit exposure light for exposing the substrate through a desired projection optical system. A fifth mask region to be irradiated, and at least a part of the mask pattern calculated based on the device pattern based on a deviation on the substrate of exposure characteristics by the exposure light through the fifth mask region. A correcting pattern calculation device is provided.

According to a sixth aspect, a pattern calculation method for calculating a mask pattern formed on a mask for forming a device pattern in which a plurality of unit device pattern portions are arranged on a substrate with exposure light, wherein one of the mask patterns includes the unit device pattern portion. A unit mask pattern portion to be formed on the substrate is calculated, and the mask pattern is calculated by arranging a plurality of the calculated unit mask pattern portions. When calculating the unit mask pattern portion, at least a portion of the unit mask pattern portion corresponds to the unit mask pattern portion. A pattern calculation method is provided for calculating the unit mask pattern portion, assuming that a specific mask pattern portion is adjacent to the unit mask pattern portion.

According to a seventh aspect, there is a pattern calculation method for calculating a mask pattern formed on a mask for forming a device pattern on a substrate with exposure light, wherein the mask is configured to emit at least the exposure light to form at least a portion of the device pattern. A first mask area that is irradiated twice and a second mask area that is irradiated with the exposure light once to form at least another part of the device pattern, and at least one of the mask patterns calculated based on the device pattern. A pattern calculation method is provided in which part of the pattern is corrected based on a correspondence relationship between the first and second mask areas and the mask pattern.

According to an eighth aspect, a pattern calculation method for calculating a mask pattern formed on a mask for forming a device pattern on a substrate with exposure light, wherein the mask is configured to emit at least the exposure light to form at least a portion of the device pattern. It includes a first mask area that is irradiated twice, and at least a part of the mask pattern calculated based on the device pattern is adjusted to the deviation on the substrate of exposure characteristics by the exposure light through the first mask area. A method for calculating a pattern based on correction is provided.

According to a ninth aspect, there is a pattern calculation method for calculating a mask pattern formed on a mask for forming a device pattern on a substrate with exposure light, wherein the mask is exposed to the exposure light for exposing the substrate through a first projection optical system. It includes a third mask area to be irradiated and a fourth mask area to be irradiated with the exposure light for exposing the substrate through a second projection optical system, and at least a portion of the mask pattern calculated based on the device pattern. , a pattern calculation method for correction based on the correspondence relationship between the third and fourth mask areas and the mask pattern is provided.

According to a tenth aspect, there is a pattern calculation method for calculating a mask pattern formed on a mask for forming a device pattern on a substrate with exposure light, wherein the mask is configured to emit exposure light for exposing the substrate through a desired projection optical system. A fifth mask region to be irradiated, and at least a part of the mask pattern calculated based on the device pattern based on a deviation on the substrate of exposure characteristics by the exposure light through the fifth mask region. A method for calculating a correcting pattern is provided.

According to an eleventh aspect, a mask manufactured using any of the sixth to tenth aspects of the above-described pattern calculation method is provided.

According to the twelfth aspect, there is provided a mask on which the mask pattern calculated by any of the sixth to tenth aspects of the pattern calculation method described above is formed.

According to a thirteenth aspect, an exposure apparatus is provided that forms the device pattern on the substrate by irradiating the exposure light to the substrate through the eleventh or twelfth aspect of the mask described above.

According to a fourteenth aspect, the substrate coated with a photosensitive agent is exposed using the thirteenth aspect of the above-described exposure apparatus, the device pattern is formed on the substrate, the exposed photosensitive agent is developed, and the device pattern is formed. A device manufacturing method is provided for forming a corresponding exposure pattern layer and processing the substrate through the exposure pattern layer.

According to a fifteenth aspect, a computer program is provided that causes a computer to execute any of the sixth to tenth aspects of the above-described pattern calculation method.

According to a sixteenth aspect, a recording medium on which the fifteenth aspect of the above-described computer program is recorded is provided.

According to the 17th aspect, a first area in which the amount of irradiation from the illumination system changes along the second direction intersecting the first direction depending on the position in the first direction, and a second area different from the first area A mask irradiated by an irradiation area having a first circuit pattern formed in an area corresponding to the first area among the irradiation areas, a first circuit pattern formed in an area corresponding to the second area, and a first circuit pattern formed in the area corresponding to the second area among the irradiation areas. A mask having a second circuit pattern formed based thereon is provided.

According to an eighteenth aspect, a mask having a predetermined pattern exposed on an object by a plurality of projection optical systems having different optical characteristics, comprising: a first circuit pattern formed based on the optical characteristics of a first optical system among the plurality of projection optical systems; , a mask having a second circuit pattern formed based on optical characteristics of a second optical system different from the first optical system is provided.

The operation and other benefits of the present invention will become apparent from the detailed description of its implementation described below.

1 is a perspective view showing an example of the overall structure of the exposure apparatus of this embodiment.
FIG. 2(a) is a top view showing a projection area set on a substrate, FIG. 2(b) is a top view showing an illumination area set on a mask, and FIG. 2(c) is a repetitive formation on a mask. This is a plan view showing a plurality of unit mask pattern portions.
FIG. 3(a) is a top view showing a specific example of a mask used to manufacture a display panel, and FIG. 3(b) is a top view showing a part of the mask shown in FIG. 3(a).
Fig. 4 is a block diagram showing the structure of a mask pattern calculation device.
Fig. 5 is a flow chart showing the flow of the mask pattern calculation operation performed by the mask pattern calculation device.
FIG. 6 is a flow chart showing the flow of processing for calculating a mask pattern in step S3 of FIG. 5 using a plurality of unit mask pattern portions included in the mask.
FIG. 7 is a plan view showing one specific example of the pattern layout of one unit mask pattern portion.
Each of FIGS. 8(a) to 8(d) is a plan view showing the positional relationship between two unit mask pattern portions adjacent to each other.
FIG. 9 is a plan view showing a situation where it is assumed that a part of the unit mask pattern portion is adjacent to the unit mask pattern portion.
FIG. 10 is a plan view showing a situation where it is assumed that a part of the unit mask pattern portion is adjacent to the unit mask pattern portion.
Fig. 11 is a plan view showing a mask pattern obtained by arranging a plurality of unit mask pattern portions.
Fig. 12 is a plan view showing a mask pattern group obtained by arranging a plurality of mask patterns.
Fig. 13 is a plan view showing a plurality of types of unit mask pattern groups that can be distinguished based on differences in pattern layouts of adjacent areas.
FIG. 14 is a plan view showing a composite mask pattern portion including a unit mask pattern portion and at least a portion of a peripheral mask pattern portion adjacent to the unit mask pattern portion.
Fig. 15 is a flow chart showing the flow of processing for calculating a mask pattern in the second modification.
Fig. 16 is a plan view showing a situation assuming that a part of the mask pattern is adjacent to the mask pattern.
Fig. 17 is a plan view showing a mask pattern group obtained by arranging a plurality of mask patterns.
Fig. 18 is a flow chart showing the flow of processing for calculating a mask pattern in the third modification.
FIG. 19(a) is a top view showing an example of a device pattern formed on a substrate, and each of FIGS. 19(b) to 19(d) is a mask for forming the device pattern shown in FIG. 19(a). This is a plan view showing an example of a pattern.
Fig. 20 is a flow chart showing the flow of processing for calculating a mask pattern in the fourth modification.
Fig. 21 is a plan view showing the positional relationship between a joint exposure area and two projection areas that double expose the joint exposure area.
FIG. 22 is a plan view showing an example of a mask pattern for forming the device pattern shown in FIG. 19(a).
Fig. 23 is a flow chart showing the flow of processing for calculating a mask pattern in the fifth modification.
24(a) to 24(c) are plan views showing the relationship between the image plane and projection area of the projection optical system and the distortion aberration.
FIG. 25(a) is a plan view showing a projection area set on a substrate when a projection optical system in which distortion aberration occurs and a projection optical system in which a distortion aberration does not exist exist, and FIG. 25(b) is a drawing It is a top view showing an example of the correction contents of the mask pattern when the distortion aberration shown in 25(a) occurs,
FIG. 26(a) is a top view showing the relationship between the projection area and exposure amount of the projection optical system in which image plane curvature does not occur, and FIG. 26(b) shows the projection area and exposure amount of the projection optical system in which image plane curvature occurs. It is a floor plan showing the relationship between .
FIG. 27(a) is a plan view showing the projection area set on the substrate when there is a projection optical system in which image plane curvature occurs and a projection optical system in which image plane curvature does not occur, and FIG. 27(b) is , is a plan view showing an example of the correction contents of the mask pattern in the case where image plane curvature shown in FIG. 27(a) occurs,
Figure 28 is a flow chart showing the flow of a device manufacturing method for manufacturing a display panel using an exposure apparatus.

Hereinafter, a pattern calculation device, a pattern calculation method, a mask, an exposure device, a device manufacturing method, a computer program, and a recording medium will be described with reference to the drawings. However, the present invention is not limited to the embodiments described below.

In the following description, the positional relationship of the components constituting the mask and the exposure apparatus will be explained using the XYZ orthogonal coordinate system defined from the X, Y, and Z axes orthogonal to each other. In addition, in the following description, for convenience of explanation, each of the (up and down direction). Additionally, the +Z-axis direction side is assumed to be upward (upper side), and the -Z-axis direction side is assumed to be downward (lower side). Additionally, the rotational directions (in other words, tilt directions) around the X, Y, and Z axes are respectively referred to as the θX direction, θY direction, and θZ direction.

(1) Exposure apparatus (1) of this embodiment

Referring to FIGS. 1 and 2, the exposure apparatus 1 of this embodiment will be described. The exposure apparatus 1 of this embodiment exposes the substrate 151, which is flat glass coated with a photoresist (in other words, a photoresist), to an image of a mask pattern formed on the mask 131. The substrate 151 exposed by the exposure device 1 is used, for example, to manufacture a display panel of a display device (eg, a liquid crystal display, an organic EL display, etc.).

(1-1) Structure of exposure apparatus (1) of this embodiment

First, the structure of the exposure apparatus 1 of this embodiment will be described with reference to FIG. 1 . Fig. 1 is a perspective view showing an example of the overall structure of the exposure apparatus 1 of the present embodiment.

As shown in FIG. 1, the exposure apparatus 1 includes a light source unit 11, a plurality of illumination optical systems 12, a mask stage 13, a plurality of projection optical systems 14, and a substrate stage 15. ) and a control device 16.

The light source unit 11 emits exposure light EL. Exposure light (EL) is, for example, light in a wavelength band of at least one of the g-line, h-line, and i-line. In particular, the light source unit 11 uses the exposure light EL to illuminate a plurality of illumination areas IR set on the effective area 131p of the mask 131 (see FIG. 2, described later). Branches to exposure light (EL). In the example shown in FIG. 1 , the light source unit 11 transmits the exposure light EL into seven illumination regions IR (namely, illumination region IRa, illumination region IRb, illumination region IRc, illumination region IRa). The area (IRd), the illumination area (IRe), the illumination area (IRf) and the illumination area (IRg)) are each branched into seven exposure lights (EL) that can be illuminated. The plurality of exposure lights EL respectively enter the plurality of illumination optical systems 12 .

The plurality of illumination optical systems 12 constitute a multi-lens type illumination optical system. In the example shown in FIG. 1, the exposure apparatus 1 includes seven illumination optical systems 12 (in short, an illumination optical system 12a, an illumination optical system 12b, an illumination optical system 12c, an illumination optical system 12d, an illumination optical system). (12e), an illumination optical system (12f), and an illumination optical system (12g). The illumination optical system 12a, the illumination optical system 12c, the illumination optical system 12e, and the illumination optical system 12g are arranged to line up at equal intervals along the Y-axis direction. The illumination optical system 12b, the illumination optical system 12d, and the illumination optical system 12f are arranged to line up at equal intervals along the Y-axis direction. The illumination optical system 12a, the illumination optical system 12c, the illumination optical system 12e, and the illumination optical system 12g are aligned with the illumination optical system 12b, the illumination optical system 12d, and the illumination optical system 12f along the It is placed at a predetermined distance away. The illumination optical system 12a, the illumination optical system 12c, the illumination optical system 12e, and the illumination optical system 12g, and the illumination optical system 12b, the illumination optical system 12d, and the illumination optical system 12f are arranged in a zigzag shape. .

Each illumination optical system 12 is arranged below the light source unit 11. Each illumination optical system 12 irradiates exposure light EL to the illumination area IR corresponding to each illumination optical system 12 . Specifically, the illumination optical systems 12a to 12g irradiate the exposure light EL to the illumination areas IRa to IRg, respectively. For this reason, the number of illumination regions IR set on the mask 131 is equal to the number of illumination optical systems 12 provided in the exposure apparatus 1.

The mask stage 13 is arranged below the plurality of illumination optical systems 12 . The mask stage 13 is capable of holding the mask 131. The mask stage 13 can release the held mask 131. The mask 131 is composed of, for example, a square glass plate with one side or diagonal of 500 mm or more. A mask pattern corresponding to the device pattern to be transferred to the substrate 151 is formed on the mask 131 . More specifically, a mask pattern capable of forming an image (for example, a spatial image or an exposure pattern) for exposing the substrate 151 to form a device pattern on the substrate 151 is formed on the mask 131. .

The mask stage 13 is movable along a plane (eg, XY plane) containing a plurality of illumination regions IR while holding the mask 131 . The mask stage 13 is movable along the X-axis direction. For example, the mask stage 13 can move along the X-axis direction by the operation of a mask stage drive system including an arbitrary motor. In addition to being movable along the X-axis direction, the mask stage 13 may be movable along at least one of the Y-axis direction, Z-axis direction, θX direction, θY direction, and θZ direction.

The plurality of projection optical systems 14 constitute a multi-lens type projection optical system. In the example shown in FIG. 1, the exposure apparatus 1 includes seven projection optical systems 14 (in short, projection optical system 14a, projection optical system 14b, projection optical system 14c, projection optical system 14d, projection optical system). (14e), a projection optical system (14f), and a projection optical system (14g). The number of projection optical systems 14 included in the exposure apparatus 1 is the same as the number of illumination optical systems 12 included in the exposure apparatus 1 . The projection optical system 14a, projection optical system 14c, projection optical system 14e, and projection optical system 14g are arranged to be aligned at approximately equal intervals along the Y-axis direction. The projection optical system 14b, 14d, and 14f are arranged to line up at approximately equal intervals along the Y-axis direction. Projection optical system 14a, projection optical system 14c, projection optical system 14e, and projection optical system 14g are located along the X-axis direction with respect to projection optical system 14b, projection optical system 14d, and projection optical system 14f. It is placed at a predetermined distance away. The projection optical system 14a, projection optical system 14c, projection optical system 14e, and projection optical system 14g, and the projection optical system 14b, projection optical system 14d, and projection optical system 14f are arranged in a zigzag shape. .

Each projection optical system 14 is arranged below the mask stage 13. Each projection optical system 14 displays the exposure light EL irradiated on the illumination area IR corresponding to each projection optical system 14 (in short, the effective area of the mask 131 in which the illumination area IR is set ( The image of the mask pattern formed in 131p) is projected onto the projection area PR set on the substrate 151 corresponding to each projection optical system 14. Specifically, the projection optical system 14a is formed in the effective area 131p of the mask 131 where the illumination area IRa is set by exposure light EL irradiated on the illumination area IRa. The image of the mask pattern is projected onto the projection area PRa set on the substrate 151. The same applies from the projection optical system 14b to the projection optical system 14g.

Each projection optical system 14 is provided with a field stop 144. The field stop 144 sets a projection area PR on the substrate 151 . In the field stop 144, a trapezoidal opening is formed with upper and lower sides parallel to the Y-axis direction. As a result, a trapezoid-shaped projection area PR having upper and lower sides parallel to the Y-axis direction is set on the substrate 151.

The substrate stage 15 is arranged below the plurality of projection optical systems 14 . The substrate stage 15 is capable of holding the substrate 151. The substrate stage 15 is capable of holding the substrate 151 so that the upper surface of the substrate 151 is parallel to the XY plane. The substrate stage 15 is capable of releasing the held substrate 151. The substrate 151 is, for example, a glass substrate measuring several m in length and width.

The substrate stage 15 is movable along a plane (eg, XY plane) including the projection area PR while holding the substrate 151 . The substrate stage 15 is movable along the X-axis direction. For example, the substrate stage 15 may move along the X-axis direction by the operation of a substrate stage drive system including an arbitrary motor. In addition to being movable along the X-axis direction, the substrate stage 15 may be movable along at least one of the Y-axis direction, Z-axis direction, θX direction, θY direction, and θZ direction.

The control device 16 is capable of controlling the operation of the exposure device 1. The control device 16 includes, for example, a CPU (Central Processing Unit), ROM (Read Only Memory), RAM (Rondom Access Memory), etc.

The control device 16 controls the mask stage drive system so that the mask stage 13 moves in a desired first movement mode (as a result, the mask 131 moves in a desired first movement mode). The control device 16 controls the substrate stage drive system so that the substrate stage 15 moves in the desired second movement mode (as a result, the substrate 151 moves in the desired second movement mode). For example, the control device 16 controls the mask stage drive system and the substrate stage drive system so that step-and-scan exposure is performed. In short, the control device 16 controls the mask stage 13 and the substrate 151 for holding the mask 131 in a state in which the exposure light EL is irradiated to the illumination area IR on the mask 131. The mask stage drive system and the substrate stage drive system are controlled so that the holding substrate stage 15 moves in synchronization along a predetermined scanning direction. As a result, the mask pattern formed on the mask 131 is transferred to the substrate 151. In the following description, the scanning direction in which the mask stage 13 and the substrate stage 15 move in synchronization is the X-axis direction, and the Y-axis direction orthogonal to the X-axis direction is appropriately referred to as the “non-scanning direction.”

In addition, the structure of the exposure apparatus 1 explained using FIGS. 1 and 2 is an example. Accordingly, at least part of the structure of the exposure apparatus 1 may be modified appropriately. For example, the exposure apparatus 1 may be provided with 6 or less or 8 or more illumination optical systems 12. For example, the exposure apparatus 1 may be provided with 6 or less or 8 or more projection optical systems 14.

Alternatively, the exposure apparatus 1 may be provided with a single illumination optical system 12. The exposure apparatus 1 may be provided with a single projection optical system 14. However, when the exposure apparatus 1 is provided with a single projection optical system 14, the seam pattern area 131a and the non-seam pattern area 131b, which will be described later, do not need to be set on the mask 131, On the substrate 151, a seamless exposure area 151a and a non-seamless exposure area 151b, which will be described later, do not need to be set.

(1-2) Placement of illumination area (IR) and projection area (PR)

Next, referring to FIGS. 2(a) to 2(c), the illumination area IR set on the mask 131 and the projection area RP set on the substrate 151 will be described. FIG. 2(a) is a plan view showing the projection area PR set on the substrate 151. FIG. 2(b) is a plan view showing the illumination area IR set on the mask 131. FIG. 2(c) is a plan view showing a unit mask pattern portion (MPp) repeatedly formed on the mask 131.

As shown in FIG. 2(a), the same number of projection areas PR as the number of projection optical systems 14 provided in the exposure apparatus 1 is set on the substrate 151. In this embodiment, since the exposure apparatus 1 is provided with seven projection optical systems 14, there are seven projection areas PR on the substrate 151 (in short, projection area PRa, projection area PRb). ), projection area (PRc), projection area (PRd), projection area (PRe), projection area (PRf) and projection area (PRg)) are set. The projection optical system 14a sets the projection area PRa on which the exposure light EL irradiated to the illumination area IRa is projected by the projection optical system 14a. The projection optical system 14b sets the projection area PRb on which the exposure light EL irradiated to the illumination area IRb is projected by the projection optical system 14b. The projection optical system 14c sets the projection area PRc on which the exposure light EL irradiated to the illumination area IRc is projected by the projection optical system 14c. The projection optical system 14d sets the projection area PRd on which the exposure light EL irradiated to the illumination area IRd is projected by the projection optical system 14d. The projection optical system 14e sets the projection area PRe on which the exposure light EL irradiated to the illumination area IRe is projected by the projection optical system 14e. The projection optical system 14f sets the projection area PRf on which the exposure light EL irradiated to the illumination area IRf is projected by the projection optical system 14f. The projection optical system 14g sets the projection area PRg on which the exposure light EL irradiated to the illumination area IRg is projected by the projection optical system 14g.

The projection area PRa, the projection area PRc, the projection area PRe, and the projection area PRg are trapezoid-shaped areas whose sides on the +X side are the bases. The projection area PRb, the projection area PRd, and the projection area PRf are trapezoid-shaped areas whose sides on the -X side are the bases. Projection area (PRa), projection area (PRc), projection area (PRe) and projection area (PRg) are along the X-axis direction with respect to projection area (PRb), projection area (PRd) and projection area (PRf). It is set at a position separated by a first predetermined amount. The projection area PRa, the projection area PRc, the projection area PRe, and the projection area PRg, and the projection area PRb, the projection area PRd, and the projection area PRf are set in a zigzag shape.

Each projection area (PR) includes two ends (hereinafter appropriately referred to as “slanted portions”) defined by sides inclined with respect to the X-axis direction. However, the -Y side side of the projection area PRa and the +Y side side of the projection area PRg are the light blocking band 131s surrounding the effective area 131p of the mask 131 (FIG. 2(b)) Due to the fact that the exposure light EL is blocked by (reference), it is not inclined with respect to the X-axis direction. Accordingly, each of the projection areas PRa and PRg includes a single inclined portion.

The slope on the +Y side of the projection area PRa overlaps with the slope on the -Y side of the projection area PRb along the X-axis direction (in other words, they are adjacent, the same applies hereinafter). The inclined portion on the +Y side of the projection area PRb overlaps the inclined portion on the -Y side of the projection area PRc along the X-axis direction. The slope on the +Y side of the projection area PRc overlaps with the slope on the -Y side of the projection area PRd along the X-axis direction. The slope on the +Y side of the projection area PRd overlaps the slope on the -Y side of the projection area PRe along the X-axis direction. The slope on the +Y side of the projection area PRe overlaps the slope on the -Y side of the projection area PRf along the X-axis direction. The slope on the +Y side of the projection area PRf overlaps the slope on the -Y side of the projection area PRg along the X-axis direction.

The two inclined portions overlapping along the In short, the two inclined portions overlapping along the X-axis direction define a joint exposure area 151a on the substrate 151 that is double exposed by the two inclined portions during one scanning exposure operation. On the other hand, the non-seamless exposure area 151b other than the seam exposure area 151a on the surface of the substrate 151 is an area where the exposure light EL is projected once during one scanning exposure operation. The slope portion of each projection region (PR) is such that the sum of the widths along the X-axis direction of two overlapping slope portions along the It is set to be equal to the width along the X axis of the area portion. As a result, the exposure amount of the doubly exposed joint exposure area 151a becomes substantially the same as the exposure amount of the non-seamless exposure area 151b that is not doubly exposed. Accordingly, the images of the mask pattern projected on the plurality of projection areas PR are connected with relatively high precision.

The joint exposure area 151a is a square area. The next exposure area 151a is an area in which the X-axis direction (i.e., the scanning direction) becomes the longitudinal direction and the Y-axis direction (i.e., the non-scanning direction) becomes the width direction. The joint exposure area 151a is an area extending along the X-axis direction. On the substrate 151, a plurality of joint exposure regions 151a (in the example shown in FIG. 2(a), six joint exposure regions 151a) are set at equal intervals along the Y-axis direction.

The non-seam exposure area 151b is a rectangular area. The non-seamless exposure area 151b is an area in which the X-axis direction becomes the longitudinal direction and the Y-axis direction becomes the width direction. The non-seam exposed area 151b is an area extending along the X-axis direction. On the substrate 151, a plurality of non-seamless exposure areas 151b (in the example shown in FIG. 2(a), seven non-seamless exposure areas 151b) are set at equal intervals along the Y-axis direction.

On the other hand, as shown in FIG. 2(b), the same number of illumination areas IR as the number of illumination optical systems 12 provided in the exposure apparatus 1 is set on the mask 131. In this embodiment, since the exposure apparatus 1 is provided with seven illumination optical systems 14, there are seven illumination regions IR (in short, illumination region IRa, illumination region IRb) on the mask 131. ), illumination area (IRc), illumination region (IRd), illumination region (IRe), illumination region (IRf) and illumination region (IRg)) are set. The illumination optical system 12a irradiates the exposure light EL to the illumination area IRa. The illumination optical system 12b irradiates the exposure light EL to the illumination area IRb. The illumination optical system 12c irradiates the exposure light EL to the illumination area IRc. The illumination optical system 12d irradiates the exposure light EL to the illumination area IRd. The illumination optical system 12e irradiates the exposure light EL to the illumination area IRe. The illumination optical system 12f irradiates the exposure light EL to the illumination area IRf. The illumination optical system 12g irradiates exposure light EL to the illumination region IRg.

The field of view on the object surface side of each projection optical system 14 is defined by the field stop 144 provided in each projection optical system 14. For this reason, each illumination region IR means a region that is optically conjugate with the field stop 144.

In this embodiment, each projection optical system 14 projects an equal magnification upright image of the mask pattern onto the substrate 151 . For this reason, the shape and arrangement of the illumination area IRg from the illumination area IRa are the same as the shape and arrangement of the projection area PRg from the projection area PRa, respectively. For this reason, each illumination region IR includes two end portions (hereinafter appropriately referred to as “inclined portions”) defined by sides inclined with respect to the X-axis direction. The two inclined portions overlapping along the In short, the two slanted portions of the two illumination regions (IR) overlapping along the It is stipulated in the above. On the other hand, the non-seamless pattern area 131b other than the seam pattern area 131a in the effective area 131p becomes an area illuminated with the exposure light EL once during one scanning exposure operation.

The joint pattern area 131a is an area corresponding to the joint exposure area 151a. In short, the exposure light EL that illuminates the joint pattern area 131a passes through the joint pattern area 131a and is irradiated to the joint exposure area 151a. On the other hand, the non-seamless pattern area 131b is an area corresponding to the non-seamless exposure area 151b. In short, the exposure light EL that illuminates the non-seamless pattern area 131b passes through the non-seamless pattern area 131b and is irradiated to the non-seamless exposure area 151b.

The joint pattern area 131a is a square area. The joint pattern area 131a is an area in which the X-axis direction (i.e., the scanning direction) becomes the longitudinal direction and the Y-axis direction (i.e., the non-scanning direction) becomes the width direction. The joint pattern area 131a is an area extending along the X-axis direction. On the mask 131, a plurality of joint pattern areas 131a (in the example shown in FIG. 3(b), six joint pattern areas 131a) are set at equal intervals along the Y-axis direction.

The non-seam pattern area 131b is a square area. The non-seam pattern area 131b is an area in which the X-axis direction becomes the longitudinal direction and the Y-axis direction becomes the width direction. The non-seam pattern region 131b is a region extending along the X-axis direction. On the mask 131, a plurality of non-seamless pattern areas 131b (in the example shown in FIG. 3(b), seven non-seam pattern areas 131b) are set at equal intervals along the Y-axis direction.

The mask pattern formed on the mask 131 is formed repeatedly and regularly along the Y-axis direction, as shown in FIG. 2(c), for example, and includes a plurality of unit mask pattern portions (each of which is the same mask pattern) 1311u). A plurality of unit mask pattern portions 1311u are formed in at least a portion of the effective area 131p. In short, at least a portion of the effective area 131p includes a repeating area in which a plurality of unit mask pattern portions 1311u are regularly formed along at least one of the X-axis direction and the Y-axis direction. In addition, in the example shown in FIG. 2(c), a plurality of unit mask pattern portions 1311u are formed in a repetitive manner along both the X-axis direction and the Y-axis direction.

In this case, the spacing D1 between two adjacent joint pattern regions 131a along the Y-axis direction is longer than the spacing D2 between two unit mask pattern portions 1311u adjacent to each other along the Y-axis direction. . The frequency at which the joint pattern area 131a appears along the Y-axis direction is lower than the frequency at which the unit mask pattern portion 1311u appears along the Y-axis direction. The arrangement period of the joint pattern area 131a along the Y-axis direction is longer than the arrangement period of the unit mask pattern portion 1311u along the Y-axis direction.

A unit device pattern portion 1511u corresponding to the unit mask pattern portion 1311u is formed on the substrate 151 by exposure light EL through the unit mask pattern portion 1311u. Therefore, on the substrate 151, by the exposure light EL through the mask 131 including a plurality of unit mask pattern portions 1311u formed (in other words, arranged) in a repeating and regular manner, a plurality of unit mask pattern portions 1311u are arranged in a repetitive and regular manner. A device pattern including a plurality of unit device pattern portions 1511u is formed.

As described above, the substrate 151 exposed by the exposure apparatus 1 is used, for example, to manufacture a display panel. In this case, the unit mask pattern portion 1311u is a mask pattern for forming each pixel (in short, each display pixel) constituting the display panel on the substrate 151. In short, the unit mask pattern portion 1311u is a mask for forming circuit elements such as TFT (Thin Film Transistor) elements, color filters, black matrices, touch panel circuit elements, etc. formed in each pixel on the substrate 151. It's a pattern. Additionally, the unit device pattern portion 1511u is a device pattern for each pixel.

A specific example of the mask 131 used to manufacture such a display panel will be described with reference to FIGS. 3(a) and 3(b). FIG. 3(a) is a plan view showing one specific example of the mask 131 used to manufacture the display panel. FIG. 3(b) is a plan view showing a part of the mask 131 shown in FIG. 3(a).

As shown in FIG. 3(a), the mask 131 (in particular, the effective area 131p surrounded by the light-shielding area 131s) includes a mask pattern group 1311g including a plurality of identical mask patterns 1311d. ) is formed. Each mask pattern 1311d is a mask pattern for manufacturing one display panel. In short, each mask pattern 1311d is a mask pattern corresponding to the device pattern of one display panel. Therefore, the mask 131 shown in FIG. 3(a) is used to manufacture a plurality of identical display panels from one substrate 151. In the example shown in FIG. 3(a), eight mask patterns 1311d are formed on the mask 131. Therefore, the mask 131 shown in FIG. 3(a) is used to manufacture eight identical display panels from one substrate 151.

Each mask pattern 1311d includes a plurality of unit mask pattern portions 1311u for forming a plurality of pixels of one display panel on the substrate 151, respectively, as shown in FIG. 3(b). Hereinafter, a set of a plurality of unit mask pattern portions 1311u will be appropriately referred to as “pixel mask pattern portion 1311p.” Each mask pattern 1311d also includes a peripheral mask pattern portion 1311s for forming a peripheral circuit, etc. disposed around the pixel area where a plurality of pixels are disposed, on the substrate 151. FIG. 3(b) shows an example in which the peripheral mask pattern portion 1311s includes a mask pattern for forming wiring drawn from a plurality of pixels (e.g., a wiring connecting a plurality of pixels and a driving circuit). It is showing. Additionally, in the example shown in FIG. 3(b), the peripheral mask pattern portion 1311s is disposed on the -X side of the pixel mask pattern portion 1311p. However, depending on the arrangement position of the peripheral circuit, etc., the peripheral mask pattern portion 1311s may be disposed on at least one of the +X side, −Y side, and +Y side of the pixel mask pattern portion 1311p.

Such a mask 131 is manufactured as follows. First, a mask pattern corresponding to the device pattern (in the example shown in FIGS. 3(a) to 3(b), a mask pattern including a plurality of mask patterns 1311d) is generated by the mask pattern calculating device 2 described later. group (1311g)) is calculated. In addition, “calculation of the mask pattern” referred to here means determining the contents of the mask pattern (in short, pattern layout), and is substantially equivalent to generating mask pattern data indicating the contents of the mask pattern. After that, the calculated mask pattern is actually formed on the mask blank on which the mask pattern is not formed. Specifically, for example, based on the calculated mask pattern, an electron beam exposure device or the like exposes the mask blank on which the photosensitive material is applied. Thereafter, the exposed mask blank is developed, thereby forming a pattern layer of photosensitive material corresponding to the mask pattern on the mask blank. After that, the mask blank (in particular, the light-shielding film provided on the mask blank) is processed through the pattern layer of the photosensitive material. As a result, a mask 131 on which a mask pattern corresponding to the device pattern is formed is manufactured.

(2) Mask pattern calculation device of this embodiment (2)

Next, the mask pattern calculation device 2 that calculates the mask pattern formed on the mask 131 will be described with reference to FIGS. 4 to 12 .

(2-1) Structure of mask pattern calculation device (2)

First, the structure of the mask pattern calculation device 2 will be described with reference to FIG. 4 . FIG. 4 is a block diagram showing the structure of the mask pattern calculation device 2.

As shown in FIG. 4, the mask pattern calculation device 2 includes a CPU (Central Processing Unit) 21, a memory 22, an input unit 23, an operation device 24, and a display device 25. ) is provided.

The CPU 21 controls the operation of the mask pattern calculation device 2. CPU 21 calculates a mask pattern and generates mask pattern data. In short, the CPU 21 designs the mask layout. Specifically, the CPU 21 calculates a mask pattern that satisfies a desired calculation condition based on device pattern data indicating the contents of the device pattern (in short, pattern layout). Specifically, the CPU 21 calculates the mask pattern by solving an optimization problem or mathematical planning problem for calculating a mask pattern that satisfies desired calculation conditions. A specific example of the desired calculation condition is the condition of optimizing the exposure amount (DOSE amount) and depth of focus (DOF: Depth Of Focus) (so-called optimizing the process window). Additionally, the condition of optimizing the exposure amount and depth of focus means the condition of setting the exposure amount to the first desired amount and setting the depth of focus to the second desired amount.

The CPU 21 may actually function as an EDA (Electronic Design Automation) tool. For example, the CPU 21 may function as an EDA tool by executing a computer program for causing the CPU 21 to perform the calculation operation of the mask pattern described above.

The memory 22 stores a computer program for causing the CPU 21 to perform a mask pattern calculation operation. However, the computer program for causing the CPU 21 to perform the calculation operation of the mask pattern may be recorded in an external storage device (for example, a hard disk or an optical disk). The memory 22 also temporarily stores intermediate data generated while the CPU 21 is performing a mask pattern calculation operation.

The input unit 23 accepts input of various data used by the CPU 21 to perform a mask pattern calculation operation. An example of such data may include device pattern data indicating a device pattern to be formed on the substrate 151. However, the mask pattern calculation device 2 does not need to be provided with the input unit 23.

The operation device 24 accepts the user's operation on the mask pattern calculation device 2. The operating device 24 may include at least one of, for example, a keyboard, a mouse, and a touch panel. The CPU 21 may perform a mask pattern calculation operation based on the user's operation received by the operating device 24. However, the mask pattern calculation device 2 does not need to be provided with the operating device 24.

The display device 25 is capable of displaying desired information. For example, the display device 25 may directly or indirectly display information indicating the state of the mask pattern calculation device 2. For example, the display device 25 may directly or indirectly display the mask pattern calculated by the mask pattern calculation device 2. For example, the display device 25 may directly or indirectly display arbitrary information regarding the calculation operation of the mask pattern. However, the mask pattern calculation device 2 does not need to be provided with the display device 25.

(2-2) Mask pattern calculation operation

Next, referring to FIG. 5, the mask pattern calculation operation performed by the mask pattern calculation device 2 will be described. FIG. 5 is a flow chart showing the flow of the mask pattern calculation operation performed by the mask pattern calculation device 2.

As shown in Fig. 5, the CPU 21 included in the mask pattern calculation device 2 acquires device pattern data indicating the device pattern (step S1). Device pattern data is data representing the contents of a device pattern (in short, pattern layout) adjusted to satisfy predetermined design rules, and is acquired as a result of so-called device design (in other words, circuit design). Examples of predetermined design rules include the minimum width of a line or hole and the minimum space between two lines or two holes.

In parallel with the processing of Step 1, the CPU 21 generates a state variable indicating the state of the exposure apparatus 1 when forming the device pattern on the substrate 151 with the exposure light EL through the mask 131. Set (step S2).

For example, the CPU 21 may set state variables related to the illumination optical system 12. State variables related to the illumination optical system 12 include the state of the light source unit 11 (e.g., light intensity distribution in the coplane of the illumination optical system 12, light intensity in the coplane of the illumination optical system 12). is an adjustable or fixed parameter that defines the distribution of polarization states, etc. As a specific example of the state variable related to the illumination optical system 12, the state variable related to the shape of the illumination pattern by the illumination optical system 12 (in other words, the shape of the emission pattern of the exposure light EL), the σ value At least one of a state variable related to the light intensity of the exposure light EL1 and a state variable related to the light intensity of the exposure light EL1 can be mentioned.

For example, the CPU 21 may set state variables related to the projection optical system 14. State variables related to the projection optical system 14 are adjustable or fixed parameters that define the state of the projection optical system 14 (e.g., optical characteristics such as aberration or retardation). As a specific example of such a state variable related to the projection optical system 14, a state variable related to the wavefront shape of the exposure light EL projected by the projection optical system 14, and the exposure light projected by the projection optical system 14 At least one of a state variable related to the intensity distribution of the light EL and a state variable related to the phase shift amount (or phase) of the exposure light EL projected by the projection optical system 14 can be mentioned.

After that, the CPU 21 calculates a mask pattern capable of forming an image that forms the device pattern indicated by the device pattern data acquired in step S1 on the substrate 151 (step S3). At this time, the CPU 21 creates a mask pattern that can satisfy the above-described calculation conditions under the situation that the exposure apparatus 1 in the state indicated by the state variable set in step S2 irradiates the exposure light EL. Calculate For this reason, each time the CPU 21 calculates a mask pattern, it determines whether the calculated mask pattern satisfies the calculation conditions. If the calculated mask pattern does not satisfy the calculation conditions, CPU 21 repeats the operation of changing the mask pattern (in other words, adjusting the calculated mask pattern) until the calculation conditions are satisfied. However, the CPU 21 may change the state variable in addition to or instead of changing the mask pattern. In this case, the CPU 21 calculates a mask pattern that can satisfy the above-described calculation conditions under the situation that the exposure apparatus 1 in the state indicated by the state variable after the change irradiates the exposure light EL. do.

In particular, in the present embodiment, when calculating the mask pattern in step S3 in FIG. 5, the CPU 21 determines that a plurality of unit mask pattern portions 1311u are included (in other words, formed) in the mask 131. Using this method, a mask pattern is calculated relatively efficiently. Hereinafter, with reference to FIG. 6, processing for calculating a mask pattern in step S3 of FIG. 5 using a plurality of unit mask pattern portions 1311u included in the mask 131 will be further described. FIG. 6 is a flow chart showing the flow of processing for calculating a mask pattern using a plurality of unit mask pattern portions 1311u included in the mask 131 in step S3 of FIG. 5 . In addition, for convenience of explanation, in the explanation using FIG. 6, the explanation proceeds using the operation for calculating the mask pattern shown in FIGS. 3(a) to 3(b), but the process shown in FIG. 6 can be used for any mask. Applicable when calculating patterns.

As shown in FIG. 6 , CPU 21 acquires the pattern layout of the unit device pattern portion 1511u based on the device pattern data (step S311). In addition, the device pattern includes a plurality of unit device pattern portions 1511u, but since the pattern layout of the plurality of unit device pattern portions 1511u is the same, the CPU 21 uses one unit device pattern portion ( All you have to do is acquire the pattern layout of 1511u).

After that, CPU 21 calculates the pattern layout of one unit mask pattern portion 1311u based on the pattern layout of one unit device pattern portion 1511u acquired in step S311 (step S312). In short, instead of collectively calculating the pixel mask pattern portion 1311p including a plurality of unit mask pattern portions 1311u, the CPU 21 first calculates the pattern layout of one unit mask pattern portion 1311u. Calculate .

In this embodiment, when calculating the pattern layout of one unit mask pattern portion 1311u in step S312, CPU 21 determines that a plurality of unit mask pattern portions 1311u are included in the mask 131. Use it. Specifically, as described above, the mask pattern to be calculated by the CPU 21 includes a plurality of unit mask pattern portions 1311u arranged in a repeating regular manner. The pattern layout of the plurality of unit mask pattern portions 1311u is the same. In that case, on the mask 131, a part of the unit mask pattern portion 1311u itself will be adjacent to a certain unit mask pattern portion 1311u.

For example, FIG. 7 shows the pattern layout of one unit mask pattern portion 1311u for forming one unit device pattern portion 1511u corresponding to one pixel of the display panel. A mask pattern for forming a TFT element included in one pixel, and a mask pattern for forming a signal line (e.g., gate line, data line, etc.) included in one pixel and leading to the TFT element. This is included. However, the scanning exposure operation for forming the TFT element and the scanning exposure operation for forming the signal line are generally performed separately using different masks 131. Therefore, the pattern calculating device 2 actually has a mask pattern including a unit mask pattern portion 1311u for forming a TFT element and a mask pattern including a unit mask pattern portion 1311u for forming a signal line. is calculated separately. However, in the present embodiment, for convenience of explanation, in FIG. 7 (and further, FIGS. 8(a) to 10 below), the repeating arrangement of the plurality of unit mask pattern portions 1311u is shown for easy understanding. , the description will proceed using the unit mask pattern portion 1311u including a mask pattern for forming a TFT element and a mask pattern for forming a signal line.

In the example shown in FIG. 7 , the shape of the unit mask pattern portion 1311u on the XY plane is quadrangular (for example, rectangular or square). In other words, the shape of the area occupied by the unit mask pattern portion 1311u on the mask 131 on the XY plane is square. On the mask 131, a plurality of such unit mask pattern portions 1311u are repeatedly and regularly arranged along both the X-axis direction and the Y-axis direction. In short, on the mask 131, a plurality of such unit mask pattern portions 1311u are arranged in a matrix shape.

In this case, as shown in Fig. 8(a), the unit mask pattern portion 1311u-2 is adjacent to the +X side of the unit mask pattern portion 1311u-1. The pattern layout of the unit mask pattern portion 1311u-2 is the same as that of the unit mask pattern portion 1311u-1. For this reason, in reality, the outer edge (or edge, hereinafter the same) of the +X side of the unit mask pattern portion 1311u-1 has a Adjacent mask pattern portions 1311n, which are part of the unit mask pattern portion 1311u-1 including the outer edge, are adjacent.

Similarly, as shown in FIG. 8(b), the unit mask pattern portion 1311u-3 is adjacent to the -X side of the unit mask pattern portion 1311u-1. The pattern layout of the unit mask pattern portion 1311u-3 is the same as that of the unit mask pattern portion 1311u-1. For this reason, substantially, the outer edge on the -X side of the unit mask pattern portion 1311u-1 includes the outer edge on the +X side of the unit mask pattern portion 1311u-1. ) Adjacent mask pattern portions 1311n, which are part of , are adjacent.

Similarly, as shown in FIG. 8(c), the unit mask pattern portion 1311u-4 is adjacent to the -Y side of the unit mask pattern portion 1311u-1. The pattern layout of the unit mask pattern portion 1311u-4 is the same as that of the unit mask pattern portion 1311u-1. For this reason, substantially, the outer edge on the -Y side of the unit mask pattern portion 1311u-1 includes the outer edge on the +Y side of the unit mask pattern portion 1311u-1. ) Adjacent mask pattern portions 1311n, which are part of , are adjacent.

Similarly, as shown in FIG. 8(d), the unit mask pattern portion 1311u-5 is adjacent to the +Y side of the unit mask pattern portion 1311u-1. The pattern layout of the unit mask pattern portion 1311u-5 is the same as that of the unit mask pattern portion 1311u-1. For this reason, substantially, the outer edge of the +Y side of the unit mask pattern portion 1311u-1 includes the outer edge of the unit mask pattern portion 1311u-1 on the -Y side. ) Adjacent mask pattern portions 1311n, which are part of , are adjacent.

Considering that a part of the unit mask pattern portion 1311u may be an adjacent mask pattern portion 1311n adjacent to the unit mask pattern portion 1311u, the CPU 21 calculates one It is assumed (in other words, assumed) that a part of the unit mask pattern portion 1311u is adjacent to the unit mask pattern portion 1311u as an adjacent mask pattern portion 1311n. For example, as shown in FIG. 9, the CPU 21 blocks adjacent mask pattern portions along the direction in which each side of the unit mask pattern portion 1311 extends (that is, at least one of the X-axis direction and the Y-axis direction). It may be assumed that 1311n is adjacent to the unit mask pattern portion 1311u. Specifically, the CPU 21 includes (i) the outer edge of the +X side of the unit mask pattern portion 1311u, an adjacent mask pattern portion 1311n including the outer edge of the - -1) is adjacent, and (ii) the outer edge of the -X side of the unit mask pattern portion 1311u includes an adjacent mask pattern portion 1311n-2 including the outer edge of the + is adjacent, and (iii) to the outer edge of the unit mask pattern portion 1311u on the +Y side, an adjacent mask pattern portion 1311n-3 including the outer edge of the unit mask pattern portion 1311u on the −Y side is adjacent to it. , (iv) Even assuming that the outer edge of the unit mask pattern portion 1311u on the -Y side is adjacent to the adjacent mask pattern portion 1311n-4 including the outer edge of the +Y side of the unit mask pattern portion 1311u, do. Alternatively, as shown in FIG. 10, the CPU 21 operates on the diagonal of the unit mask pattern portion 1311u in addition to (or instead of) the direction in which each side of the unit mask pattern portion 1311 shown in FIG. 9 extends. It may be assumed that the adjacent mask pattern portion 1311n is adjacent to the unit mask pattern portion 1311u along the direction (in other words, the direction that intersects both the X-axis direction and the Y-axis direction on the XY plane). Specifically, the CPU 21 (i) along the diagonal direction of the unit mask pattern portion 1311u, extends the outer edges (e.g., vertices, hereinafter) of the +X side and the +Y side of the unit mask pattern portion 1311u. (same in sentence) is adjacent to the adjacent mask pattern portion 1311n-5 including the outer edges of the -X side and the -Y side of the unit mask pattern portion 1311u, (ii) the unit mask pattern portion 1311u ) adjacent to the outer edges of the -X side and the +Y side, an adjacent mask pattern portion 1311n-6 including the outer edges of the + To the outer edges of the pattern portion 1311u on the +X side and the -Y side, an adjacent mask pattern portion 1311n-7 including the outer edges of the - iv) On the outer edges of the unit mask pattern portion 1311u on the -X side and -Y side, there is an adjacent mask pattern portion 1311n-8 including the outer edges on the + You can assume that they are adjacent.

Under this hypothetical situation, the CPU 21 calculates the pattern layout of one unit mask pattern portion 1311u by considering the influence of the adjacent mask pattern portion 1311n. As an example, based on the unit device pattern portion 1511u, the CPU 21 first creates a unit mask pattern portion 1311u corresponding to the unit device pattern portion 1511u so as to satisfy the calculation conditions described above. Calculate In short, the CPU 21 first calculates the unit mask pattern portion 1311u without considering the repetitive arrangement of the plurality of unit mask pattern portions 1311u. At this point, the mask pattern portion 1311u is assumed to be adjacent to the unit mask pattern portion 1311u without considering the existence of the adjacent mask pattern portion 1311n (in other words, the adjacent mask pattern portion 1311n is not adjacent to the unit mask pattern portion 1311u). (after doing so) is being calculated. However, in reality, an adjacent mask pattern portion 1311n (in other words, a part of another unit mask pattern portion 1311u) is adjacent to the unit mask pattern portion 1311u. Therefore, the exposure light EL passing through the unit mask pattern portion 1311u is likely to be influenced not only by the unit mask pattern portion 1311u through which the exposure light EL itself passes, but also by the adjacent mask pattern portion 1311n. There is. For this reason, the exposure light EL through the unit mask pattern portion 1311u calculated without considering the presence of the adjacent mask pattern portion 1311n is unit due to the influence of the adjacent mask pattern portion 1311n. There is a possibility that an image capable of forming the device pattern portion 1511u cannot be formed on the substrate 151. Therefore, the CPU 21 assumes that a part of the calculated unit mask pattern portion 1311u is adjacent to the calculated unit mask pattern portion 1311u as an adjacent mask pattern portion 1311n. After that, the CPU 21 estimates the influence that the presence of the adjacent mask pattern portion 1311n has on the formation of the unit device pattern portion 1511u by exposure light EL through the unit mask pattern portion 1311u. And, at least a part of the unit mask pattern portion 1311u is corrected so as to offset this influence and satisfy the calculation conditions described above. In short, the CPU 21 creates an image capable of forming an appropriate unit device pattern portion 1511u even when the adjacent mask pattern portion 1311n is present, as in the case where the adjacent mask pattern portion 1311n is not present. To enable formation, at least a portion of the unit mask pattern portion 1311u is corrected. In addition, correction of at least a portion of the unit mask pattern portion 1311u includes adjustment of the line width of at least a portion of the unit mask pattern portion 1311u, adjustment of the stretching direction of at least a portion of the unit mask pattern portion 1311u, and adjustment of the stretching direction of at least a portion of the unit mask pattern portion 1311u. It includes removal of at least a portion of the portion 1311u and addition of a new mask pattern for at least a portion of the unit mask pattern portion 1311u.

Referring again to FIG. 6, after (or before or in parallel with) calculation of the unit mask pattern portion 1311u, the CPU 21 generates a peripheral device pattern portion corresponding to the device pattern of the peripheral circuit based on the device pattern data. (1511s) The pattern layout is acquired (step S313). After that, the CPU 21 calculates the pattern layout of the peripheral mask pattern portion 1311s based on the peripheral device pattern portion 1511s acquired in step S313 (step S314).

After that, the CPU 21 repeatedly and regularly arranges a plurality of the unit mask pattern portions 1311u calculated in step S312 (step S315). Specifically, the CPU 21 specifies the arrangement aspect of the plurality of unit device pattern portions 1511u included in the device pattern based on the device pattern data acquired in step S1 of FIG. 5 . After that, the CPU 21 arranges the plurality of unit mask pattern portions 1311u according to the arrangement pattern of the specific plurality of unit device pattern portions 1511u. As a result, the pattern layout of the pixel mask pattern portion 1311p (see FIG. 3(b)) including a plurality of unit mask pattern portions 1311u is calculated. After that, the CPU 21 arranges the peripheral mask pattern portion 1311s calculated in step S314 with respect to the calculated pixel mask pattern portion 1311p (step S315). As a result, as shown in FIG. 11, the pattern layout of the mask pattern 1311d including a plurality of unit mask pattern portions 1311u is calculated (step S315).

After that, the CPU 21 arranges a plurality of mask patterns 1311d calculated in step S315 (step S316). As a result, as shown in FIG. 12, a mask pattern group 1311g (in short, a mask pattern on the mask 131) containing a plurality of mask patterns 1311d is calculated.

As described above, in the present embodiment, the CPU 21 can calculate a mask pattern by utilizing that a plurality of unit mask pattern portions 1311u are included in the mask 131. Therefore, the CPU 21 can efficiently calculate the mask pattern.

In addition, the processing of step S316 in FIG. 6 described above is processing performed when calculating the mask pattern of the mask 131 including a plurality of mask patterns 1311d including a plurality of unit mask pattern portions 1311u. . However, the pattern calculation device 2 may calculate the mask pattern of the mask 131 including only one mask pattern 1311d including a plurality of unit mask pattern portions 1311u. In this case, the processing of step S316 in FIG. 6 described above does not need to be performed.

(3) Variation example

Next, a modified example of the mask pattern calculation operation described above will be described.

(3-1) First modification example

In the above description, the CPU 21 calculates one unit mask pattern portion 1311u and calculates the mask pattern 1311d by arranging a plurality of the calculated unit mask pattern portions 1311u. On the other hand, in the first modification, the CPU 21 calculates a plurality of different types of unit mask pattern portions 1311u.

Specifically, as shown in FIG. 13, each of the plurality of unit mask pattern portions 1311u included in the mask pattern 1311d is distinguishable based on the difference in adjacent positions of other unit mask pattern portions 1311u. It can be classified into multiple types of unit mask pattern groups (1311ud). In the example shown in FIG. 13 , for example, each of the plurality of unit mask pattern portions 1311u can be classified into any of nine types of unit mask pattern groups 1311ud-1 to 1311ud-9. The unit mask pattern group 1311ud-1 includes unit mask pattern portions 1311u with other unit mask pattern portions 1311u adjacent to each of the +X side, -X side, +Y side, and -Y side. In the unit mask pattern group 1311ud-2, other unit mask pattern portions 1311u are adjacent to each of the +X side, -X side, and +Y side, while other unit mask pattern portions 1311u are adjacent to the -Y side. It belongs to the unit mask pattern section (1311u) that is not used. In the unit mask pattern group 1311ud-3, other unit mask pattern portions 1311u are adjacent to each of the +X side, -X side, and -Y side, while other unit mask pattern portions 1311u are adjacent to the +Y side. It belongs to the unit mask pattern section (1311u) that is not used. In the unit mask pattern group 1311ud-4, other unit mask pattern portions 1311u are adjacent to each of the -X side, +Y side, and -Y side, while other unit mask pattern portions 1311u are adjacent to the +X side. It belongs to the unit mask pattern section (1311u) that is not used. In the unit mask pattern group 1311ud-5, other unit mask pattern portions 1311u are adjacent to each of the +X side, +Y side, and -Y side, while other unit mask pattern portions 1311u are adjacent to the -X side. It belongs to the unit mask pattern section (1311u) that is not used. In the unit mask pattern group 1311ud-6, different unit mask pattern portions 1311u are adjacent to each of the +X side and +Y side, while other unit mask pattern portions 1311u are adjacent to each of the -X side and -Y side. Includes non-adjacent unit mask pattern portions 1311u. In the unit mask pattern group 1311ud-7, different unit mask pattern portions 1311u are adjacent to each of the +X side and -Y side, while other unit mask pattern portions 1311u are adjacent to each of the -X side and +Y side. Includes non-adjacent unit mask pattern portions 1311u. In the unit mask pattern group 1311ud-8, different unit mask pattern portions 1311u are adjacent to each of the -X side and +Y side, while other unit mask pattern portions 1311u are adjacent to each of the +X side and -Y side. Includes non-adjacent unit mask pattern portions 1311u. In the unit mask pattern group 1311ud-9, different unit mask pattern portions 1311u are adjacent to each of the -X side and -Y side, while other unit mask pattern portions 1311u are adjacent to each of the +X side and +Y side. Includes non-adjacent unit mask pattern portions 1311u.

The CPU 21 calculates a plurality of types of unit mask pattern portions 1311u belonging to a plurality of different types of unit mask pattern groups 1311ud. In the example shown in FIG. 13, the CPU 21 includes one unit mask pattern portion 1311u-11 belonging to the unit mask pattern group 1311ud-1 and one unit belonging to the unit mask pattern group 1311ud-2. Mask pattern portion (1311u-12), one unit mask pattern portion (1311u-13) belonging to the unit mask pattern group (1311ud-3), one unit mask pattern portion (1311ud-4) belonging to the unit mask pattern group (1311ud-4) 1311u-14), one unit mask pattern portion (1311u-15) belonging to the unit mask pattern group (1311ud-5), one unit mask pattern portion (1311u-16) belonging to the unit mask pattern group (1311ud-6) , one unit mask pattern portion 1311u-17 belonging to the unit mask pattern group 1311ud-7, one unit mask pattern portion 1311u-18 belonging to the unit mask pattern group 1311ud-8, and, unit One unit mask pattern portion 1311u-19 belonging to the mask pattern group 1311ud-9 is calculated.

The processing itself for calculating each of the plurality of types of unit mask pattern portions 1311u is the same as the processing for calculating the unit mask pattern portion 1311u described above. Accordingly, the CPU 21, among the outer edges of each type of unit mask pattern portion 1311u on the , assuming that at least a part of each type of unit mask pattern portion 1311u is adjacent, each type of unit mask pattern portion 1311u is calculated. For example, the CPU 21 attaches at least a portion of the unit mask pattern portion 1311u-11 to each outer edge of the +X side, -X side, +Y side, and -Y side of the unit mask pattern portion 1311u-11. Assuming that are adjacent, the unit mask pattern portion 1311u-11 is calculated. For example, the CPU 21 assumes that at least a part of the unit mask pattern portion 1311u-12 is adjacent to each outer edge of the +X side, −X side, and +Y side of the unit mask pattern portion 1311u-12. After making the assumption, the unit mask pattern portion 1311u-12 is calculated. For example, the CPU 21 has at least a portion of the unit mask pattern portion 1311u-13 adjacent to each outer edge of the +X side, −X side, and −Y side of the unit mask pattern portion 1311u-13. Assuming that there is, the unit mask pattern portion 1311u-13 is calculated. For example, the CPU 21 has at least a portion of the unit mask pattern portion 1311u-14 adjacent to each outer edge of the -X side, +Y side, and -Y side of the unit mask pattern portion 1311u-14. Assuming that there is, the unit mask pattern portion 1311u-14 is calculated. For example, the CPU 21 assumes that at least a part of the unit mask pattern portion 1311u-15 is adjacent to each outer edge of the +X side, +Y side, and −Y side of the unit mask pattern portion 1311u-15. After making the assumption, the unit mask pattern portion 1311u-15 is calculated. For example, the CPU 21 assumes that at least a part of the unit mask pattern portion 1311u-16 is adjacent to each outer edge of the +X side and +Y side of the unit mask pattern portion 1311u-16, and then , calculates the unit mask pattern portion 1311u-16. For example, the CPU 21 assumes that at least a part of the unit mask pattern portion 1311u-17 is adjacent to each outer edge of the +X side and the −Y side of the unit mask pattern portion 1311u-17. Then, the unit mask pattern portion 1311u-17 is calculated. For example, the CPU 21 assumes that at least a part of the unit mask pattern portion 1311u-18 is adjacent to each outer edge of the -X side and the +Y side of the unit mask pattern portion 1311u-18. Then, the unit mask pattern portion 1311u-18 is calculated. For example, the CPU 21 assumes that at least a part of the unit mask pattern portion 1311u-19 is adjacent to each outer edge of the -X side and the -Y side of the unit mask pattern portion 1311u-19. Next, the unit mask pattern portion 1311u-19 is calculated.

After that, the CPU 21 calculates a mask pattern by arranging the calculated plural types of unit mask pattern portions 1311u and peripheral mask pattern portions 1311s.

According to this first modification, the CPU 21 can calculate the unit mask pattern portion 1311u by taking into account that the influence from the adjacent mask pattern portion 1311n is different for each unit mask pattern portion 1311u. there is. For this reason, the CPU 21 can relatively efficiently calculate a mask pattern that can form a desired device pattern with relatively high precision. In addition, the exposure apparatus 1 that exposes the substrate 151 using the mask 131 on which the mask pattern calculated by this first modification is formed is used to expose the substrate 151 to form a desired device pattern with relatively high precision. ) can be exposed.

Additionally, when calculating the unit mask pattern portion 1311u adjacent to the peripheral mask pattern portion 1311s, the CPU 21 determines at least a portion of the peripheral mask pattern portion 1311s as the adjacent mask pattern portion 1311n. The unit mask pattern portion 1311u may be calculated assuming that it is adjacent to the unit mask pattern portion 1311u. For example, in the example shown in FIG. 13, the CPU 21 assumes that at least a part of the peripheral mask pattern portion 1311s is adjacent to the outer edge of the unit mask pattern portion 1311u-15 on the -X side, and then In this way, the unit mask pattern portion 1311u-15 may be calculated. The same applies to the unit mask pattern portions 1311u-16 and 1311ud-17. In this case, the CPU 21 may calculate the peripheral mask pattern portion 1311s before calculating the unit mask pattern portion 1311u. As a result, the CPU 21 can calculate the unit mask pattern portion 1311u by taking into account the influence that the exposure light EL through the unit mask pattern portion 1311u receives from the peripheral mask pattern portion 1311s. there is. For this reason, the CPU 21 can relatively efficiently calculate a mask pattern that can form a desired device pattern with relatively high precision.

For the same reason, when calculating the peripheral mask pattern portion 1311s adjacent to the unit mask pattern portion 1311u, the CPU 21 determines that at least a portion of the unit mask pattern portion 1311u is adjacent to the mask pattern portion 1311n. ), the peripheral mask pattern portion 1311s may be calculated after assuming that it is adjacent to the peripheral mask pattern portion 1311s.

Alternatively, when calculating the unit mask pattern portion 1311u adjacent to the peripheral mask pattern portion 1311s, the CPU 21 calculates the unit mask pattern portion 1311u and the unit mask pattern, as shown in FIG. 14 . A composite mask pattern portion 1311c including at least a portion of the peripheral mask pattern portion 1311s adjacent to the portion 1311u may be calculated. Even in the case of calculating such a composite mask pattern portion 1311c, the unit mask pattern portion 1311u is calculated after assuming that at least a part of the peripheral mask pattern portion 1311s is adjacent to the unit mask pattern portion 1311u. As in the case, the CPU 21 can relatively efficiently calculate a mask pattern that can form a desired device pattern with relatively high precision.

(3-2) Second modification example

In the above description, the CPU 21 calculates the mask pattern group 1311g by arranging a plurality of mask patterns 1311d. Meanwhile, in the second modification, the CPU 21, after arranging the plurality of mask patterns 1311d, further arranges at least a portion of the plurality of mask patterns 1311d according to the arrangement pattern of the plurality of mask patterns 1311d. By correcting , the mask pattern group 1311g is calculated. Hereinafter, the mask pattern calculation operation in the second modification will be described with reference to FIG. 15. In addition, for processes that are the same as those performed in the above-described embodiment, the same step numbers are given and detailed description thereof is omitted.

As shown in Fig. 15, in the second modification example, processing from step S311 to step S316 is performed similarly to the above-described embodiment. In the second modification, after the plurality of mask patterns 1311d are arranged in step S316, the CPU 21 determines whether the plurality of mask patterns 1311d are included in the mask 131 (in short, the plurality of mask patterns (1311d) is arranged) to correct at least part of the plurality of mask patterns 1311d (step S321). In addition, correction of at least part of the plurality of mask patterns 1311d includes adjustment of the line width of at least part of the plurality of mask patterns 1311d, adjustment of the stretching direction of at least part of the plurality of mask patterns 1311d, and adjustment of the stretching direction of at least part of the plurality of mask patterns 1311d. It includes removing at least part of the pattern 1311d and adding a new mask pattern to at least part of the plurality of mask patterns 1311d.

Specifically, as described above, the pattern layout of the plurality of mask patterns 1311d included in the mask pattern group 1311g is the same. In that case, on the mask 131, a part of the mask pattern 1311d itself will be adjacent to the mask pattern 1311d. For this reason, the CPU 21 assumes that a part of the unit mask pattern portion 1311u is adjacent to the unit mask pattern portion 1311u and then calculates the unit mask pattern portion 1311u in the same manner as the operation. , assuming that a part of each mask pattern 1311d itself is adjacent to each mask pattern 1311d, at least a part of each mask pattern 1311d is corrected.

For example, as shown in FIG. 16, the CPU 21 creates a mask pattern that includes the outline on the -X side of the mask pattern 1311d-1 and the outline on the +X side of the mask pattern 1311d-1. At least a part of (1311d-1) is adjacent, and the mask pattern (1311d-1) includes the outer edge of the +Y side of the mask pattern (1311d-1) and the outer edge of the -Y side of the mask pattern (1311d-1). Assume that at least part of is adjacent. Moreover, the CPU 21 estimates the influence that the presence of mask patterns assumed to be adjacent has on the formation of the device pattern by the exposure light EL through each mask pattern 1311d-1, and determines the influence. At least a part of the mask pattern 1311d-1 is corrected to satisfy the above-described calculation conditions while offsetting.

In addition, although not shown in order to avoid complicating the drawing, the CPU 21 adds an outer edge of the +X side of the mask pattern 1311d-2 to the outer edge of the -X side of the mask pattern 1311d-2. A mask pattern ( Assuming that at least a portion of 1311d-2) is adjacent, the mask pattern 1311d-2 is corrected. The CPU 21 has at least a part of the mask pattern 1311d-3 adjacent to the outer edge of the +X side of the mask pattern 1311d-3, including the outer edge of the -X side of the mask pattern 1311d-3. , at least a part of the mask pattern 1311d-3 including the outer edge of the +X side of the mask pattern 1311d-3 is adjacent to the outer edge of the -X side, and the mask pattern 1311d Assuming that at least a part of the mask pattern 1311d-3 including the outer edge of the -Y side of the mask pattern 1311d-3 is adjacent to the outer edge of the +Y side of -3), the mask pattern 1311d- 3) Correct. About the mask pattern 1311d-5, it is the same as the mask pattern 1311d-3. For this reason, the CPU 21 just needs to correct the mask pattern 1311d-5 in the same correction mode as the mask pattern 1311d-3. The CPU 21 has at least a part of the mask pattern 1311d-4 adjacent to the outer edge of the +X side of the mask pattern 1311d-4, including the outer edge of the -X side of the mask pattern 1311d-4. , at least a part of the mask pattern 1311d-4 including the outer edge of the +X side of the mask pattern 1311d-4 is adjacent to the outer edge of the mask pattern 1311d-4, and the mask pattern 1311d Assuming that at least a part of the mask pattern 1311d-4 including the outer edge of the +Y side of the mask pattern 1311d-4 is adjacent to the outer edge of the -Y side of -4), the mask pattern 1311d- 4) Correct. About the mask pattern 1311d-6, it is the same as the mask pattern 1311d-4. For this reason, the CPU 21 just needs to correct the mask pattern 1311d-6 in the same correction mode as the mask pattern 1311d-4. The CPU 21 has at least a part of the mask pattern 1311d-7 adjacent to the outer edge of the +X side of the mask pattern 1311d-7, including the outer edge of the -X side of the mask pattern 1311d-7. After assuming that at least a part of the mask pattern 1311d-7 including the outer edge of the -Y side of the mask pattern 1311d-7 is adjacent to the outer edge of the +Y side of the mask pattern 1311d-7, Correct the mask pattern (1311d-7). The CPU 21 has at least a part of the mask pattern 1311d-8 adjacent to the outer edge of the +X side of the mask pattern 1311d-8, including the outer edge of the -X side of the mask pattern 1311d-8. After assuming that at least a part of the mask pattern 1311d-8 including the outer edge of the +Y side of the mask pattern 1311d-8 is adjacent to the outer edge of the -Y side of the mask pattern 1311d-8, Correct the mask pattern (1311d-8).

According to this second modification, the CPU 21 can correct the mask pattern 1311d by taking into account that the influence from other adjacent mask patterns is different for each mask pattern 1311d. For this reason, the CPU 21 can relatively efficiently calculate a mask pattern that can form a desired device pattern with relatively high precision. In addition, the exposure apparatus 1 that exposes the substrate 151 using the mask 131 on which the mask pattern calculated by this second modification is formed is capable of forming a desired device pattern on the substrate 151 with relatively high precision. ) can be exposed.

Additionally, the CPU 21 may arrange a plurality of mask patterns 1311d so that two adjacent mask patterns 1311d are adjacent to each other with a peripheral mask pattern portion 1311s interposed therebetween, as shown in FIG. 17 . In this case, the CPU 21 can recognize that the peripheral mask pattern portions 1311s are adjacent to each other before arranging the plurality of mask patterns 1311d. For this reason, in this case, the CPU 21 calculates the unit mask pattern portion 1311u after assuming that a part of the unit mask pattern portion 1311u is adjacent to the unit mask pattern portion 1311u. In the same manner as above, the peripheral mask pattern portion 1311s may be calculated assuming that a part of the peripheral mask pattern portion 1311s is adjacent to the peripheral mask pattern portion 1311s.

(3-3) Third modification example

In the third modification, after arranging the plurality of mask patterns 1311d, the CPU 21 arranges the above-described joint pattern area 131a and non-seamless pattern area 131b and the plurality of mask patterns 1311d. The mask pattern group 1311g is calculated by correcting at least part of the plurality of mask patterns 1311d based on the correspondence between them. The seamless pattern area 131a and the non-seamless pattern area 131b correspond to the seamless exposure area 151a and the non-seamless exposure area 151b on the substrate 151, respectively. For this reason, the CPU 21 creates at least a portion of the plurality of mask patterns 1311d based on the correspondence relationship between the joint exposure area 151a and the non-seamless exposure area 151b and the plurality of mask patterns 1311d. It can also be said to be corrected. Hereinafter, the mask pattern calculation operation in the third modification will be described with reference to FIG. 18. In addition, for processes that are the same as those performed in the above-described embodiment, the same step numbers are given and detailed description thereof is omitted.

As shown in FIG. 18, in the third modification, processing from step S311 to step S316 is performed similarly to the above-described embodiment. In the third modification, after the plurality of mask patterns 1311d are arranged in step S316, the CPU 21 exposes the joint exposure area 151a by exposure light EL through the joint pattern area 131a. Based on the exposure amount in and the exposure amount in the non-seamless exposure area 151b by the exposure light EL via the non-seam pattern area 131b, at least a portion of the plurality of mask patterns 1311d are corrected. (Step S331).

Specifically, as described above, the inclined portion of each projection area PR defining the joint exposure area 151a has the total width of the two inclined portions overlapping along the X-axis direction along the It is set to be equal to the width along the X-axis direction of the projection area PR (in other words, the width along the X-axis direction of the area portion other than the inclined portion). For this reason, theoretically, the exposure amount of the joint exposure area 151a that is doubly exposed becomes substantially the same as the exposure amount of the non-seamless exposure area 151b that is not doubly exposed. However, since there is a difference in that the joint exposure area 151a is double exposed while the non-joint exposure area 151b is not double exposed, the exposure amount of the joint exposure area 151a may be changed due to some factor to the non-joint exposure. There is a possibility that the exposure amount of area 151b may not be the same.

So, in the third modification, the CPU 21 determines the difference between the exposure amount of the seamless exposure area 151a and the exposure amount of the non-seamless exposure area 151b compared to before correcting at least a portion of the plurality of mask patterns 1311d. At least a portion of the plurality of mask patterns 1311d are corrected so that (in other words, the difference) becomes small or zero. For example, when the exposure amount of the seamless exposure area 151a is larger than the exposure amount of the non-seamless exposure area 151b, the CPU 21 reduces the exposure amount of the seamless exposure area 151a and/or performs the non-seamless exposure. At least part of the plurality of mask patterns 1311d may be corrected so that the exposure amount of the area 151b is increased. For example, when the exposure amount of the seamless exposure area 151a is smaller than the exposure amount of the non-seamless exposure area 151b, the CPU 21 increases the exposure amount of the seamless exposure area 151a and/or performs the non-seamless exposure. At least part of the plurality of mask patterns 1311d may be corrected so that the exposure amount of the area 151b is reduced.

The CPU 21 is configured to use a joint mask pattern portion 1311a formed in the joint pattern area 131a among the plurality of mask patterns 1311d (for example, a unit mask pattern portion 1311u included in the joint pattern area 131a). ) or at least part of the surrounding mask pattern portion 1311s) may be corrected. In short, the CPU 21 may correct at least a part of the joint mask pattern portion 1311a to which the exposure light EL for exposing the joint exposure area 151a among the plurality of mask patterns 1311d is irradiated. For example, the CPU 21 may select a non-seamless mask pattern portion 1311b included in the non-seam pattern area 131b among the plurality of mask patterns 1311d (e.g., included in the non-seam pattern area 131b). At least a portion of the unit mask pattern portion 1311u or the peripheral mask pattern portion 1311s may be corrected. In short, the CPU 21 may correct at least a part of the non-seamless mask pattern portion 1311b to which exposure light EL for exposing the non-seamless exposure area 151b is irradiated among the plurality of mask patterns 1311d. .

When the CPU 21 corrects both the seamless mask pattern portion 1311a and the non-seamless mask pattern portion 1311b, the correction content of the seamless mask pattern portion 1311a is that of the non-seamless mask pattern portion 1311b. It is different from the correction content. However, the correction content of the seamless mask pattern portion 1311a may be the same as the correction content of the non-seamless mask pattern portion 1311b.

Here, with reference to FIGS. 19(a) to 19(d), at least a portion of the plurality of mask patterns 1311d is formed so that the difference between the exposure amount of the joint exposure area 151a and the exposure amount of the non-seamless exposure area 151b is reduced. A specific example of processing for correcting will be described.

As shown in FIG. 19(a), the device pattern to be formed on the substrate 151 has a line width (more specifically, a standard line width) between the joint exposure area 151a and the non-seam exposure area 151b. ) will be explained using the example of a device pattern that becomes the same.

In this case, if the difference between the exposure amount in the joint exposure area 151a and the exposure amount in the non-seamless exposure area 151b is not taken into consideration, the CPU 21 creates a joint pattern as shown in FIG. 19(b). The mask pattern is calculated so that the line width of the seamless mask pattern portion 1311a included in the region 131a is the same as the line width of the non-seamless mask pattern portion 1311b included in the non-seamless pattern region 131b. In this case, under a situation where the line width of the seamless mask pattern portion 1311a and the line width of the non-seamless mask pattern portion 1311b become the same, the exposure amount of the seamless exposure area 151a and the exposure amount of the non-seamless exposure area 151b become the same. , the CPU 21 does not need to correct at least part of the plurality of mask patterns 1311d.

However, in some cases, under a situation where the line width of the seam mask pattern portion 1311a and the line width of the non-seam mask pattern portion 1311b are the same, the exposure amount of the seam exposure area 151a and the line width of the non-seam exposure area 151b are different. There is a possibility that the exposure amount may not be the same. In this case, the CPU 21 applies at least part of the plurality of mask patterns 1311d to reduce the difference between the exposure amount of the joint exposure area 151a and the exposure amount of the non-seamless exposure area 151b. Correct. Specifically, the CPU 21 may correct at least a portion of the plurality of mask patterns 1311d so as to adjust the line width of at least one of the seamless mask pattern portion 1311a and the non-seamless mask pattern portion 1311b. In short, the CPU 21 controls at least the seamless mask pattern portion 1311a and the non-seamless mask pattern portion 1311b so that the line width of the seamless mask pattern portion 1311a and the line width of the non-seamless mask pattern portion 1311b are different. You may correct some of it. More specifically, for example, when a negative resist is applied to the substrate 151, the CPU 21 forms a light transmission pattern 1311a-1 through which the exposure light EL passes in the joint mask pattern portion 1311a. ) and the line width of at least a portion of the light transmission pattern 1311b-1 through which the exposure light EL passes among the non-seamless mask pattern portion 1311b may be adjusted. For example, when a positive resist is applied to the substrate 151, the CPU 21 includes a light-shielding pattern 1311a-2 that blocks the exposure light EL among the seam mask pattern portions 1311a and a non-seam mask. The line width of at least a portion of the light-shielding pattern 1311b-2 that blocks the exposure light EL among the pattern portions 1311b may be adjusted. Below, for convenience of explanation, the explanation will be made using an example in which a negative resist is applied to the substrate 151. In short, the following description uses an example in which adjustment of at least part of the mask pattern 1311a and mask pattern 1311b corresponds to adjustment of the line width of at least part of the light transmission patterns 1311a-1 and 1311b-1. Proceed with explanation.

For example, the exposure amount of the joint exposure area 151a may be greater than the exposure amount of the non-seamless exposure area 151b. In this case, the device pattern formed in the joint exposure area 151a may be thicker than the device pattern formed in the non-seamless exposure area 151b. Therefore, the CPU 21, as described above, applies light transmission patterns 1311a-1 and 1311b- so that the exposure amount of the joint exposure area 151a becomes small and/or the exposure amount of the non-seamless exposure area 151b increases. 1) Adjust the line width of at least part of . Specifically, as shown in FIG. 19(c), the CPU 21 creates a light projection pattern ( Adjust the line width of at least part of 1311a-1 and 1311b-1).

Or, for example, under a situation where the line width of the seam mask pattern portion 1311a and the line width of the non-seam mask pattern portion 1311b are the same, the exposure amount of the seam exposure area 151a is the exposure amount of the non-seam exposure area 151b. There is a possibility that it will become smaller. In this case, the device pattern formed in the joint exposure area 151a may be thinner than the device pattern formed in the non-seamless exposure area 151b. Therefore, the CPU 21, as described above, applies light transmission patterns 1311a-1 and 1311b- so that the exposure amount of the joint exposure area 151a increases and/or the exposure amount of the non-seamless exposure area 151b decreases. 1) Adjust the line width of at least part of . Specifically, as shown in FIG. 19(d), the CPU 21 creates a light projection pattern ( Adjust the line width of at least part of 1311a-1 and 1311b-1).

As a result of adjusting the line width of at least part of the light transmission patterns 1311a-1 and 1311b-1, the difference between the exposure amount of the seamless exposure area 151a and the exposure amount of the non-seamless exposure area 151b becomes small or zero. . For this reason, the difference between the line width of the device pattern formed in the joint exposure area 151a and the line width of the device pattern formed in the non-seamless exposure area 151b also becomes small or becomes zero. In short, according to this third modification, the CPU 21 can relatively efficiently calculate a mask pattern that can form a desired device pattern with relatively high precision. In addition, the exposure apparatus 1 that exposes the substrate 151 using the mask 131 on which the mask pattern calculated by this third modification is formed is capable of forming a desired device pattern on the substrate 151 with relatively high precision. ) can be exposed.

Additionally, the difference between the exposure amount of the joint exposure area 151a and the exposure amount of the non-seamless exposure area 151b varies depending on the characteristics of the exposure apparatus 1, the characteristics of the resist applied to the substrate 151, etc. For this reason, the pattern calculation device 2 stores in the memory 22 the difference between the exposure amount of the joint exposure area 151a and the exposure amount of the non-seamless exposure area 151b, the characteristics of the exposure device 1, and the substrate 151 ) The first correlation information indicating the correlation between the characteristics of the resist applied to the resist may be stored in advance. Such first correlation information may be generated based on the measurement results of the substrate 151 actually exposed by the exposure apparatus 1, or may be generated based on the results of simulation of the operation of the exposure apparatus 1. When the first correlation information is stored in advance in the memory 22, the CPU 21 uses the mask 131 on which the mask pattern calculated by the pattern calculation device 2 is formed based on the first correlation information. The difference in exposure amount between the seamless exposure area 151a and the non-seamless exposure area 151b in the exposure apparatus 1 actually used may be specified. Thereafter, the CPU 21 may correct at least a portion of the plurality of mask patterns 1311d so that the specific difference becomes small or zero.

In addition, the correction amount for the difference in exposure amount between the continuous exposure area 151a and the non-seamless exposure area 151b is the correction content of at least a part of the plurality of mask patterns 1311d (for example, the adjustment amount of line width) depends on For this reason, the pattern calculation device 2 stores in the memory 22 a correction amount for the difference in exposure amount between the seamless exposure area 151a and the non-seamless exposure area 151b and the plurality of mask patterns 1311d. Second correlation information indicating the correlation between at least some of the correction contents may be stored in advance. Such second correlation information may be generated based on the measurement results of the substrate 151 actually exposed by the exposure apparatus 1, or may be generated based on the results of simulation of the operation of the exposure apparatus 1. When the second correlation information is stored in advance in the memory 22, the CPU 21 reduces the difference in exposure amount between the seamless exposure area 151a and the non-seamless exposure area 151b or sets it to zero. In addition to specifying the correction amount necessary for this, based on the second correlation information, the correction contents of at least a portion of the plurality of mask patterns 1311d required to correct the difference in exposure amount by a specific correction amount may be specified.

Additionally, the CPU 21 determines an arbitrary exposure characteristic and ratio in the continuous exposure area 151a in addition to or instead of being based on the exposure amount of the continuous exposure area 151a and the exposure amount of the non-seamless exposure area 151b. Based on arbitrary exposure characteristics in the subsequent exposure area 151b, at least a portion of the plurality of mask patterns 1311d may be corrected. For example, the CPU 21 determines whether the difference (in other words, difference) between any exposure characteristic in the seamless exposure area 151a and any exposure characteristic in the non-seamless exposure area 151b becomes small or zero. At least part of the plurality of mask patterns 1311d may be corrected so that .

In addition, in the above description, the joint exposure area 151a is defined by a plurality of projection areas PR each set by the plurality of projection optical systems 14. However, even in the case where the exposure apparatus 1 is provided with a single projection optical system 14 (in other words, a single projection area PR is set), the continuous exposure area 151a is defined on the substrate 151. possible. For example, N1 (where N1 is an integer of 1 or more) for forming at least a part of a certain device pattern and at least a part of the area where the exposure light EL is projected by the scanning exposure operation is the same as that of the same device pattern. N2 to form at least a portion (where N2 is an integer of 1 or more different from N1). When at least a portion of the area on which the exposure light EL is projected by the second scanning exposure operation overlaps, the substrate 151 In the image, there is a region that is exposed to the exposure light EL twice or more to form the same device pattern (for example, a device pattern of the same layer). The area exposed to this exposure light EL twice or more corresponds to the above-described continuous exposure area 151a. On the other hand, for example, at least a part of the area on which the exposure light EL is projected by the N1-th scanning exposure operation is divided by the N2-th scanning exposure operation (where N2 is an integer of 1 or more, which is different from N1). When the exposure light EL does not overlap with the projected area, there is a region on the substrate 151 that is exposed to the exposure light EL only once in order to form the same device pattern. The area exposed to this exposure light EL only once corresponds to the non-seamless exposure area 151b described above. Accordingly, the pattern calculation device 2 uses the calculation method of the third modification, and is an exposure device 1 provided with a single projection optical system 14 (in other words, a single projection area PR is set). The mask pattern of the mask 131 used can also be calculated.

In addition, in the third modification, the CPU 21 does not need to calculate the mask pattern by calculating the unit mask pattern portion 1311u and then arranging a plurality of the calculated unit mask pattern portions 1311u. In this case, the CPU 21 calculates a mask pattern corresponding to the device pattern by an arbitrary method, and then divides the calculated mask pattern into the joint pattern area 131a and the non-seam pattern area 131b. Correction may be made according to the correspondence between the mask patterns 1311d. Even in this case, there is no change in the CPU 21 being able to calculate a mask pattern capable of forming a desired device pattern with relatively high precision.

(3-4) Fourth modification

In the third modification described above, the CPU 21 applies a plurality of masks so that the difference between the exposure amount in the seamless exposure area 151a and the exposure amount in the non-seamless exposure area 151b becomes small or zero. By correcting at least part of the pattern 1311d, the mask pattern group 1311g is calculated. Meanwhile, in the fourth modification, the CPU 21, after arranging the plurality of mask patterns 1311d, arranges the plurality of mask patterns so that the variation in exposure amount in the subsequent exposure area 151a becomes small or zero. By correcting at least part of 1311d, the mask pattern group 1311g is calculated. Hereinafter, the mask pattern calculation operation in the fourth modification will be described with reference to FIG. 20. In addition, for processes that are the same as those performed in the above-described embodiment, the same step numbers are given and detailed description thereof is omitted. In addition, the processing content not specifically explained in the following description may be the same as the processing content in the third modification example.

As shown in FIG. 20, in the fourth modification, processing from step S311 to step S316 is performed similarly to the above-described embodiment. In the fourth modification, after the plurality of mask patterns 1311d are arranged in step S316, the CPU 21 exposes the joint exposure area 151a by exposure light EL through the joint pattern area 131a. Based on the exposure amount in , at least part of the plurality of mask patterns 1311d is corrected (step S341).

Specifically, as described above, the total sum of the widths along the X-axis direction of the inclined portions of the two projection areas PR that overlap along the is set to be the width along the X-axis direction of the area portion other than the inclined portion. For this reason, theoretically, there is no case in which a deviation occurs in the exposure amount within the joint exposure area 151a that is double exposed by the two projection areas PR. However, within a certain joint exposure area 151a, the ratio R of the exposure amount by one of the two projection areas PR and the exposure amount by the other of the two projection areas PR may change. Specifically, as shown in FIG. 21, in the area 151ar-1 extending along the X-axis direction past the center of the joint exposure area 151a along the Y-axis direction, one projection area PR (FIG. In the example shown in Fig. 21, the ratio R of the exposure amount by the projection area PRa) and the exposure amount by the other projection area PR (in the example shown in Fig. 21, the projection area PRb) is approximately 50: It becomes 50. On the other hand, in the area 151ar-2 extending along the The ratio (R) of the exposure amount by the exposure amount and the exposure amount by the other projection area (PRb) is generally R1 (where R1 > 50): R2 (where R2 < 50). In the area 151ar-3 extending along the The ratio R of the exposure amount by the other projection area PRb is generally R3 (where R3 < 50): R4 (where R4 > 50). Due to this variation in the ratio R within the continuous exposure area 151a, there is a possibility that a deviation occurs in the exposure amount within the continuous exposure area 151a.

Therefore, in the fourth modification, the CPU 21 applies a plurality of mask patterns 1311d so that the deviation of the exposure amount in the continuous exposure area 151a becomes smaller compared to before correcting at least a part of the plurality of mask patterns 1311d. ) (for example, the joint mask pattern portion 1311a, the light transmitting pattern 1311a-1, or the light blocking pattern 1311a-2) is corrected. Alternatively, the CPU 21 may set the plurality of mask patterns 1311d so that the deviation of the exposure amount in the joint exposure area 151a becomes zero (in other words, the exposure amount becomes uniform) compared to before correcting at least a portion of the plurality of mask patterns 1311d. At least part of the mask pattern 1311d is corrected. For example, when the exposure amount of the first area in the continuous exposure area 151a is greater than the exposure amount of the second area in the continuous exposure area 151a, the CPU 21 reduces the exposure amount of the first area and/ Alternatively, at least a portion of the plurality of mask patterns 1311d may be corrected so that the exposure amount of the second area is increased. For example, when the exposure amount of the first area in the continuous exposure area 151a is smaller than the exposure amount of the second area in the continuous exposure area 151a, the CPU 21 increases the exposure amount of the first area and/ Alternatively, at least part of the plurality of mask patterns 1311d may be corrected so that the exposure amount of the second area is small.

As an example, as the ratio R in a certain area within the joint exposure area 151a approaches 50:50 (=1), the exposure amount in that certain area is likely to increase. More specifically, in the example shown in FIG. 21, as shown in the graph on the right side of FIG. 21, within the joint exposure area 151a, the exposure amount in the area 151ar-1 is maximized, and the exposure amount in the Y-axis direction is maximum. There is a possibility that the exposure amount becomes smaller in areas further away from the exposure area 151ar-1. In short, within the joint exposure area 151a, the exposure amount in the center of the joint exposure area 151a along the Y-axis direction is maximum, and the exposure amount is smaller in areas further away from the center along the Y-axis direction. There is a possibility of losing. In this case, the CPU 21 adjusts the exposure amount by correcting at least a portion of the plurality of mask patterns 1311d as the area is further away along the Y-axis direction from the center of the joint exposure area 151a along the Y-axis direction. To increase it further than this, at least part of the plurality of mask patterns 1311d may be corrected. Alternatively, the CPU 21 may adjust the exposure amount by correcting at least a portion of the plurality of mask patterns 1311d as the area is further away along the Y-axis direction from the center of the joint exposure area 151a along the Y-axis direction. At least part of the plurality of mask patterns 1311d may be corrected so as not to decrease. More specifically, for example, as shown in FIG. 22, the CPU 21 operates along the Y-axis direction from the center of the joint exposure area 151a along the Y-axis direction within the joint pattern area 131a. At least a part of the joint mask pattern portion 1311a may be adjusted so that the line width of the joint mask pattern portion 1311a becomes thicker as the area is further apart. In addition, the mask pattern shown in FIG. 22 is used to form a device pattern (in short, the device pattern shown in FIG. 19(a)) whose line width is the same between the joint exposure area 151a and the non-seamless exposure area 151b. It is a mask pattern.

As a result of correction of at least part of the plurality of mask patterns 1311d, the variation in exposure amount in the continuous exposure area 151a becomes small or zero. For this reason, the variation in the line width of the device pattern formed in the joint exposure area 151a also decreases or becomes zero. In short, according to this fourth modification, the CPU 21 can relatively efficiently calculate a mask pattern that can form a desired device pattern with relatively high precision. In addition, the exposure apparatus 1 that exposes the substrate 151 using the mask 131 on which the mask pattern calculated by this fourth modification is formed is used to expose the substrate 151 to form a desired device pattern with relatively high precision. ) can be exposed.

Additionally, the variation in exposure amount in the joint exposure area 151a varies depending on the characteristics of the exposure apparatus 1, the characteristics of the resist applied to the substrate 151, etc. For this reason, the pattern calculation device 2 stores, in the memory 22, the deviation of the exposure amount in the joint exposure area 151a, the characteristics of the exposure device 1, the characteristics of the resist applied to the substrate 151, etc. Third correlation information indicating the correlation between may be stored in advance. Such third correlation information may be generated based on the measurement results of the substrate 151 actually exposed by the exposure apparatus 1, or may be generated based on the results of simulation of the operation of the exposure apparatus 1. When the third correlation information is stored in advance in the memory 22, the CPU 21 uses the mask 131 on which the mask pattern calculated by the pattern calculation device 2 is formed based on the third correlation information. The deviation of the exposure amount in the subsequent exposure area 151a in the exposure apparatus 1 actually used may be specified. Thereafter, the CPU 21 may correct at least a portion of the plurality of mask patterns 1311d so that the specific deviation becomes small or zero.

In addition, the correction amount for the deviation of the exposure amount in the joint exposure area 151a depends on the correction content (for example, the adjustment amount of the line width) of at least a part of the plurality of mask patterns 1311d. For this reason, the pattern calculation device 2 stores, in the memory 22, a correlation between the correction amount for the deviation of the exposure amount in the continuous exposure area 151a and the correction contents of at least some of the plurality of mask patterns 1311d. Fourth correlation information indicating the relationship may be stored in advance. Such fourth correlation information may be generated based on the measurement results of the substrate 151 actually exposed by the exposure apparatus 1, or may be generated based on the results of simulation of the operation of the exposure apparatus 1. When the fourth correlation information is stored in advance in the memory 22, the CPU 21 specifies the correction amount necessary to reduce or zero the deviation of the exposure amount in the subsequent exposure area 151a. , based on the fourth correlation information, the correction contents of at least a portion of the plurality of mask patterns 1311d required to correct the deviation of the exposure amount by a specific correction amount may be specified.

Additionally, the CPU 21 may, in addition to or instead of based on the variation in the exposure amount in the subsequent exposure area 151a, based on the variation in any exposure characteristic in the subsequent exposure area 151a, provide a plurality of At least part of the mask pattern 1311d may be corrected. For example, the CPU 21 may correct at least a portion of the plurality of mask patterns 1311d so that the deviation of any exposure characteristics in the joint exposure area 151a becomes small or zero.

In addition, in the fourth modification, the CPU 21 does not need to calculate the mask pattern by calculating the unit mask pattern portion 1311u and then arranging a plurality of the calculated unit mask pattern portions 1311u. In this case, the CPU 21 calculates a mask pattern corresponding to the device pattern by an arbitrary method, and then applies the calculated mask pattern to the next exposure area 151a when the variation in exposure amount is reduced or You can correct it to be zero. Even in this case, there is no change in the CPU 21 being able to calculate a mask pattern capable of forming a desired device pattern with relatively high precision.

(3-5) Fifth modification example

In the fifth modification, after arranging the plurality of mask patterns 1311d, the CPU 21 creates the plurality of mask patterns according to the correspondence relationship between the plurality of projection optical systems 14 and the plurality of mask patterns 1311d. By correcting at least part of 1311d, the mask pattern group 1311g is calculated. The plurality of projection optical systems 14 each correspond to a plurality of illumination areas (IR) (or a plurality of projection areas (PR)). Accordingly, the CPU 21 operates at least one of the plurality of mask patterns 1311d according to the correspondence relationship between the plurality of illumination regions (IR) (or the plurality of projection regions (PR)) and the plurality of mask patterns 1311d. It can also be said that some parts are corrected. Hereinafter, the mask pattern calculation operation in the fifth modification will be described with reference to FIG. 23. In addition, for processes that are the same as those performed in the above-described embodiment, the same step numbers are given and detailed description thereof is omitted.

As shown in Fig. 23, in the fifth modification, processing from step S311 to step S316 is performed similarly to the above-described embodiment. In the fifth modification, after the plurality of mask patterns 1311d are arranged in step S316, the CPU 21 determines the exposure amount by the plurality of exposure lights EL respectively projected from the plurality of projection optical systems 14. Based on the deviation, at least part of the plurality of mask patterns 1311d are corrected (step S351).

Specifically, the plurality of projection optical systems 14 are manufactured so that optical characteristics (eg, aberration, etc.) are the same among the plurality of projection optical systems 14. In this case, the exposure amount by the plurality of exposure lights EL from the plurality of projection optical systems 14 will all be the same. However, in reality, there is a possibility that variations in optical characteristics may occur among the plurality of projection optical systems 14 due to manufacturing errors or the like. For example, there is a possibility that the optical properties of one projection optical system 14 may not be the same as those of the other projection optical systems 14 . In this case, the exposure amount by one exposure light EL projected from one projection optical system 14 may not be the same as the exposure amount by another exposure light EL projected from another projection optical system 14. . As a result, on the substrate 151, the exposure amount in one exposure area exposed by one exposure light EL projected from one projection optical system 14 is the amount projected from the other projection optical system 14. There is a possibility that the exposure amount may not be the same as that in other exposure areas exposed by different exposure light EL. More specifically, the exposure amount in one exposure area on the substrate 151 in which one projection area PR corresponding to one projection optical system 14 is set is determined by the exposure amount in one exposure area corresponding to another projection optical system 14. There is a possibility that the exposure amount in other exposure areas on the substrate 151 where the projection area PR is set may not be the same.

So, in the fifth modification, the CPU 21 compares the image before correcting at least a part of the plurality of mask patterns 1311d by the plurality of exposure lights EL respectively projected from the plurality of projection optical systems 14. At least part of the plurality of mask patterns 1311d are corrected so that the variation in exposure amount is reduced. Alternatively, the CPU 21 may cause the deviation of the exposure amount by the plurality of exposure lights EL from the plurality of projection optical systems 14 to be zero compared to before correcting at least a part of the plurality of mask patterns 1311d ( In short, at least a part of the plurality of mask patterns 1311d is corrected (so that the exposure amount by the plurality of exposure lights EL is all the same). In other words, the CPU 21 compares the substrates each exposed by a plurality of exposure lights EL projected from the plurality of projection optical systems 14 compared with before correcting at least a part of the plurality of mask patterns 1311d ( 151) At least a part of the plurality of mask patterns 1311d is corrected so that the deviation of the exposure amount in the plurality of exposure areas on the image becomes small or zero. For example, the exposure amount of one exposure area exposed by one exposure light EL projected from one projection optical system 14 is exposed by another exposure light EL projected from another projection optical system 14. If the exposure amount is greater than that of other exposure areas, the CPU 21 corrects at least a portion of the plurality of mask patterns 1311d so that the exposure amount of one exposure area becomes smaller and/or the exposure amount of the other exposure area becomes larger. You can do it. For example, the exposure amount of one exposure area exposed by one exposure light EL projected from one projection optical system 14 is exposed by another exposure light EL projected from another projection optical system 14. If the exposure amount is smaller than that of other exposure areas, the CPU 21 corrects at least a portion of the plurality of mask patterns 1311d so that the exposure amount of one exposure area becomes larger and/or the exposure amount of the other exposure area becomes smaller. You can do it.

One exposure area on the substrate 151 exposed by one exposure light EL projected from one projection optical system 14 is a projection corresponding to one projection optical system 14 on the substrate 151. This is an area where the area PR is set (more specifically, an area through which the projection area PR passes as the substrate 151 moves). The exposure light EL that exposes the area on the substrate 151 where a certain projection area PR is set is an area on the mask 131 where the illumination area IR corresponding to the certain projection area PR is set ( More specifically, it is the exposure light EL projected onto the substrate 151 through the area through which the illumination area IR passes as the mask 131 moves. For this reason, the CPU 21 controls the projection optical system 14 to adjust the exposure amount of one exposure area exposed by the exposure light EL projected from the one projection optical system 14. A mask pattern included in the area on the mask 131 through which the corresponding illumination region IR (in other words, the illumination region IR into which the exposure light EL projected by one projection optical system 14 is irradiated) passes. You can correct it. For example, the CPU 21 controls the area on the mask 131 where the illumination area IRa is set in order to adjust the exposure amount of the exposure area exposed by the exposure light EL projected from the projection optical system 14a. The mask pattern included in (e.g., the unit mask pattern portion 1311u, the peripheral mask pattern portion 1311s, etc. included in the area where the illumination region IRa is set) may be corrected. For example, the CPU 21 controls the area on the mask 131 where the illumination area IRb is set in order to adjust the exposure amount of the exposure area exposed by the exposure light EL projected from the projection optical system 14b. The mask pattern included in (e.g., the unit mask pattern portion 1311u, the peripheral mask pattern portion 1311s, etc. included in the area where the illumination region IRb is set) may be corrected. The same applies to the projection optical systems 14c to 14g (illumination areas (IRa to IRg)).

The CPU 21 calculates the correction contents of one mask pattern included in the area on the mask 131 in which one illumination area (IR) is set, and the area on the mask 131 in which the other illumination area (IR) is set. At least part of the plurality of mask patterns 1311d are corrected so that the correction contents of the different mask patterns included are different. This is because one of the causes of exposure dose deviation is the deviation of optical characteristics among the plurality of projection optical systems 14, so if the correction content of one mask pattern and the correction content of another mask pattern are different, the plurality of projection optical systems 14 ) This is because the deviation in optical characteristics between can be corrected by the mask pattern (as a result, irregularities in the exposure amount can also be corrected). However, the CPU 21 corrects the correction contents of the mask pattern included in the area on the mask 131 where one illumination region (IR) is set and the area on the mask 131 where another illumination region (IR) is set. At least part of the plurality of mask patterns 1311d may be corrected so that the correction contents of the included mask patterns are the same.

Subsequently, referring to FIGS. 24(a) to 24(c) and FIGS. 25(a) to 25(b), the exposure light EL projected from the plurality of projection optical systems 14, respectively, A specific example of processing for correcting at least a portion of the plurality of mask patterns 1311d so that the variation in exposure amount is reduced will be described.

As described above, one of the causes of variation in exposure amount due to the plurality of exposure lights EL projected from the plurality of projection optical systems 14, respectively, is the optical characteristics among the plurality of projection optical systems 14. is the deviation of An example of such an optical characteristic is aberration (particularly, distortion aberration). Distortion aberration is a phenomenon in which the image formed by the projection optical system 14 on the image plane is deformed.

For example, Fig. 24(a) shows the image plane 141 of the projection optical system 14 in which no distortion aberration occurs and the projection area PR set within the image plane 141. Additionally, the dotted lines within the image plane 141 are auxiliary lines for expressing distortion of the image plane 141. 24(a) shows the exposure amount at a certain position on the substrate 151 scanned and exposed with the exposure light EL projected onto the projection area PR of the projection optical system 14 in which no distortion aberration occurs. It represents. In particular, Figure 24(a) shows the exposure amount at three positions A, B, and C arranged along the Y-axis direction on the substrate 151. Position A is a portion of the exposure light EL projected onto the area (a) extending along the For convenience, sequential scanning exposure is performed by “exposure light ((ELa(1)), exposure light (ELa(2)), …, exposure light ((ELa(n))”). Position B is projection. A portion of the exposure light EL projected onto the area b extending along the 1)), exposure light ((ELb(2)), …, exposure light ((ELb(n))”) sequentially scans and exposes. Position C is in the Y-axis direction of the projection area (PR). A part of the exposure light EL projected onto the area c extending along the (ELc(2)), ..., sequential scanning exposure is performed by exposure light (denoted as (ELc(n))), when no distortion aberration occurs. As a result, the exposure amount (in particular, its distribution pattern) at positions A to C becomes the same, when the exposure light EL is projected to positions A to C through a mask pattern of the same line width. A device pattern of the same line width is formed.

On the other hand, Figure 24(b) shows the image plane 141 of the projection optical system 14 in which distortion aberration (in particular, a cylindrical distortion aberration in which deformation occurs that bulges outward from the center of the image plane) occurs. It indicates a projection area (PR) set within the image plane 141. Additionally, Fig. 24(b) shows a position on the substrate 151 scanned and exposed with the exposure light EL projected onto the projection area PR of the projection optical system 14 where cylindrical distortion aberration occurs. The exposure amount is also shown. Figure 24(c) shows the image plane 141 of the projection optical system 14 in which distortion aberration (in particular, a spool-type distortion aberration in which a hollow deformation occurs from the outside of the image plane toward the center) occurs. It represents a projection area (PR) set within the image plane 141. In addition, Fig. 24(c) shows a position on the substrate 151 scanned and exposed with the exposure light EL projected onto the projection area PR of the projection optical system 14 where failure-type distortion aberration occurs. The exposure amount is also shown. As can be seen from FIGS. 24(b) to 24(c), when distortion aberration occurs, the exposure light ((ELa(1)) is caused by deformation of the image plane 141 due to the distortion aberration. , exposure light (ELa(2)),..., area (a) where exposure light ((ELa(n)) is projected, and exposure light (ELc(1)), exposure light ((ELc(2)),..., The area (c) on which the exposure light ((ELc(n)) is projected also curves. For this reason, the exposure amount (in particular, its distribution pattern) at positions A and C is the exposure amount at position B (in particular, Specifically, the peak value of the exposure amount at positions A and C becomes smaller than the peak value of the exposure amount at position B, and the exposure amount at positions A and C decreases. As a result, the gradient becomes smaller than the reduction gradient of the exposure amount at position B, even if the exposure light EL is projected at positions A to C through a mask pattern of the same line width, device patterns are formed at positions A and C. The line width of may be thicker than the line width of the device pattern formed at position B.

Although the possibility that distortion aberration does not occur in all of the plurality of projection optical systems 14 or that the same distortion aberration occurs is not zero, in reality, different distortion aberrations occur in each of the plurality of projection optical systems 14 or multiple There is a high possibility that distortion aberration occurs only in a portion of the projection optical system 14. For this reason, it is not easy to eliminate such distortion aberration by adjusting the plurality of projection optical systems 14. Therefore, unless the distortion aberration is easily eliminated, deviation in the exposure amount due to the plurality of exposure lights EL respectively projected from the plurality of projection optical systems 14 occurs due to the distortion aberration. For example, in Figure 25(a), a barrel-type distortion aberration occurs in the projection optical system 14a, a spool-type distortion aberration occurs in the projection optical system 14b, and a distortion aberration occurs in the projection optical system 14c. Indicates the projection areas (PRa to PRc) set on the substrate 151 when not doing so. As shown in FIG. 25(a), the projection area PRa is set over the non-seamless exposure area 151b-a and the seamless exposure area 151a-ab. The projection area PRc is set over the continuous exposure area 151a-ab, the non-seamless exposure area 151b-b, and the continuous exposure area 151a-bc. The projection area PRc is set in the seamless exposure areas 151a-bc and the non-seamless exposure areas 151b-c. For this reason, as shown on the right side of FIG. 25(a), a deviation occurs in the exposure amount between the seamless exposure areas 151a-ab to 151a-bc and the non-seamless exposure areas 151b-a to 151b-c. do. As a result, variation also occurs in the line width of the formed device pattern between the seam exposure areas 151a-ab to 151a-bc and the non-season exposure areas 151b-a to 151b-c. Furthermore, variations in exposure amount occur also within each of the joint exposure areas 151a-ab to 151a-bc and the non-seamless exposure areas 151b-a to 151b-b. As a result, deviation occurs in the line width of the device pattern formed even inside the joint exposure areas (151a-ab to 151a-bc) and the non-seamless exposure areas (151b-a to 151b-b).

Therefore, as shown in FIG. 25(b), the CPU 21 controls the joint exposure areas 151a-ab to reduce the variation in the exposure amount (in particular, to reduce the variation in the line width of the formed device pattern). A seam pattern area (131a-ab) corresponding to the seam pattern area (131a-bc), a seam pattern area (131a-bc) corresponding to the seam exposure area (151a-bc), and a non-seam pattern area (131b) corresponding to the non-seam exposure area (151b-a). -a), among the non-seamless pattern areas 131b-b corresponding to the non-seamless exposure areas 151b-b, and the non-seamless pattern areas 131b-c corresponding to the non-seamless exposure areas 151b-c. At least a portion of the mask pattern included in at least one is corrected. For example, the CPU 21 may correct the mask pattern so as to adjust the line width of at least part of the mask pattern similarly to the third to fourth modification examples. Additionally, the CPU 21 may correct the mask pattern so that the correction content (for example, the adjustment amount of the line width) of the mask pattern is an amount corresponding to the exposure amount before correcting the mask pattern. As a result, as shown on the right side of FIG. 25(b), according to the corrected mask pattern, between the seamless exposure areas 151a-ab to 151a-bc and the non-seamless exposure areas 151b-a to 151b-c. The deviation of the exposure amount decreases (in the example shown in Fig. 25(b), it becomes zero). For this reason, the variation in the line width of the device pattern formed between the joint exposure areas 151a-ab to 151a-bc and the non-seam exposure areas 151b-a to 151b-c becomes small (FIG. 25(b) In the example shown in , it is zero). Furthermore, in the example shown in FIG. 25(b), the exposure amount variation within each of the seamless exposure areas 151a-ab to 151a-bc and the non-seamless exposure areas 151b-a to 151b-b is also shown. It also gets smaller. As a result, the variation in the line width of the formed device pattern becomes small even inside the joint exposure areas (151a-ab to 151a-bc) and the non-seamless exposure areas (151b-a to 151b-b).

Also, while referring to FIGS. 26(a) to 26(b) and FIGS. 27(a) to 27(b), the exposure amounts by the plurality of exposure lights EL respectively projected from the plurality of projection optical systems 14 Another specific example of processing for correcting at least a portion of the plurality of mask patterns 1311d so that the deviation becomes small will be described.

As described above, one of the causes of variation in the exposure amount due to the plurality of exposure lights EL is the variation in optical characteristics among the plurality of projection optical systems 14. An example of such an optical characteristic is aberration (particularly, image plane curvature). Image plane curvature is a phenomenon in which the image plane 141 of the projection optical system 14 is curved to become a concave or convex surface with respect to the projection optical system 14. Since the image plane 141 is curved, on the substrate 151, the exposure light EL projected from the projection optical system 14 in which the image plane is curved is substantially in a defocused state.

For example, Fig. 26(a) shows the image plane 141 of the projection optical system 14 in which no image plane curvature has occurred and the projection area PR set within the image plane 141. In addition, Fig. 26(a) shows a position on the substrate 151 scanned and exposed with the exposure light EL projected onto the projection area PR of the projection optical system 14 where no image plane curvature occurs (described above). The exposure amount at one position A to position C) is shown. As shown in Fig. 24(a), when image plane curvature does not occur, the exposure amount (particularly, the distribution pattern) at positions A to C is the same. As a result, when the exposure light EL is projected to positions A to C through the mask pattern of the same line width, device patterns of the same line width are formed at positions A to C.

On the other hand, Fig. 26(b) shows the image plane 141 of the projection optical system 14 in which image plane curvature occurs and the projection area PR set within the image plane 141. Additionally, Fig. 26(b) shows any position on the substrate 151 (position A to The exposure amount at position C) is shown. In the example shown in FIG. 26(b), at position B, the image plane 141 is assumed to coincide with the surface of the substrate 151 (in other words, it is in focus). In this case, although the exposure light EL is appropriately condensed at position B, the exposure light EL is in a defocused state at positions A and C. For this reason, the exposure amount (particularly, the distribution pattern) at positions A and C is different from the exposure amount (particularly, the distribution pattern) at position B. Specifically, the peak value of the exposure amount at positions A and C becomes smaller than the peak value of the exposure amount at position B, and the decreasing gradient of the exposure amount at positions A and C is less than that of the exposure amount at position B. becomes smaller than the decreasing gradient. As a result, even if the exposure light EL is projected to positions A to C through a mask pattern of the same line width, the line width of the device pattern formed at positions A and C is thicker than the line width of the device pattern formed at position B. There is a possibility of losing.

Although there is a non-zero possibility that image plane curvature does not occur in all of the plurality of projection optical systems 14 or that the same image plane curvature occurs, in reality, different image plane curvatures occur in each of the plurality of projection optical systems 14. Alternatively, there is a high possibility that image plane curvature occurs only in a portion of the plurality of projection optical systems 14. For this reason, it is not easy to eliminate such image plane curvature by adjusting the plurality of projection optical systems 14. Therefore, unless the image plane curvature is easily resolved, deviation in the exposure amount due to the plurality of exposure lights EL projected from the plurality of projection optical systems 14 occurs due to such image plane curvature. For example, in Figure 27(a), image plane curvature occurs in the projection optical system 14a so that the image plane 141 becomes a concave surface, and in the projection optical system 14b, the image plane 141 becomes a convex surface. The projection areas PRa to PRc set on the substrate 151 when the image plane is curved so as to occur and the image plane is not curved in the projection optical system 14c are shown. As shown in FIG. 26(a), a deviation occurs in the exposure amount between the seamless exposure areas 151a-ab to 151a-bc and the non-seamless exposure areas 151b-a to 151b-c. As a result, variation also occurs in the line width of the formed device pattern between the seam exposure areas 151a-ab to 151a-bc and the non-season exposure areas 151b-a to 151b-c. Furthermore, variations in exposure amount occur also within each of the joint exposure areas 151a-ab to 151a-bc and the non-seamless exposure areas 151b-a to 151b-b. As a result, variation occurs in the line width of the device pattern formed even inside the joint exposure areas (151a-ab to 151a-bc) and the non-seamless exposure areas (151b-a to 151b-b).

Therefore, as shown in FIG. 27(b), the CPU 21 controls the joint pattern area 131a-ab to reduce the variation in the exposure amount (in particular, to reduce the variation in the line width of the device pattern to be formed). , of the mask pattern included in at least one of the seam pattern area (131a-bc), the non-seam pattern area (131b-a), the non-seam pattern area (131b-b), and the non-seam pattern area (131b-c). Correct at least some of it. As a result, as shown on the right side of FIG. 27(b), according to the corrected mask pattern, between the seamless exposure areas 151a-ab to 151a-bc and the non-seamless exposure areas 151b-a to 151b-c. The deviation of the exposure amount decreases (in the example shown in Fig. 27(b), it becomes zero). For this reason, the variation in the line width of the device pattern formed between the joint exposure areas 151a-ab to 151a-bc and the non-seam exposure areas 151b-a to 151b-c becomes small (FIG. 27(b) In the example shown in , it is zero). Furthermore, in the example shown in FIG. 27(b), the exposure amount variation within each of the seamless exposure areas 151a-ab to 151a-bc and the non-seamless exposure areas 151b-a to 151b-b is also shown. It also gets smaller. As a result, the variation in the line width of the formed device pattern becomes small even inside the joint exposure areas (151a-ab to 151a-bc) and the non-seamless exposure areas (151b-a to 151b-b).

In this way, according to the fifth modification, the variation in the exposure amount due to the plurality of exposure lights EL respectively projected from the plurality of projection optical systems 14 is reduced or becomes zero. For this reason, the variation in the line width of the device patterns formed in different areas on the substrate 151 on which the different exposure lights EL projected from the different projection optical systems 14 are respectively projected also becomes small or becomes zero. In short, according to this fifth modification, the CPU 21 can relatively efficiently calculate a mask pattern that can form a desired device pattern with relatively high precision. In addition, the exposure apparatus 1 that exposes the substrate 151 using the mask 131 on which the mask pattern calculated by this fifth modification is formed is capable of forming a desired device pattern on the substrate 151 with relatively high precision. ) can be exposed.

In addition, the deviation of the exposure amount due to the plurality of exposure lights EL projected from the plurality of projection optical systems 14 respectively varies depending on the characteristics of the exposure apparatus 1, the characteristics of the resist applied to the substrate 151, etc. do. For this reason, the pattern calculation device 2 stores, in the memory 22, the deviation of the exposure amount due to the plurality of exposure lights EL respectively projected from the plurality of projection optical systems 14, the characteristics of the exposure device 1, and Fifth correlation information indicating the correlation between the characteristics of the resist applied to the substrate 151, etc. may be stored in advance. Such fifth correlation information may be generated based on the measurement results of the substrate 151 actually exposed by the exposure apparatus 1, or may be generated based on the results of simulation of the operation of the exposure apparatus 1. When the fifth correlation information is stored in advance in the memory 22, the CPU 21 uses the mask 131 on which the mask pattern calculated by the pattern calculation device 2 is formed based on the fifth correlation information. The variation in exposure amount due to a plurality of exposure lights EL in the exposure apparatus 1 actually used may be specified. Thereafter, the CPU 21 may correct at least a portion of the plurality of mask patterns 1311d so that the specific deviation becomes small or zero.

In addition, the correction amount of the deviation of the exposure amount by the plurality of exposure lights EL depends on the correction content (for example, the adjustment amount of the line width) of at least a part of the plurality of mask patterns 1311d. For this reason, the pattern calculation device 2 stores, in the memory 22, a correlation between the correction amount of the deviation of the exposure amount due to the plurality of exposure lights EL and the correction contents of at least some of the plurality of mask patterns 1311d. The sixth correlation information indicating the relationship may be stored in advance. Such sixth correlation information may be generated based on the measurement results of the substrate 151 actually exposed by the exposure apparatus 1, or may be generated based on the results of simulation of the operation of the exposure apparatus 1. When the sixth correlation information is stored in advance in the memory 22, the CPU 21 specifies the correction amount necessary to reduce or zero the deviation of the exposure amount due to the plurality of exposure lights EL. , based on the sixth correlation information, the correction contents of at least a portion of the plurality of mask patterns 1311d required to correct the deviation of the exposure amount by a specific correction amount may be specified.

Additionally, the CPU 21, in addition to or instead of based on the deviation of the exposure amount by the plurality of exposure lights EL projected from the plurality of projection optical systems 14, respectively, determines the Based on any deviation in exposure characteristics, at least a portion of the plurality of mask patterns 1311d may be corrected. For example, the CPU 21 may correct at least a portion of the plurality of mask patterns 1311d so that the variation in arbitrary exposure characteristics due to the plurality of exposure lights EL becomes small or zero.

In addition, in the fifth modification, the CPU 21 does not need to calculate the mask pattern by calculating the unit mask pattern portion 1311u and then arranging a plurality of the calculated unit mask pattern portions 1311u. In this case, the CPU 21 calculates a mask pattern corresponding to the device pattern by an arbitrary method, and then applies the calculated mask pattern to a plurality of exposure lights respectively projected from the plurality of projection optical systems 14 ( Correction may be made so that the deviation of the exposure amount due to EL) becomes small or zero. Even in this case, there is no change in the CPU 21 being able to calculate a mask pattern capable of forming a desired device pattern with relatively high precision.

In addition, in the fifth modification, the CPU 21 determines the plurality of mask patterns 1311d based on the variation in exposure characteristics due to the plurality of exposure lights EL projected from the plurality of projection optical systems 14, respectively. At least part of it is being corrected. However, in addition to or instead of this, the CPU 21 detects the deviation of exposure characteristics due to the exposure light EL projected from any one projection optical system 14 (in short, the deviation corresponding to one projection optical system 14 At least part of the plurality of mask patterns 1311d may be corrected based on the deviation of exposure characteristics within the projection area PR of 1. In short, the CPU 21 corrects at least a part of the plurality of mask patterns 1311d without considering the deviation in exposure characteristics due to the plurality of exposure lights EL projected from the plurality of projection optical systems 14, respectively. I'm doing it. Specifically, as shown in FIGS. 24(b) and 24(c), deviations occur in exposure characteristics within the projection area PR of the projection optical system 14 where distortion aberrations occur (in short, , there is a deviation in exposure characteristics that causes the exposure amount at positions A and C to be different from the exposure amount at position B). The same applies to cases where image plane distortion occurs. Furthermore, depending on the optical characteristics of the projection optical system 14, there is a possibility that deviations in exposure characteristics may occur even within the projection area PR of the projection optical system 14 where distortion aberration and image plane distortion do not occur. For this reason, the CPU 21 determines the deviation of exposure characteristics due to the exposure light EL projected from such a single projection optical system 14 (in short, a single projection area corresponding to the single projection optical system 14 ( At least part of the plurality of mask patterns 1311d may be corrected so that the deviation of exposure characteristics within PR) is reduced or zero.

(4) Device manufacturing method

Next, referring to FIG. 28, a method for manufacturing a display panel using the exposure apparatus 1 described above will be described. FIG. 28 is a flow chart showing the flow of a device manufacturing method for manufacturing a display panel using the exposure apparatus 1 described above. In addition, below, for convenience of explanation, a device manufacturing method for manufacturing a liquid crystal display panel, which is an example of a display panel, will be described. However, other display panels can also be manufactured using a device manufacturing method that modifies at least part of the device manufacturing method shown in FIG. 28.

In step S200 (mask manufacturing process) in FIG. 28, the mask 131 is first manufactured. In short, a mask pattern is calculated by the mask pattern calculation device 2, and a mask 131 on which the calculated mask pattern is formed is manufactured. Thereafter, in step S201 (pattern formation process), a coating process of applying a resist onto the substrate 151 to be exposed, a mask pattern for the display panel is applied to the substrate 151 using the exposure apparatus 1 described above. An exposure process for transferring to and a development process for developing the substrate 151 are performed. A resist pattern corresponding to a mask pattern (or device pattern) is formed on the substrate 151 through a lithography process including this application process, exposure process, and development process. Following the lithography process, an etching process using the resist pattern as a mask and a peeling process to remove the resist pattern are performed. As a result, a device pattern is formed on the substrate 151. This lithography process and the like are performed multiple times depending on the number of layers formed on the substrate 151.

In step S202 (color filter forming process), a color filter is formed. In step S203 (cell assembly process), liquid crystal is injected between the substrate 151 on which the device pattern was formed in step S201 and the color filter formed in step S202. As a result, a liquid crystal cell is manufactured.

In the subsequent step S204 (module assembly process), components (for example, an electric circuit, a backlight, etc.) for performing a desired display operation are mounted on the liquid crystal cell manufactured in step S203. As a result, the liquid crystal display panel is completed.

At least part of the structural requirements of each embodiment described above can be appropriately combined with at least another part of the structural requirements of each embodiment described above. Some of the configuration requirements of each embodiment described above do not need to be used. In addition, to the extent permitted by law, all published publications and U.S. patent disclosures related to the exposure apparatus, etc. cited in each of the above-described embodiments are cited and made a written part of the main text.

The present invention is not limited to the above-described embodiments, but can be appropriately modified within the range that does not conflict with the gist or idea of the invention as can be read from the claims and the entire specification, and pattern calculations accompanying such changes. Apparatus, pattern calculation method, mask, exposure apparatus, device manufacturing method, computer program, and recording medium are also included in the technical scope of the present invention.

1: Exposure device
131: mask
131a: Joint pattern area
131b: Non-seam pattern area
1311u: Unit mask pattern part
1311p: Pixel mask pattern part
1311s: Peripheral mask pattern part
1311d: mask pattern
1311g: Mask pattern group
14: Projection optical system
15: substrate stage
151: substrate
151a: joint area
151b: Non-joint area
1511u: Unit device pattern part
EL: exposure light
IR: Illuminated area
PR: projection area

Claims (7)

With respect to the substrate, the first projection optical system and the second projection optical system, at least part of which is arranged in the scanning direction, are moved in the scanning direction, while an area extending in the scanning direction in the substrate is transmitted to light through the first projection optical system. A mask for forming a device pattern on the substrate, used in an exposure apparatus that performs scanning exposure by irradiating with light through the second projection optical system after irradiation,
disposed on an area extending in the scanning direction,
having a wiring pattern extending in a non-scanning direction intersecting the scanning direction,
In the wiring pattern, the line width of the portion corresponding to the area extending in the scanning direction becomes closer to the end of the portion in the non-scanning direction from the center of the portion, and A mask that increases the difference from the line width of the wiring pattern. According to claim 1,
A mask in which the line width of the portion corresponding to the area extending in the scanning direction in the wiring pattern becomes thicker as it approaches the end of the portion in the non-scanning direction from the center of the portion. A mask for forming a device pattern on a substrate with exposure light,
The mask includes a first wiring pattern for forming a first wiring extending in a first direction on the substrate, a second wiring pattern for forming a second wiring extending in the first direction on the substrate, and the first wiring pattern for forming the first wiring on the substrate. and a third wiring pattern for forming a third wiring extending in one direction on the substrate,
The third wiring pattern is located between the first wiring pattern and the second wiring pattern,
A mask wherein the line width of the third wiring pattern is different from the line width of the first wiring pattern and is also different from the line width of the second wiring pattern. According to claim 3,
The mask moves the first projection optical system and the second projection optical system, at least part of which is aligned in the scanning direction, with respect to the substrate in the scanning direction, and defines a region extending in the scanning direction on the substrate as the first projection optical system. A mask for forming the device pattern on the substrate, used in an exposure apparatus that performs scanning exposure by irradiating with light through the second projection optical system and then irradiating with light through the second projection optical system,
disposed on an area extending in the scanning direction,
The third wiring pattern is a wiring pattern extending in the first direction, which is the scanning direction, and is a mask projected on an area extending in the scanning direction. According to claim 3,
A mask wherein each of the first wiring pattern, the second wiring pattern, and the third wiring pattern is a data line. According to claim 3,
A mask wherein each of the first wiring pattern, the second wiring pattern, and the third wiring pattern is a gate line. The method according to any one of claims 1 to 6,
The device pattern has a plurality of unit device pattern portions arranged,
A unit mask pattern portion for forming the unit device pattern portion of one of the mask patterns of the mask is calculated on the substrate, and a specific mask pattern portion adjacent to the unit mask pattern portion and corresponding to at least a portion of the unit mask pattern portion is formed in the unit. A mask in which the mask pattern is calculated by correcting the unit mask pattern portion based on an influence on the formation of the unit device pattern portion by exposure light through the mask pattern portion and arranging a plurality of the corrected unit mask pattern portions.