KR101885256B1 - A low power all-in-one bandgap voltage and current reference circuit - Google Patents

Abstract

In implementing the low-power bandgap reference voltage and the reference current generation circuit, the present invention uses a leakage current to output linearly increasing voltages as the absolute temperature increases, and only one slope of the voltages And to enable simultaneous generation of a bandgap reference voltage and a reference current.
To this end, it is possible to generate voltages proportional to the absolute temperature by using a leakage current flowing in the off state of the transistor, and to generate a reference current by modifying one of the voltages using a low power amplifier having an artificial offset, And the power consumption can be reduced.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a low-power band-gap reference voltage and a reference current co-

The present invention relates to a technique for simultaneously generating a bandgap reference voltage and a reference current by using a leakage current. More particularly, the present invention relates to a technique for generating a voltage proportional to an absolute temperature And to reduce the power consumption and the area by generating a voltage difference which is hardly influenced by changes in the power supply voltage or the temperature, thereby generating a low-power bandgap reference voltage and a reference current.

In a semiconductor integrated circuit, a reference voltage generating circuit means a circuit that generates a constant voltage regardless of conditions such as a process change, a power supply voltage, and a surrounding temperature. The reference voltage generating circuit may be implemented by a sum of a linearly increasing voltage and a linearly decreasing voltage as the absolute temperature increases. The final voltage value output from the bandgap reference voltage generating circuit among the reference voltage generating circuits is related to the band gap of silicon.

In recent years, portable devices such as smart phones and tablets have become widespread due to the rapid development of electronic communication technology. However, since these portable devices basically operate based on a limited power source of the battery, it is essential to operate the portable device with a low power in order to increase the use time. In particular, the Internet of things has become a hot topic in recent years, which means that the importance of low-power operation is increasing.

Generally, since the reference voltage generating circuit is used as one partial circuit of the whole circuit to generate a constant voltage regardless of conditions such as process variation, power supply voltage and ambient temperature, it operates at a low power and is realized in a narrow area Is required.

Nevertheless, the conventional reference voltage generating circuit can not overcome the trade-off between the area and the consumed power, so that it is difficult to operate at a low power or it is difficult to implement in a small area.

In order to overcome such difficulties, it is possible to consider the voltage / current conversion by a method of voicing the reference voltage outputted from the reference voltage generation circuit to the amplifier in a negative feedback manner. However, since the reference voltage value is sufficiently high, Resistance is required and the area is abnormally widened.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a bandgap reference voltage generation circuit that can operate with a low power and reduce a mounting area by using only a leakage current of a transistor, And a voltage that increases linearly as the absolute temperature increases.

Another problem to be solved by the present invention is to add a low-power amplifier so as to deviate from the existing trade-off relationship, and to simultaneously generate a reference voltage and a reference current in a circuit given an artificial offset to the low- .

According to an aspect of the present invention, there is provided a co-generation circuit for a low-power bandgap reference voltage and a reference current, which includes linear temperature-proportional voltages that increase linearly as the absolute temperature increases, An absolute temperature proportional voltage generator for generating an absolute temperature; A first low-power amplifier for copying and outputting an absolute-temperature-proportional voltage at the highest level among the absolute-temperature-proportional voltages; A second low-power amplifier for copying and outputting an absolute-temperature-proportional voltage at an intermediate level among the absolute-temperature-proportional voltages in a form having a voltage difference equal to the slope of the absolute temperature-proportional voltage output from the first low- And an absolute temperature proportional voltage output from the first low power amplifier to output a reference voltage and a reference current insensitive to temperature using two absolute temperature proportional voltages output from the first and second low power amplifiers And outputting a reference voltage and a reference current output unit.

As the absolute temperature generated by the diode increases by using only the leakage current of the transistor and the absolute value of the linearly decreasing voltage and the absolute value of the slope of the absolute value of the voltage increase linearly, The gap reference voltage and the reference current generation circuit can be operated with low power and the area can be reduced.

In addition, by adding one low-power amplifier and providing an artificial offset to the low-power amplifier, it is possible to simultaneously output the reference voltage and the reference current in one circuit.

1 is a circuit diagram of a low-power bandgap reference voltage and a reference current according to an embodiment of the present invention.
2 is a graph showing voltages that increase linearly as the absolute temperature increases.
FIG. 3 is a graph showing voltages radiated by a low-power amplifier having a linearly increasing voltage and an artificial offset as the absolute temperature copied by the low-power amplifier increases.
4A is a graph showing a relationship between a reference voltage and a reference current and a process variation according to the present invention.
4B is a graph showing a relationship between a reference voltage, a reference current, and a power supply voltage according to the present invention.
4C is a graph of a relation between the reference voltage and the reference current and the temperature according to the present invention.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a circuit diagram of a low-power bandgap reference voltage and a reference current according to an embodiment of the present invention. As shown in FIG. 1, the reference voltage and reference current generation circuit 100 includes an absolute temperature proportional voltage generator 110, A first low power amplifier 120, a second low power amplifier 130, and a reference voltage and reference current output unit 140.

The absolute temperature proportional voltage generating unit 110 generates a third-fifth absolute temperature proportional voltage (V _PTAT3 , V (V _PTAT3) , V _PTAT4 , V _PTAT5 ).

To this end, the absolute temperature proportional voltage generating unit 110 includes a P-channel MOS transistor (hereinafter, referred to as a " P-channel MOS transistor ") connected between the power source voltage VDD and a third absolute temperature proportional voltage V _PTAT3 that increases linearly as the absolute temperature increases. A first rectifier current output unit 111 having a PMOS transistor MP1 and performing a start-up function, a first rectifier current output unit 111 having a gate, a source, and a bulk region, A second rectifier current output unit 112 having a plurality of PMOS transistors MP2 connected in parallel between the first absolute temperature proportional voltage V _REF and the third absolute temperature proportional voltage V _PTAT3 to output a leakage current, And PMOS transistors (MP3, MP4, MP5) connected in series between the third absolute temperature proportional voltage (V _PTAT3 ) and the ground voltage in such a manner that drains are connected to each other and source and bulk regions are connected to each other, Linearly with increasing absolute temperature A third absolute temperature proportional voltage (V _PTAT3), the mid-level of the fourth absolute temperature proportional voltage (V _PTAT4) and fifth absolute temperature proportional voltage absolute temperature proportional voltage output for outputting a (V _PTAT5) of the lowest level of the applied top-level (113).

The PMOS transistor MP1 provided in the first rekey current output section 111 has a very small size as compared with the PMOS transistor MP2 provided in the second rekey current output section 112. [ The PMOS transistor MP1 serves to start up the reference voltage and reference current coincidence circuit 100 so that the circuit 100 operates safely at a desired one of the two operating points. The reference voltage and reference current coincidence circuit 100 ) Does not have a significant effect during normal operation.

The gate, source, and bulk regions of the plurality of PMOS transistors MP2 provided in the Rician ground current output section 112 are commonly connected to the reference voltage V _REF , and the drain increases linearly as the absolute temperature increases The third absolute temperature proportional voltage V _PTAT3 . Therefore, the gate voltage and the source voltage of the plurality of PMOS transistors MP2 become the same level, respectively. Accordingly, the plurality of PMOS transistors MP2 are in a state in which only the leakage current according to the absolute temperature flows in a region below the threshold voltage.

The PMOS transistor MP3 provided in the absolute temperature proportional voltage output section 113 outputs a third absolute temperature proportional voltage V _PTAT3 that increases linearly as the absolute temperature of the surroundings increases, The transistor MP4 outputs a fourth absolute temperature proportional voltage V _PTAT4 , which increases linearly as the absolute temperature of the surroundings increases, and the PMOS transistor MP5 outputs a fourth absolute temperature proportional voltage V _PTAT4 , And outputs a fifth absolute temperature proportional voltage (V _PTAT5 ) that is increasing in value to the source.

Since the PMOS transistors MP1, MP2, MP3, MP4, and MP5 are connected in the above-described structure, the levels of the third to fifth absolute temperature proportional voltages V _PTAT3 , V _PTAT4 , and V _PTAT5 are Is determined by the leakage current flowing through the PMOS transistors (MP3, MP4, MP5).

The PMOS transistors MP1, MP2, MP3, MP4, and MP5 operate at voltages lower than the threshold voltage. Since the gate, source, and bulk regions of the PMOS transistor MP2 are commonly connected to the reference voltage V _REF , the PMOS transistor MP2 can be self-regulated.

Since the influence of the PMOS transistor MP1 can be almost neglected in the normal operation mode, the reference voltage and reference current coincidence circuit 100 can prevent the third to fifth absolute temperature proportional voltages V _PTAT3 , V _PTAT4 , and V _PTAT5 Is characterized in that it is hardly influenced by the power supply voltage V _DD and increases only in proportion to the absolute temperature. Also, the amount of current flowing through the PMOS transistors MP3, MP4, and MP5 is equal to the total current of the leakage current flowing through the PMOS transistors MP1 and MP2.

The absolute temperature-proportional-voltage generating unit 110 generates a third-fifth absolute temperature proportional voltage (V _PTAT3 , V _PTAT4 ) that increases linearly as the absolute temperature increases by using the _leak current generated as described above , V _PTAT5 ), it becomes possible to operate with low power (hereinafter referred to as " low power "). In addition, the first rekey current output section 111 outputs the first reference current and the second reference current in comparison with the leakage current flowing in the second leaky current output section 112 among the leaky currents for start-up of the reference voltage and reference current generation circuit 100 Only use enough leakage current to be negligible. Accordingly, the amount of power consumed by the reference voltage and reference current coincidence circuit 100 is reduced as compared with the conventional bandgap reference voltage generation circuits having separate circuits for start-up.

The output voltage of a conventional bandgap reference voltage generating circuit is a sum of a linearly increasing voltage and a linearly decreasing voltage as the absolute temperature increases. If the sum of these two voltages does not have a temperature tendency, The magnitude of the change in temperature must be the same. The conventional bandgap reference voltage generating circuit has a diode for outputting a linearly decreasing voltage as the absolute temperature increases. The linearly decreasing voltage and the linearly decreasing voltage increase as the absolute temperature output from the diode increases. The slope of the linearly increasing voltage should be increased as the absolute temperature increases. To this end, in the conventional bandgap reference voltage generating circuit, two resistors are used. In contrast, in the embodiment of the present invention, the PMOS transistors MP3, MP4, and MP5 having the above-described connection structure are used .

The reason why the leaky current output unit 112 and the absolute temperature proportional voltage output unit 113 are implemented by a PMOS transistor as in the above description is that when implemented as an N-channel MOS transistor (hereinafter referred to as an NMOS transistor) DNW is additionally required, resulting in additional costs, and there is a noise vulnerability due to the structure of DNW.

FIG. 2 is a graph showing characteristics of the _{third- fifth} absolute temperature proportional voltages (V _PTAT3 , V _PTAT4 , and V _PTAT5 ) output from the absolute temperature proportional voltage generator 110. Referring to FIG. The leaky current flowing through the Riky current output unit 112 is hardly changed even if the drain-source voltage of the PMOS transistor MP2 is changed. Due to this influence, the third-fifth absolute temperature proportional voltage (V _PTAT3 , V _PTAT4 , V _PTAT5 ) is also hardly affected by the power supply voltage (V _DD ).

This phenomenon is caused by the Drain-Induced Barrier Lowering (DIBL) effect of the transistor. In a circuit using a conventional leakage-based absolute temperature proportional voltage, the absolute temperature proportional voltages are set to the supply voltage (V _DD ) Of the total population. However, when the equation is derived in consideration of the DIBL effect, it is found that the third-fifth absolute temperature proportional voltage (V _PTAT3 , V _PTAT4 , V _PTAT5 ) at the absolute temperature 0K is not completely 0V .

This can be achieved, for example, between the third and fourth absolute temperature proportional voltages V _PTAT3 and V _PTAT4 or between the fourth and fifth absolute temperature proportional voltages V _PTAT4 and V _PTAT5 , Because there is a difference by. This difference value is a value that is negligibly small compared to the absolute level at the temperature (0 ° C to 110 ° C) at which the reference voltage and reference current coincidence circuit 100 actually operate. However, in the embodiment of the present invention, the difference value between adjacent absolute temperature proportional voltages is used to generate the reference current I _REF having a low level.

3 is a conceptual diagram showing a principle of generating a reference current I _REF according to an embodiment of the present invention. According to an embodiment of the present invention, two adjacent absolute temperature proportional voltages, for example, third and fourth absolute temperature proportional voltages (V _PTAT3 ) and (V _PTAT4 ) are not completely equal at 0K due to the DIBL effect.

However, by increasing the slope of the relatively low level of the fourth absolute temperature proportional voltage (V _PTAT4) a third absolute temperature proportional voltage (V _PTAT3) gradient and to, if the level is higher the third absolute temperature proportional voltage (V _PTAT3 like the ) And a fourth absolute temperature proportional voltage (V _PTAT4 ) having the same slope and parallel to the difference caused by the DIBL effect.

3, the third absolute temperature proportional voltage V _PTAT3 is _converted into a first absolute temperature proportional voltage V _PTAT1 and the fourth absolute temperature proportional voltage V _PTAT4 is _converted into a second absolute temperature proportional voltage V _PTAT2 . An example of conversion is shown. When the negative feedback is applied to the low power amplifier, the voltages of the two input terminals of the low power amplifier become equal to each other. By using the third absolute temperature proportional voltage V _PTAT3 as the first absolute temperature proportional voltage V _PTAT1 You can copy.

On the other hand, an increase in the absolute temperature of two adjacent points does not affect the difference between the two absolute temperature-proportional voltages that increase linearly. Changing only one slope of the two absolute temperatures is caused by the second low-power amplifier 130 having an artificial offset voltage ). ≪ / RTI > For example, when the size of the transistor MP3 connected to the input terminal of the second low-power amplifier 130 is set to be smaller than that of the transistor MP2 The offset voltage is present when a negative feedback is given to the second low power amplifier 130, whereby only the slope of the target second absolute temperature proportional voltage V _PTAT2 is changed. Therefore, if the sizes of the transistors MP2 and MP3 connected to the input terminals of the first and second low-power amplifiers 120 and 130 are appropriately set to different values in this way, The first and second absolute temperature proportional voltages V _PTAT1 and V _PTAT2 having a linear difference and having a constant difference can be generated.

Connected between the first absolute temperature proportional voltage (V _PTAT1 ) and the ground voltage, which increases linearly as the absolute temperature increases, without using an additional second low power amplifier (130) as in the conventional bandgap reference voltage generation circuit When the resistor R1 is provided, the reference voltage and the current flowing in the reference current output part 140 can be expressed by the following equation (1).

However, as in the embodiment of the present invention, the second absolute temperature proportional voltage V _PTAT2 (V _PTAT2 ) having the lower level among the two absolute temperature proportional voltages, for example, the first and second absolute temperature proportional voltages V _PTAT1 and V _PTAT2, ) Is changed as described above so that the slopes of the first and second absolute temperature proportional voltages V _PTAT1 and V _PTAT2 are parallel to each other and when the resistor R1 is connected between them, The current flowing in the output section 140 is expressed by the following equation (2).

Therefore, even when the resistor R1 having the same resistance value as the resistance value in the conventional bandgap reference voltage generating circuit is used, the level of the first absolute temperature proportional voltage (V _PTAT1 ) decreases and the reference voltage and the reference current The generating circuit 100 can be operated. In this way, the current I can be used as the reference current I _REF so that the molecular part of the above formula (2) is hardly influenced by the temperature.

The first low-power amplifier 120 and the second low-power amplifier 130 having an artificial offset voltage are connected in series to the third and fourth absolute-temperature-proportional-voltage generating units 110 and 110, respectively. In the case of a negative feedback of the temperature proportional voltage (V _PTAT3 , V _PTAT4 ) to copy or change the tilt, it _operates below the threshold voltage, so low power driving is possible.

The reference voltage and reference current generation unit 140 includes a reference voltage output unit 141 and a reference current output unit 142.

The reference voltage output unit 141 is driven by the output voltage of the first low power amplifier 120 to output the reference voltage V _REF . In order to output the reference voltage V _REF , And plays a role of copying the voltage (V _PTAT3 ).

The reference voltage output unit 141 includes a PMOS transistor having a gate connected to the output terminal of the first low power amplifier 120 and a source and a drain connected to the power supply voltage V _DD and the reference voltage V _REF MP6.

The reference current output section 142 outputs the first absolute temperature proportional voltage V _PTAT1 copied by the first low power amplifier 120 and the second absolute temperature proportional voltage V _CTAT1 copied by the second low power amplifier 130 V _PTAT2 ).

The reference current output unit 142 includes a diode D1 and a resistor R1 connected in series between a reference voltage V _REF and an output terminal of the low power amplifier 130. [ Here, the diode D1 may be implemented by various elements, and in the present embodiment, the diode D1 is implemented by a bipolar junction transistor (BJT).

The first low power amplifier 120 copies the third absolute temperature proportional voltage V _PTAT3 , which increases linearly as the absolute temperature increases, and outputs the third absolute temperature proportional voltage V _{PTAT1 as} the first absolute temperature proportional voltage V _PTAT1 .

On the other hand, the diode D1 _outputs a temperature compensating control voltage V _CTAT that linearly decreases as the absolute temperature increases from the first absolute temperature proportional voltage V _PTAT1 . If the temperature _coefficient of the temperature compensation control voltage (V _CTAT ) is equal to the temperature of the first absolute temperature proportional voltage (V _PTAT1 ), the temperature dependency is canceled. Thus, the reference voltage V _REF is hardly affected by temperature and is output at a level associated with the bandgap voltage of silicon. The relationship between the reference voltage V _REF applied to both ends of the diode D1 at the reference current output section 142 and the first absolute temperature proportional voltage V _PTAT1 and the temperature compensation control voltage V _CTAT applied across both ends is Can be expressed by the following equation (3).

Here, the slope of the first absolute temperature proportional voltage (V _PTAT1) is a third will copied from the absolute temperature proportional voltage (V _PTAT3), the slope of the third absolute temperature proportional voltage (V _PTAT3) is a diode (D1) The absolute value should be the same so that the temperature dependence can be offset. The slope of the third absolute temperature proportional voltage V _PTAT3 controls the number of the PMOS transistors MP2 connected in parallel to the _reliable current output unit 112 of the absolute temperature proportional voltage generator 110, The number of PMOS transistors MP3-MP5 connected in series between the first absolute temperature proportional voltage V _PTAT1 and the ground voltage at the temperature proportional voltage output unit 113 can be adjusted to a desired slope.

라고 표기하면, 제1 절대온도비례전압(V_PTAT1)과 제2 절대온도비례전압(V_PTAT2)의 사이에 저항(R1)이 연결될 때 이를 통해 온도에 둔감한 즉, 온도에 의해 거의 변하지 않는 기준전류(I_REF)가 흐르게 되며, 이 기준전류(I_REF)는 다음의 [수학식 4]와 같이 표현할 수 있다.Similar to the above-described copy operation of the first low power amplifier 120, the second low power amplifier 130 having an artificial offset voltage changes the slope of the fourth absolute temperature proportional voltage (V _PTAT4 ) And outputs it as a second absolute temperature proportional voltage (V _PTAT2 ). Accordingly, the first absolute temperature proportional voltage (V _PTAT1 ) and the second absolute temperature proportional voltage (V _PTAT2 ) become parallel voltages having the same slope and a constant difference from each other. Variables that take into account the effect of the DIBL effect at an absolute temperature of 0K

When the resistor R1 is connected between the first absolute temperature proportional voltage (V _PTAT1 ) and the second absolute temperature proportional voltage (V _PTAT2 ), a reference which is insensitive to temperature, that is, The current I _REF flows, and this reference current I _REF can be expressed by the following equation (4).

Therefore, the value of the reference current I _REF can be set to a desired value by adjusting the value of the resistor R 1. To this end, the resistor R 1 may be implemented as a variable resistor, or a series or parallel It can be connected in form.

4A to 4C are diagrams showing influences of a process variation of a reference voltage and a reference current, a power supply voltage and a surrounding temperature according to the present invention.

가 0.21%밖에 되지 않았으며, 기준전류(I_REF)는

가 4.07%로 마찬가지로 상당히 공정 변화에 둔감한 것으로 확인되었다.4A shows changes in the reference voltage V _REF and the reference current I _{REF with} respect to a process change. Here, the process change is implemented by Monte-Carlo simulation because it is difficult to implement by chip, and it is confirmed that it is insensitive to process change. The simulation results show that the reference voltage (V _REF )

Was only 0.21%, and the reference current I _REF was

Was 4.07%, which was confirmed to be insensitive to the process change.

4B is a diagram showing how the reference voltage V _REF and the reference current I _REF , which are the final outputs, change as the power source voltage is changed. The reference voltage and reference current generation circuit 100 according to the embodiment of the present invention can see that the reference voltage V _REF operates normally from about 1.3 V and the reference voltage V _REF is 0.08% And the reference current I _REF has dependency on the power supply voltage of 1.16% / V, and it is understood that the reference current I _REF is hardly affected by the power supply voltage VDD. This is a result obtained by applying the reference voltage (V _REF ) to the power supply voltage portion of the absolute temperature proportional voltage generating portion 110 to obtain the self stabilization.

를 나타내었다. 또한 전체 회로를 구동하는데 필요한 총 전력은 상온 기준 약 9.3nW이었다.FIG. 4C is a graph showing a change in the reference voltage V _REF and the reference current I _REF as the temperature changes from 0 ° C to 110 ° C. On the average, the reference voltage V _REF has a temperature dependence of 26 ppm / DEG C and the reference current I _REF has a temperature dependence of 283 ppm / DEG C, independently from 10 different chips. The average value of the reference voltage (V _REF ) is 1.238 V, the average value of the reference current (I _REF ) is 6.64 nA, and the reference voltage (V _REF ) 0.43%, the reference current I _REF is 1.19%

Respectively. The total power required to drive the entire circuit was about 9.3 nW at room temperature.

Although the preferred embodiments of the present invention have been described in detail above, it should be understood that the scope of the present invention is not limited thereto. These embodiments are also within the scope of the present invention.

100: Reference voltage and reference current coincidence circuit 110: Absolute temperature proportional voltage generator
111: first rectifier current output unit 112: second rekey current output unit
113: absolute temperature proportional voltage output section 120: first low power amplifier
130: second low power amplifier 140: reference voltage and reference current output section
141: Reference voltage output section 142: Reference current output section

Claims (10)

An absolute temperature proportional voltage generating unit that generates absolute temperature proportional voltages that linearly increase as the absolute temperature of the surroundings increases using the leakage current;
A first low-power amplifier for copying and outputting an absolute-temperature-proportional voltage at the highest level among the absolute-temperature-proportional voltages;
A second low-power amplifier for copying and outputting an absolute-temperature-proportional voltage at an intermediate level among the absolute-temperature-proportional voltages in a form having a voltage difference equal to the slope of the absolute temperature-proportional voltage output from the first low- And
And outputs a reference voltage using the absolute temperature proportional voltage output from the first low power amplifier and outputs a temperature insensitive reference current using two absolute temperature proportional voltages output from the first and second low power amplifiers And a reference current output unit for outputting a reference voltage and a reference current.
The apparatus of claim 1, wherein the absolute temperature proportional voltage generator
A first rectifier current output unit for performing a start-up function so as to operate only at a desired operating point by always outputting a rectifier current by having a transistor operating in an off state;
A second latch circuit having a plurality of transistors operating in an off state to output a latch current;
An absolute temperature proportional voltage output unit that generates absolute temperature proportional voltages that linearly increase as the absolute temperature of the surroundings increases, using the Rikigan currents output from the first rekey current output unit or the second rekey current output unit A reference voltage generating circuit for generating a reference voltage;
3. The method of claim 2, wherein the transistor of the first rekey current output
And a first PMOS transistor operating at a voltage equal to or lower than a threshold voltage and having a gate, a source, and a bulk connected in common to a power supply voltage, and a drain connected to the highest-level absolute temperature proportional voltage, And a reference current generating circuit.
The semiconductor memory device according to claim 2, wherein the plurality of transistors of the second latch current output section
And a plurality of second PMOS transistors operating at a voltage equal to or lower than the threshold voltage and having a gate, a source and a bulk region connected in common to the reference voltage, and a drain connected to the highest-level absolute temperature proportional voltage. Bandgap reference voltage and reference current generation circuit.
The apparatus according to claim 2, wherein the absolute temperature proportional voltage output unit
And third to fifth PMOS transistors connected in series between the top-level absolute temperature-proportional voltage and the ground voltage in such a manner that a gate and a drain are connected to each other and a source and a bulk region are connected to each other. Gap reference voltage and reference current generation circuit.
2. The apparatus of claim 1, wherein the reference voltage and reference current output
A reference voltage output unit for outputting the reference voltage using the highest absolute temperature proportional voltage output from the first low power amplifier,
And a reference current output unit for outputting the reference current using the reference voltage and an intermediate temperature absolute temperature proportional voltage output from the second low power amplifier.
7. The apparatus of claim 6, wherein the reference voltage output section
And a sixth PMOS transistor having a source connected to a power supply voltage and a gate connected to an output terminal of the first low power amplifier and a drain connected to the reference voltage. Circuit.
7. The apparatus of claim 6, wherein the reference current output section
And a diode and a resistor connected in series between the reference voltage and the intermediate temperature absolute temperature proportional voltage.
9. The device of claim 8, wherein the diode
(BJT). The low-power bandgap reference voltage and the reference current generation circuit are implemented by a BJT (Bipolar Junction Transistor).
9. The method of claim 8,
Wherein the low-voltage bandgap reference voltage and the reference current are connected between a highest-level absolute temperature-proportional voltage copied by the first low-power amplifier and an intermediate-level absolute-temperature-proportional voltage copied by the second low- Circuit.

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