KR101736516B1 - Multilayered wiring board and method for manufacturing multilayered wiring board - Google Patents

Abstract

In the manufacture of a multilayer wiring board for use in mounting electronic components, a multilayer wiring technique for connecting layers between layers using conductive bumps such as B ² it has been used. However, there is a problem that a short circuit occurs between multilayer wirings due to warping of the substrate, or connection failure occurs between the conductive bumps and the wirings. Therefore, an insulating varnish containing an insulating filler was coated to form an insulating film. Even when the substrate is warped, it is possible to maintain the insulating property between the multilayer wirings, to improve the stability of the wiring connection, and to improve the production yield.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a multilayer wiring board,

The present invention relates to a multilayer wiring board for mounting electronic components and a method for manufacturing a multilayer wiring board. More particularly, the present invention relates to a method of manufacturing a multilayer wiring board capable of high density wiring with a via made of conductive bumps.

Patent Document 1: Japanese Patent No. 3167840

Patent Document 2: Japanese Patent Laid-Open No. 2007-13208

Patent Document 3: Japanese Patent Application Laid-Open No. 2006-183072

Patent Document 4: JP-A-2002-353617

2. Description of the Related Art In recent years, there has been an increasing demand for high-density mounting of wiring boards mounted on electronic equipment in accordance with the size and weight reduction, the high speed, and the multifunctionality of electronic devices. In order to cope with this demand, development of a multilayer wiring board is underway. In this multilayer wiring board, a plurality of insulating base materials and a plurality of conductive patterns are alternately stacked and stacked to mount electronic parts.

As a typical technique of manufacturing a multilayer wiring board, ALIVH of Matsushita Electronics Co., B ² it of Toshiba and Dainippon Printing are known.

ALIVH (multi-layered inter-layer printed wiring board) is a technology for forming an interlayer connection hole in an insulating substrate and filling the hole with a conductive material. Initially, a fine via hole is formed by irradiating laser light to the prepreg (insulating substrate sheet to be a material of the wiring board). The formed via-holes are filled with conductive paste to form vias (interlayer connection portions). The copper foil is laminated and thermally pressed on the prepreg. In addition, a conductive pattern is formed by photolithography and etching to obtain a wiring board member. This wiring board member is laminated and hot-pressed to produce a multilayer wiring board.

In ALIVH, wiring and electronic components can be placed on the via-hole. Therefore, it is possible to shorten the wiring length and to mount the high-density electronic component.

However, when the number of via holes increases, the processing time of laser light irradiation increases. As a result, the manufacturing cost is increased, and the adhesion strength to the vias of the copper foil bonded by the laminated hot press is not high. For this reason, there is a problem that open failure tends to occur at the time of drop test, and reliability is low.

Buried Bump Interconnection Technology (B ² it) forms a conductive or bumpy conductive bump on a conductive plate. Thereafter, the insulating prepreg base material is heat-softened. The bumps are passed through the insulating prepreg base material by a press. As a result, vias made of conductive bumps are formed. B ² it is disclosed in Patent Document 1 and Patent Document 2.

In the technique disclosed in Patent Document 1, a mountain-shaped conductor bump is passed through the synthetic resin-based support member along its thickness direction. Thereafter, an interlayer wiring is formed.

In the technique disclosed in Patent Document 2, an uncured insulating material base is disposed on a substantially conical conductor bump formed on a conductor plate. Thereafter, this substrate is pressed to penetrate the bumps. Further, the conductor plate is patterned. Thus, a substrate unit is manufactured. A plurality of such substrate units are stacked and heated under pressure to be cured.

In B ² it, wirings and electronic parts can be arranged without forming grooves on the via-holes like ALIVH. Therefore, shortening of the wiring length and high-density mounting are possible. Also, unlike ALIVH, vias are formed collectively. Therefore, even if the number of via holes is increased, the manufacturing cost does not increase. The conductive bumps are formed on the copper foil by printing before the prepreg is laminated. Therefore, B ² it has an advantage that the adhesion of the bump to the copper foil is also good.

On the other hand, B ² it has the following problems.

(1) A large pressure is applied to the conductive bumps and prepregs having high aspect ratios at the time of penetration of the conductive bumps and lamination heat press for forming the multilayer wiring board. At present, the in-plane density of vias is about 300,000 sheets / m ² . In the future, it is expected that the in-plane density of vias will be about 1 million sheets / m ² . In this case, a very large pressure is applied to the conductive bump or prepreg. As a result, the defective ratio due to breakage of the conductive bump or the prepreg is increased. Therefore, it is difficult to achieve high density in B ² it.

(2) In B ² it, mechanical strength is required for the conductive bumps. Therefore, it is necessary to set the outer diameter to 100 mu m or more. In order to realize a high density mounting, the conductive bumps are made finer so that the bottom surface diameter of the conductive bumps is 30 to 50 mu m. However, in B ² it, the aspect ratio of the bump is high, and further, the thickness of the prepreg is limited. For this reason, it is difficult to miniaturize.

(3) The conductive bump does not penetrate the prepreg unless the aspect ratio (height / outer diameter) of the conductive bump is 0.8 to 1.0 or more. In addition, there is a limit (~ 30 占 퐉 or more) to thinning the glass cloth-impregnated insulation resin base material which is a general material of the prepreg. Further, in order to improve the penetration characteristics of the conductive bump, a conductive bump height of about three times the thickness of the prepreg is required. Therefore, securing the aforementioned penetrability aspect ratio causes a limit (min. 72 to 90 m) in the fineness of the bottom surface diameter of the conductive bump. Further, unless the thickness of the prepreg and the temperature of the press process are appropriately adjusted, the conductive bumps do not penetrate the prepreg. Therefore, in B ² it, the margin of the manufacturing conditions such as the formation of the conductive bumps, the penetration process, and the lamination heat press process is small. Therefore, there is a problem that the yield is low.

(4) It is extremely difficult to develop a conductive paste capable of printing and printing high-aspect conductive bumps having a fine outer diameter.

(5) There is also a problem in the step of heating and softening the prepreg sheet made of the insulating resin in the state before curing and pressing the conductive prepreg into protruding conductive bumps, thereby penetrating the bump. That is, the prepreg sheet is a structure obtained by weaving a glass cloth base material horizontally and horizontally with a bundle of fiber filaments. Therefore, there is a large resistance difference between the case where the conductive bump corresponds to the intersection of the filament bundle and the case where the conductive bump corresponds to the case between the filament bundle and the filament bundle. The greater the resistance, the more the insulating resin and / or the glass cloth are broken at the interface between the insulating resin prepreg sheet and the conductive bump. The remaining portions of the insulating resin and / or the glass cloth cause the increase of the contact resistance value or the conduction failure when the conductive bumps and the conductor layer of the wiring board are laminated and pressed in a subsequent step. For this reason, the remainder of the fracture lowered the yield of the wiring board.

14 (a) to 14 (d) are cross-sectional views and perspective views showing a process sequence showing a manufacturing method of a B ² it-type multilayer wiring board member for passing bumps through a conventional prepreg sheet. First, the conical conductive bump 502 is formed on the first conductive foil 501 by a printing process of a conductive paste. As a result, an intermediate product is obtained (Fig. 14 (a)). Subsequently, this intermediate material is opposed to the prepreg sheet 503 which is an insulating resin before curing (Fig. 14 (b)). Subsequently, the prepreg sheet 503 is heated to a temperature just before dissolution to soften it under heating. The tip of the conductive bump 502 is protruded from the prepreg sheet 503 (Fig. 14 (c)). Then, a second conductive foil 505 is attached to the prepreg sheet 503 having the tip of the conductive bump 502 protruded (Fig. 14 (d)). 14 (e) is a horizontal sectional view of the upper portion of the conductive bump 502, which is a multilayer wiring board member manufactured in accordance with this method. It is observed that the rubbing residue 508 of the glass fiber base material contained in the prepreg sheet remains in the bump surface 507. [ A plurality of multilayer wiring board members manufactured in this manner are laminated and pressed to form a multilayer wiring board. In the conventional method for manufacturing a multilayered circuit board member of the B ² it system, the piece of debris is left in the bump surface. For this reason, there has been a problem that the electrical connection failure of the interlayer wiring tends to occur.

On the other hand, Patent Document 4 discloses a prior art in which vias made of conductive bumps are formed without using through-holes such as B ² it. In this technique, the insulating resin composition is coated on the conductive bump group formed on the first metal foil by the curtain coater method. Further, a second metal foil is overlaid on the second metal foil. As a method of applying the insulating resin composition, there is disclosed a spraying method and a method of coating an insulating resin composition on a conductive bump using a hot-rolled film as a film, in addition to a curtain coating method. In the method disclosed in Patent Document 4, no mechanical pressure is applied to the conductor bumps. Therefore, the problem of B ² it can be avoided. However, this method is applied on a conductor bump by using a high-viscosity insulating resin as a liquid in a curtain coater method and a liquid drop in a spray method. For this reason, there is a problem that the insulating resin tends to adhere to the tip portion of the conductor bump, or the rate of occurrence of poor contact between the conductor bump and the second metal foil is high. In addition, when the film having the hot-melting property is coated on the conductor bumps, the tip portion of the conductor bump is not exposed. Therefore, there is a problem that the interlayer connection can not be formed.

Further, in the conventional method of manufacturing a multilayer wiring board, there is a problem that defective connection occurs between multilayer wirings due to warping of the core board. 8 (b) and 8 (c) are cross-sectional views showing connection failure between wirings generated by a conventional method of manufacturing a multilayer wiring. 8 (b), the first core substrate 213 and the second core substrate 208 each having wiring on its surface are stacked so that the wiring surfaces of the first core substrate 213 and the second core substrate 208 are opposed to each other with the insulating resin layer 211 therebetween have. A part of the wiring 212 and a part of the wiring 209 are electrically connected by the conductive bump 210. [ In the case where the core substrate has a large warp, for example, as shown in Fig. 8 (b), in the case where warp is likely to be convex at the center portion, the wiring layers, which should be separated by the insulating resin layer 211, A wiring short occurs. 8 (c), when the wiring 215 and the wiring 218 are not in contact with each other but are insulated by the insulating resin layer 217, the conductive bumps 216 ) Are not in contact with each other and wiring is open. In the conventional method of manufacturing a multilayer wiring board, wiring connection failure occurs due to warping of the substrate. For this reason, there is a problem that the production yield of the multilayer wiring board can not be made sufficiently high.

It is an object of the present invention to provide a member for a multilayer wiring board and a manufacturing method of the multilayer wiring board. According to this member, the multilayer wiring board can be miniaturized, densified and thinned, and the interlaminar insulation of the multilayer wiring board is also improved. Further, according to this manufacturing method, it is possible to supply a wiring board having high connection reliability by the interlayer fine conductive bump, and further, the manufacturing yield is high and the manufacturing cost is also low.

The present invention (1) is characterized by comprising a conductive bump group formed between the first conductor layer and the second conductor layer, and an insulating layer formed around the conductive bump group and including an insulating filler for short circuit prevention Layer wiring board.

The present invention (2) is characterized by comprising a conductive bump group formed between the first conductor layer and the second conductor layer, and an insulating layer formed around the conductive bump group and including an insulating filler, Is an average height of not less than 20% and not more than 100% of an average height of the group of conductive bumps after lamination hot pressing.

In the present invention (3), the insulating layer is a layer formed by reducing the film thickness by volatilizing the solvent under the condition that the resin of the insulating resin composition liquid containing the insulating filler is not substantially cured, and then curing (1) or (2).

The invention (4) is characterized in that the insulating filler is one or a plurality of materials selected from silica, silicon carbide, alumina, aluminum nitride, zirconia beads, glass beads and acrylic beads. ).

The present invention (5) is the multilayer wiring board according to any one of the above inventions (1) to (4), wherein the amount of the insulating filler added to the insulating resin blend solution is 1 vol% or more and 30 vol% or less.

In the present invention (6), the liquid mixture of the insulating resin is a mixture liquid containing an epoxy resin, bismaleimide triazine resin, polyimide resin, acrylic resin, phenol resin, oligophenylene ether resin, polyether resin and melamine resin (1) to (5).

The present invention (7) is the multilayer wiring board according to any one of the inventions (1) to (6), characterized in that the height h2 of the conductive bump group and the thickness t3 of the insulating layer satisfy the relationship h2 = t3.

The present invention (8) is characterized in that the resin composition constituting the conductive bump group is made of a material obtained by adding a thermoplastic resin to a thermosetting resin at a mixing ratio of 10 wt% or more and 30 wt% or less. Layer wiring board of the invention (7).

According to the present invention (9), there is provided a method of manufacturing a semiconductor device, comprising: forming at least a protruding conductive bump group on a conductor layer; and applying an insulating filler and an insulating resin composition liquid containing a volatile solvent onto the conductive layer and the conductive bump group, A step of forming an insulating uncured film by laminating a conductive layer or a core substrate on the insulating uncured film by volatilizing the volatile solvent and reducing the thickness of the fluidized film, And a step of curing the insulating uncured coating to form an insulating layer.

The present invention (10) relates to a method of manufacturing a liquid crystal display device, comprising at least: forming a protruding conductive bump group on a first core substrate; and applying an insulating resin composition liquid containing an insulating filler and a volatile solvent onto the conductive bump group Forming an insulating uncured film by evaporating the volatile solvent and reducing the film of the fluidic coating; and forming a conductor layer or a second core substrate on the insulating uncured film by stacking And a step of forming an insulating layer by curing the insulating uncured coating film.

The present invention (11) is characterized in that it comprises at least: a step of forming protruding conductive bump groups on a first core substrate; and a step of applying an insulating resin composition liquid containing an insulating filler and a volatile solvent onto the conductor layer or the second core substrate A step of forming a flowable film, a step of volatilizing the volatile solvent, and a step of reducing the thickness of the flowable film to form an insulating uncured film, and a step of forming the insulating core- Layer or a second core substrate in a multilayer wiring board.

The present invention (12) is characterized in that at least: a step of forming a fluid coating by applying an insulating resin blend liquid containing an insulating filler and a volatile solvent onto a first conductor layer disposed on the first core substrate; Volatilizing the fluidic coating, and reducing the thickness of the fluidic coating to form an insulating uncured coating, a step of forming protruding conductive bump groups on the second conductive layer or the second core substrate, 1, and a second conductor layer or a second core substrate on which the protruding conductive bump group is formed.

The present invention (13) is characterized in that the conductive bump group is formed on the first conductor layer, the fluidizable coating is formed by applying an insulating resin compound liquid containing an insulating filler and a volatile solvent, and the volatile solvent is volatilized And a step of forming one or a plurality of members for a multilayer wiring board formed by forming an insulating uncured film by reducing the thickness of the fluidic coating and then laminating hot pressing the member for the multilayer wiring board on the core board, And the step of forming a second conductor layer on the wiring board member is repeated once or several times to form a multilayer wiring board.

The present invention (14) is characterized in that the conductive bump group is formed on the first conductor layer, the fluidizable coating is formed by applying an insulating resin blend liquid containing an insulating filler and a volatile solvent, and the volatile solvent is volatilized And one or a plurality of members for a multilayer wiring board formed by forming the insulating uncured film by film reduction of the fluidic coating are formed and then one or a plurality of the multilayer wiring board members are collectively laminated on the core board, Thereby forming a multilayer wiring board.

The present invention (15) is a method for producing a multilayer wiring board according to any one of the above inventions (9) to (14), wherein the content of the nonvolatile component in the insulating resin mixed solution is 10 wt% to 80 wt%.

The present invention (16) is a process for producing a multilayer wiring board according to any one of the above-mentioned ninth to fifteenth inventions, wherein the drying / solidifying temperature of the insulating layer is 60 ° C or more and 160 ° C or less.

The invention (17) is characterized in that the resin composition constituting the conductive bump group is made of a material obtained by adding a thermoplastic resin to a thermosetting resin at a mixing ratio of 10 wt% to 30 wt% Layered wiring board according to the invention (16).

The present invention (18) is characterized in that the temperature of the laminated thermal press is not more than a temperature at which the curing reaction of the insulating resin starts, and a temperature at which the thermal dissolution viscosity of the insulating resin is lowered, Layer wiring board.

The effects of the present invention are described below.

1. Comparison with B ² it

There is no conductive bump penetration process. For this reason, no mechanical pressure is applied to the member. therefore,

Since the insulating layer can be made thin, the height of the conductive bump can be reduced. Also, even if the aspect ratio of the conductive bump is small, vias can be formed. As a result, the size of the conductive bump can be reduced. As a result, it becomes possible to manufacture a high-density multilayer wiring board having conductive bumps having an outer diameter of 30 to 50 mu m. In the future, the present invention can cope with a conductive bump density of 1 million / m ² .

It is not necessary to increase the aspect ratio of the conductive bump. For this reason, it is possible to form the conductive bump without using a special conductive paste or repeating the paste applying process for forming the conductive bump several times. Therefore, the material cost and the manufacturing cost can be reduced.

The defect rate due to the damage of the conductive bump, the wiring, and the insulating film is reduced.

The margin of manufacturing conditions is widened. Therefore, the manufacturing yield is improved even when the aspect ratio of the conductive bump required to form a good interlayer connection is small.

2. Comparison with ALIVH

In the present invention, the laser drilling technique is not used. Therefore, the shape irregularity of the hole portion can be excluded. The shape nonuniformity by the laser drilling method causes poor adhesion between the hole portion and the via conductive agent in the manufacturing process. This adhesion failure causes penetration of liquid or moisture into the wiring board, which is one of the various causes of defects. On the other hand, according to the manufacturing method of the present invention, the interface between the conductive bump and the insulating film is formed by applying a low-viscosity fluid resin around the conductive bump. Therefore, the adhesion between the conductive bump corresponding to the via and the insulating film and the reliability of the wiring board are extremely high.

A plurality of vias are collectively fabricated. Therefore, the manufacturing cost does not increase even when the number of vias increases.

3. Comparison with through-hole plating method

The present invention is suitable for miniaturization because of the high space utilization efficiency of vias. The structure of the present invention is a structure in which interlayer connection holes are filled with a conductive member. Therefore, it is highly suitable for mounting a device having a high heat dissipation effect and a high heating value such as a high-speed CPU. It is possible to form wirings and other vias on the vias as well. It is also possible to mount components on the surface layer vias. Therefore, it is possible to improve the mounting density.

4. Difference from the method of applying the insulating resin composition by the curtain coater method

The manufacturing method of the present invention is a method of exposing the conductive bumps by reducing the film thickness of the film by forming a film by applying a relatively low concentration of the resin compounding liquid. Therefore, the insulating resin is not left in the tip portion of the conductive bump. Therefore, it is possible to form a reliable interlayer connection and reduce the via resistance.

5. In the present invention, it is possible to form vias even when the shape of the top surface of the conductive bumps is a gentle arc having a center angle of 180 deg. Or less. Unlike the conductive bumps having small areas of the two sides used in the conventional method, the sectional area of the vias is large. In addition, the residual amount of the insulating material at the contact portion between the via and the wiring can be reduced. Therefore, the contact area between the via and the wiring can be increased. Therefore, it is possible to reduce the via resistance.

6. In the present invention, a multilayer wiring board is manufactured by laminating a wiring board member provided with an insulating uncured coating. For this reason,

The adhesion strength between the insulating film and the conductive pattern is increased. As a result, the wiring becomes difficult to peel off.

The adhesion strength between the adjacent insulating coatings is increased. As a result, it is possible to manufacture a rigid multilayer wiring board.

The insulating film has flexibility. For this reason, there is unevenness in the base (ground), and the surface is flat because of good coatability.

The adhesion strength between the conductive bump and the wiring that contacts the conductive bump increases. Therefore, it is possible to reduce the via resistance.

7. By combining the thick film process and the conductive thin film etching process, it is possible to reduce the manufacturing cost of the high-density multilayer wiring board.

8. A multilayer wiring board with high mounting density can be provided. This contributes to making the electronic device smaller and lighter and more multifunctional.

9. Insulating film is formed by insulating material with low dielectric constant and low dielectric loss. Therefore, a mounting wiring board having excellent overall electric signal characteristics can be manufactured. In particular, when an OPE system of ADFLEMA (trade name of Namix Co.) is used, the dielectric constant and dielectric tangent are lowered. Therefore, it is possible to manufacture a wiring board having excellent overall electric signal characteristics. In addition, since the content of the solvent is large, a thin insulating film can be easily formed.

10. Use a highly conductive wiring material to form wiring and conductive bumps. Therefore, it is possible to manufacture a wiring board with excellent electric signal characteristics even when the temperature of the heat treatment is reduced, the wiring film thickness is reduced, and the wiring width is reduced.

11. A multilayer wiring board can be manufactured by batch lamination. Therefore, it is possible to reduce the number of manufacturing steps compared with the method of manufacturing a multilayer wiring board by sequential lamination. Therefore, it is possible to reduce the manufacturing cost. Further, the thermal history applied to the wiring board member is small. Therefore, the reliability of the member and the multilayer wiring board formed by these members is enhanced.

12. An insulating filler is dispersed in an insulating film material. As a result, it is possible to reduce the wiring connection defect rate, such as shorting or opening, caused by the warp of the core substrate. Therefore, it is possible to improve the production yield.

BRIEF DESCRIPTION OF DRAWINGS FIG. 1 (a) to FIG. 1 (d) are cross-sectional views showing the steps of a first embodiment of a method for manufacturing a multilayer wiring board member according to the present invention.
[Fig. 2] (a) to (d) are cross-sectional views showing the steps of a second embodiment according to the embodiment of the method for producing a multilayer wiring board member of the present invention.
[Fig. 3] Figs. 3 (a) to 3 (i) are cross-sectional views showing a third specific example according to an embodiment of the method for producing a multilayer wiring board member of the present invention.
[Fig. 4] (a) to (i) are sectional views showing the steps of a process for producing a multilayer wiring board according to a first embodiment of the present invention.
[Fig. 5] (a) to Fig. 5 (d) are cross-sectional views showing a second specific example of the manufacturing method of a multilayer wiring board according to the present invention.
6 (a) and 6 (b) are cross-sectional views showing the steps of a third embodiment according to the embodiment of the method for producing a multilayer wiring board of the present invention.
[Fig. 7] (a) to (d) are cross-sectional views for explaining a undercoating process or a topcoating process, respectively, according to an embodiment of the method for producing a multilayer wiring board member of the present invention.
8 (a) to (c) are cross-sectional views for comparing the method for manufacturing a multilayer wiring board of the present invention with the conventional method for manufacturing a multilayer wiring board.
Fig. 9 is a graph showing the dependency of conduction stability on the presence or absence of a filler.
10 (a) to (c) are graphs showing the dependency of the conductivity by the conductive bump on the filler diameter. (d) to (f) are graphs showing the dependency of the conductivity by the conductive bump and the filler addition amount.
11A and 11B are graphs showing the dependence of the film thickness (height) or resistance value of the conductive bump on the amount of the thermoplastic resin added in the conductive bump.
12 (a) to (c) are diagrams for explaining the definition of the size parameter according to the multilayer wiring board member of the present invention.
13 is a plan view and a cross-sectional view of a test pattern for measuring via resistance.
[Fig. 14] (a) to (d) are a cross-sectional view and a perspective view of a process sequence of a conventional method of manufacturing a multilayer wiring board. (e) is a horizontal sectional view of the upper portion of the conductive bump of the conventional multilayer wiring board.
BRIEF DESCRIPTION OF THE DRAWINGS
1,11,21: Conductive foil
2, 12, 22: conductive bump
3, 13, 23:
5, 15, 27: Insulating uncured film
4, 14, 24: Insulating filler
25: Insulation curing film not fully cured
51, 53, 57, 58, 59, 60:
52: core substrate
55,61: conductive foil
54,
56, 63: Wiring
66: Multilayer wiring board
71,79: Conductive foil
72, 73, 74, 76, 77, 78:
75: core substrate
80: Insulating filler
81, 82: Multilayer wiring board member
83: Wiring
84: Resist pattern
85: wiring board
91, 95, 96, 100: core substrate
92,97: Insulating uncured film
93,98: Insulating filler
94,99: Conductive bump
121, 123, 125, 127, 129.133:
122, 126, 131, 137: core substrate
124, 128, 134, 140:
130, 132, 135, 139: conductive bump
136, 138: Insulating uncured film
201, 207, 208, 213, 214,
202, 206, 209, 212, 215,
204, 211, 217: insulating resin layer
205: Insulating filler
203, 210, 216: conductive bump
221; Conductive bump
222: fluid film
223: Insulating non-cured film
231,232: Measurement terminal
233: Second layer wiring
234: First layer wiring
235: Via
236: insulating film
501, 505: conductive foil
502: Conductive bump
503,506; Prepreg sheet
508: Breaking residue
507: conductive bump face

Hereinafter, the best mode of the present invention will be described.

(A multilayer wiring board member, a multilayer wiring board, a composite multilayer wiring board)

In the production of the multilayer wiring board, a multilayer wiring board member (a wiring board member, or simply, a wiring board member) which is a component constituting the multilayer wiring board is formed. Then, such a plurality of multilayer wiring board members are laminated and pressed under heating to form a multilayer wiring board. In particular, a multilayer wiring board obtained by laminating a surface circuit layer including a multilayer wiring board member having a high density of conductive bumps manufactured by the technique of the present invention and a core substrate having a low conductive bump density is referred to as a composite multilayer wiring board. Alternatively, the composite multi-layer wiring board including the core substrate may be simply referred to as a multi-layer wiring board. The core substrate is responsible for physical stiffness. On the core substrate, a circuit such as power supply wiring or ground wiring which is not so small is formed. Fine wiring is formed on the surface circuit layer of the core substrate. A multilayer wiring board member constituting a surface circuit layer is manufactured by using the technique of the present invention to form a composite multilayer wiring board having a high mounting density by combining a thick film process with a low manufacturing cost and an etching process with a conductive thin film capable of micromachining .

(Batch lamination, sequential lamination, core / core lamination)

A method called batch lamination is a method in which a multilayer wiring board member having wiring is formed and then a plurality of multilayer wiring board members are laminated and hot pressed at one time to produce a multilayer wiring board or a method in which a plurality of multilayer wiring board members and a core substrate are laminated Laminated hot press to produce a composite multi-layer wiring board. On the other hand, in a method called sequential lamination, a multilayer wiring board member with or without wiring is formed, and a conductive foil is stuck thereon. The wiring is formed by etching, and then the following multilayer wiring board member is placed thereon, followed by lamination hot pressing. Thereby, a multilayer wiring board or a composite multilayer wiring board is manufactured.

Since the batch lamination can reduce the number of steps, it is possible to reduce the manufacturing cost. Further, the thermal history applied to the wiring board member is small. Therefore, there is an advantage that the reliability of the member and the multilayer wiring board formed by these members is high. In the conventional B ² it, it is difficult to carry out batch lamination. According to the technique of the present invention, the multilayer wiring board can be easily manufactured by the batch lamination.

On the other hand, the sequential lamination is advantageous in that alignment by a wiring pattern is unnecessary, and alignment of the conductive bumps only needs to be performed. However, each time the multilayer wiring board member is laminated, it is necessary to perform etching or laminated thermal press. This increases the number of processes. As a result, the manufacturing cost is high and the thermal history is increased. Therefore, there is a problem that the reliability of the member is lowered.

In the core / core lamination, a single-layer insulating film is disposed between the core substrate and the core substrate. The conductive bumps electrically connect the core substrates.

The method for manufacturing a multilayer wiring board according to the present invention includes a batch lamination, a sequential lamination and a core / core lamination as a modification of the embodiment.

(Manufacturing method of member for wiring board)

In the method of manufacturing a member for a wiring board according to the embodiment of the present invention, protruding conductive bumps such as a truncated cone or a substantially cylindrical shape are used as interlayer connecting members. The insulating resin compounding liquid is applied on and around the conductive bumps (conductive bump group) formed at high density on the supporting member. Thus, a fluid coating is formed. Thereafter, the solvent is volatilized under the condition that the resin of the insulating resin blend liquid is not substantially subjected to the curing reaction, thereby solidifying the fluidized film and decreasing the film thickness. This makes the fluid coating film an insulating coating.

In the past, it has been thought that if the multilayer wiring board members are laminated and pressed without exposing the conductive bumps, electrical connection between the layers can not be realized. However, the inventors of the present invention have found that it is not essential to expose the conductive bump. That is, the inventors of the present application have found that a multilayer wiring board or a composite multilayer wiring board is manufactured by laminating an insulating resin for electrically separating a wiring board in the state of uncured coating and hot pressing the same, For the first time with high stability. It has also been confirmed that the reliability of the electrical connection of the multilayer wiring board or the composite multilayer wiring board manufactured by this method is good. Further, in the multilayer wiring board according to the present invention, when the conductive bumps are exposed, the number of processes increases, but it has the effect of being able to cope with high-density packaging, as in the case where the conductive bumps are not exposed. The conduction stability between the wirings is further improved as compared with the case where the conductive bumps are exposed. When the conductive bump is exposed, the film thickness of the insulating film is reduced by evaporating at least a part of the solvent of the fluid film. Thereby, a step of protruding the tip of the conductive bump onto the insulating film is added. The resin compounding liquid remains at the tip of the conductive bump only by thinly applying the insulating resin compounding liquid on the conductive bump. The conductive bump can be exposed with good reproducibility by applying the resin compounding liquid thicker than the height of the conductive bump and evaporating the solvent.

Incidentally, in the present specification, the insulating coating before application of the resin blend solution and before the film thickness is reduced is referred to as a fluid coating. On the other hand, the insulating film before the initiation of the curing reaction is called the insulating uncured film while the film thickness is decreased. By this, they are distinguished from each other.

In the present invention, unlike the manufacturing method of protruding the tip of the conductive bump on the insulating film by penetration like B ² it, in the step of forming the insulating film around the conductive bump, mechanical pressure is applied to the conductive bump and the insulating film It does not. Therefore, the present invention can cope with high density of conductive bumps in terms of mechanical durability of the insulating film. It is also possible to reduce the diameter of the bottom surface of the conductive bump. In addition, it is possible to reduce the aspect ratio of the conductive bump. Therefore, the design margin of the conductive bump shape and the margin of the manufacturing conditions can be increased. Thus, the production yield of the multilayer wiring board is improved.

Here, the member for a multilayer wiring board of the present invention is characterized in that it is an insulating uncured film obtained by sufficiently wetting the periphery of the conductive bump by casting a resin dissolved in a solvent around the bump group, followed by drying / solidifying. Therefore, the conductive bump and the resin have a close contact structure. On the other hand, a conventional insulating resin in B ² it, for example, is a solid sheet in which a solvent called a B stage is generally evaporated. In B ² it, this solid sheet is softened by heat so that the conductive bump penetrates the sheet. In this method, the penetration is a perforation due to an intractable fracture. Therefore, a gap may be formed around the bumps. Therefore, the adhesion reliability between the conductive bump and the resin is lowered compared with the present invention.

(Dispersion of insulating filler)

The inventors of the present application have found that it is extremely effective to disperse an insulating filler in an interlayer insulating film of a multilayer substrate in order to solve the above-described problem of interlayer interconnection connection defect due to warping of the substrate.

The multilayer wiring board according to the present invention comprises a conductive bump group formed between the first conductor layer and the second conductor layer and an insulating layer formed around the conductive bump group and including an insulating filler for stabilizing conductivity . The average particle diameter of the insulating filler is preferably in the range of 20% or more and 100% or less of the average height of the conductive bump group after laminated hot pressing.

8 (a) is a cross-sectional view of a multilayer wiring board according to the present invention. The core substrate 201 and the core substrate 207 are laminated via the insulating resin layer 204 in which the insulating filler 205 is dispersed. The wiring on the core substrate 201 side and the wiring on the core substrate 207 side are arranged to face each other. Some of the wiring regions are electrically connected through the conductive bumps 203. In the core substrate, for example, there is a large warp in a shape protruding from the central portion. Therefore, the distance between the core substrates at the periphery of the core substrate is large. Therefore, in order to realize the interlayer connection at the peripheral portion of the substrate, the core substrate must be brought close enough. When the insulating filler is not dispersed, as shown in Fig. 8 (b), the wiring in the central portion of the substrate is short-circuited. According to the manufacturing method of the present invention, the insulating resin layer 204 is dispersed in the insulating filler such as silica, which is hardly deformed by pressing. Therefore, as shown in Fig. 8 (a), shorting of the wiring is unlikely to occur even at the central portion of the substrate.

As described above, the multilayer wiring board according to the present invention is characterized in that the insulating layer including the insulating filler for short circuit prevention is a constituent element. This 'short-circuit prevention insulating layer' not only prevents short-circuit between a plurality of conductors but also prevents short-circuit continuity caused by conductive bumps used for electrical connection between layers in the multilayer wiring board, For the purpose of securing the thickness of the insulating layer.

(Thin film process and thick film process)

In general, the processing techniques used in the manufacture of multilayer wiring boards are classified as thin film processes and thick film processes.

The thin film process is a processing technology centered on vacuum process or wet process. Examples of the film forming technique used in the thin film process include vapor deposition, sputtering, CVD, PVD, plating and the like. Examples of the pattern forming technique include photolithography and dry etching. As for a wiring board called a wiring board or a printed wiring board, a thin film process such as a semiadditive method has generally been used for processing a fine wiring / space width of 50 μm / 50 μm or less. According to this process, fine pattern processing is possible. However, there is a problem that the manufacturing cost is high in this process.

On the other hand, the thick film process is typically a processing technique centered on printing such as screen printing. The thick film process is a dry process and a process under the atmosphere. The thick film process is characterized in that the manufacturing cost can be reduced compared to the thin film process.

For example, in order to fabricate a multilayer wiring board having a wiring density of 100 占 퐉 or less and having a high wiring density, it is necessary to set the bottom diameter of the projecting conductive bump, which is an interlayer connection via, to 100 占 퐉 or less. However, in the conventional production method of penetrating the prepreg sheet of the insulating resin through the conductive bumps, the thickness of the prepreg at the development is at least 30 탆 or more. In order to stably penetrate the thickness of the conductive bump by the conductive bump, it is necessary to make the height of the conductive bump at least about three times the thickness of the prepreg. Therefore, in order to miniaturize the diameter of the conductive bump, it is necessary to increase the aspect ratio of the conductive bump, and formation of the minute conductive bump of 100 탆 or less is extremely difficult. Conventionally, in order to realize a high-density wiring board having a via diameter and a wiring width of 100 mu m or less, a thin film process (for example, formation of a fine wiring pattern according to the semiadditive method, Formation of a minute via according to the photovia method has been used.

(Organic wiring board)

Generally, the multilayer wiring board is classified into an organic wiring board and an inorganic wiring board by a substrate material. The present invention is directed to an organic wiring board using an organic material as a material of an insulating substrate.

(Definition of Terminology for Insulating Layer and Conductor Layer)

In the present specification, terms relating to an insulating layer are defined as follows.

A liquid in which the insulating resin is dissolved in a solvent is referred to as an " insulating resin blend liquid ". The film obtained by applying this insulating resin compounding liquid onto a member and then volatilizing the solvent is called an " insulating uncured film ". The film obtained by heating the insulating uncured coating film and curing the resin contained in the insulating uncured coating film is referred to as an " insulating film. &Quot; The insulating film in a state of being laminated on a conductor layer or a core substrate is called an " insulating layer ".

The term "conductor layer" refers to a layer having high conductivity such as metal, and includes, for example, a conductor pattern layer, a planarization layer, and a conductor pad layer.

[Multi-layer wiring board member and manufacturing method thereof according to the embodiment of the present invention]

(First Specific Example of Manufacturing Method of Multilayer Wiring Board Member)

1 (a) to 1 (d) are cross-sectional views showing the steps of the first embodiment in accordance with the embodiment of the method for manufacturing a multilayer wiring board member of the present invention. First, a conductive foil 1 such as a copper foil is prepared (Fig. 1 (a)). Then, conductive bumps 2 are formed at predetermined positions on the conductive foil 1 (Fig. 1 (b)). It is preferable that the shape of the conductive bump 2 is a shape having a diameter smaller than the diameter of the bottom portion, such as a substantially conical shape or a substantially cylindrical shape. The conductive bump is formed, for example, by screen printing of a conductive paste. As the conductive paste to be the material of the conductive bump 2, for example, those obtained by dispersing metal particles (silver, gold, copper, solder, etc.) in a liquid resin and mixing the volatile solvent as necessary are used. The conductive bumps are printed so as to have a predetermined shape and a predetermined height. If necessary height can not be obtained in one screen printing, repeated printing may be performed while changing the shape of the mask if necessary. Next, a liquid coating film 3 is formed by coating an insulating resin compound liquid in which the insulating filler 4 is dispersed on and around the conductive bump 2 (Fig. 1 (c)). Subsequently, the fluid coating 3 is dried to evaporate the solvent. Thus, an insulating uncured film 5 is obtained. As a result, a wiring board member to be a component of the multilayer wiring board is completed (Fig. 1 (d)). 1 (d), in the first specific example, the insulating uncured film 5 is thicker than the conductive bump 2. This indicates that, in the step of FIG. 1 (d), it is not necessary to expose the conductive bump.

(Second Specific Example of Manufacturing Method of Multilayer Wiring Board Member)

Figs. 2 (a) to 2 (d) are cross-sectional views showing the steps of the second embodiment of the method for manufacturing a multilayer wiring board member of the present invention. First, a conductive foil 11 such as a copper foil is prepared (Fig. 2 (a)). Next, conductive bumps 12 are formed at predetermined positions on the conductive foil 11 (Fig. 2 (b)). It is preferable that the conductive bumps 12 have a shape such as a truncated cone, a substantially cylindrical shape, or the like, and the diameter of the distal end section is smaller than the diameter of the bottom. The conductive bump is formed, for example, by screen printing of a conductive paste. As the conductive paste to be the material of the conductive bumps 12, for example, those obtained by dispersing metal particles (silver, gold, copper, solder or the like) in a liquid resin and mixing the volatile solvent as necessary are used. The conductive bumps are printed so as to have a predetermined shape and a predetermined height. In a case where a necessary height is not obtained in one screen printing, it is also possible to perform repetitive printing while changing the shape of the mask as necessary. Next, a liquid coating film 13 is formed by coating an insulating resin mixture liquid in which the insulating filler 14 is dispersed on and around the conductive bumps 12 (Fig. 2 (c)). Next, a predetermined amount of volatile components contained in the fluid coating film 13 is evaporated, for example, by heating in a drying furnace. Thereby, the film thickness of the fluid coating film 13 is reduced to obtain the insulating uncured film 15. As a result, a wiring board member to be a component of the multilayer wiring board is completed (Fig. 2 (d)). At this time, the amount of the volatile component contained in the insulating resin blend liquid and the heating conditions are adjusted so that the film thickness of the fluid coating film 13 decreases, and as a result, the front end of the conductive bump 12 is exposed.

(Third Specific Example of Manufacturing Method of Multilayer Wiring Board Member)

3 (a) to 3 (i) are cross-sectional views showing the steps of the third embodiment of the method for manufacturing a multilayer wiring board according to the present invention. First, a conductive foil 21 such as a copper foil is prepared (Fig. 3 (a)). Then, conductive bumps 22 are formed at predetermined positions on the conductive foil 21 (Fig. 3 (b)). The conductive bump 22 preferably has a shape such as a truncated cone, a substantially cylindrical shape, or a shape in which the diameter of the distal end face is smaller than the diameter of the bottom. The conductive bump is formed, for example, by screen printing of a conductive paste. As the conductive paste to be the material of the conductive bumps 22, for example, those obtained by dispersing metal particles (silver, gold, copper, solder, etc.) in a liquid resin and mixing volatile solvents as necessary are used. The conductive bumps are printed so as to have a predetermined shape and a predetermined height. If necessary height can not be obtained in one screen printing, repeated printing may be performed while changing the shape of the mask if necessary. Next, a liquid coating film 23 is formed by coating an insulating resin mixture liquid in which the insulating filler 24 is dispersed on and around the conductive bumps 22 (Fig. 3 (c)). Subsequently, for example, by heating in a drying furnace, a predetermined amount of volatile components contained in the fluid coating film 23 is evaporated. Thereby, the film thickness of the fluid coating film 23 is reduced to obtain the insulating uncured film 25 (Fig. 3 (d)). At this time, the amount of the volatile component contained in the insulating resin mixture liquid and the heating conditions are adjusted so that the film thickness of the fluid film 23 decreases and as a result, the tip of the conductive bump 22 is exposed. By the heating in the film thickness reducing step, the fluidity of the insulating uncured coating film 23 is changed. Thus, the insulating coating 25 is formed. It is preferable that the heating condition of the insulating film 25 is adjusted to such an extent that the curing reaction starts but does not reach full curing. This makes it easy to handle the wiring board when the conductive pattern is formed on the back surface without deteriorating the adhesion when the insulating coating is laminated. Then, a protective film 26 is formed on the insulating film 25 and the conductive bump 22 with reduced film thickness by lamination (Fig. 3 (e)). The protective film 26 is made of an organic resin film (for example, krewrap, Pylen, nylon, PET, PPT, or PI) which is recessed by the tip of the conductive bump 22. The protective film 26 is formed in order to protect the conductive bumps 22 from deformation or damage during the printing of the conductive pattern on the rear side, which is a subsequent process. Then, a resist pattern is formed on the conductive foil 21 on the back surface of the insulating film 25 by, for example, photolithography. Subsequently, the conductive foil 21 is etched by wet etching using the resist pattern as a mask. Thus, the resist pattern is removed, wiring lines 27 are formed, and the protective film 26 is peeled off (FIG. 3 (g)). Subsequently, a liquid coating film 28 is formed by applying a liquid mixture of the insulating resin onto and around the conductive bumps 22 (Fig. 3 (h)). Subsequently, a predetermined amount of volatile components contained in the fluid coating 28 is evaporated, for example, by heating in a drying furnace. Thereby, the film thickness of the fluid coating film 28 is reduced to obtain the insulating uncured film 29. This completes the wiring board member (Fig. 3 (i)). The insulating coating 29 is an uncured coating. Therefore, the adhesion between the insulating coating 29 and the member to be laminated so as to contact the insulating coating 29 is improved.

[Detailed Description of Manufacturing Method, Material, etc.]

Best Mode for Carrying Out the Invention Hereinafter, a highly suitable manufacturing method, materials, and the like regarding the conductive bumps, the insulating film and the wiring constituting the multilayer wiring board member according to the embodiment of the present invention will be described in detail.

[Manufacturing method]

(Formation of conductive bump)

1. Adjustment process of conductive paste

The conductive paste to be used is adjusted by dissolving or dispersing the resin composition and the conductive particles in a solvent.

2. Printing and drying / solidification process of conductive paste

The conductive bumps are formed by, for example, a screen printing method. That is, the conductive bumps are formed by printing a conductive paste on a wiring board or a supporting substrate using a predetermined mask. In order to form the conductive bumps having a predetermined height and aspect ratio, printing may be performed a plurality of times using different masks as necessary.

(Formation of insulating film)

1. Preparation process of insulating resin blend liquid

The thermosetting resin composition is dissolved or dispersed in a solvent to adjust the liquid composition of the insulating resin. As the solvent, for example, an organic solvent is used. Examples of the organic solvent include a ketone solvent and an aromatic solvent. Examples of the former include methyl ethyl ketone and methyl isobutyl ketone, and the latter examples include toluene and xylene.

At the same time, the insulating filler is dispersed in the solvent. The insulating filler is preferably uniformly dispersed in the solvent. The addition amount of the insulating filler to the insulating resin composition is preferably 10 vol% or more.

Regarding the amount of the solvent used, it is preferable to adjust the content of the volatile component in the insulating resin mixed solution to be within an appropriate range in order to expose the conductive bump appropriately by evaporation of the solvent. For example, it is preferable to dilute the resin with a solvent such that NV (content of the nonvolatile resin component) is in the range of 10 wt% to 80 wt%. The viscosity of the insulating resin blend liquid is preferably in the range of 100 to 600 mPa 占 퐏. If the viscosity is too small, there arises a problem that the resin compounding liquid can not be applied because the resin compounding liquid flows down during application of the resin compounding liquid. If the viscosity is too large, there arises a problem that the flatness of the applied surface is deteriorated.

The epoxy resin and the oligophenylene ether resin used in the production of the insulating film of the multilayer wiring board according to the present invention are all solid at room temperature and exhibit a hot-rolling property at a temperature up to about 100 캜. The solid material in the form of powder or film is dissolved or dispersed in a solvent and heated as necessary to obtain a resin blend liquid (liquid). After the resin compounding liquid is applied to the substrate, it is dried and returned to room temperature. Thereby, the resin blend liquid changes into a film (solid). In the production of the multilayer wiring board according to the present invention, it is particularly preferable to use a combination of a solvent and a resin so that the drying / solidifying temperature stays in the range of 60 ° C or higher and 160 ° C or lower.

2. Coating Process of Insulating Resin Blend

The obtained insulating resin mixed solution is coated on a support having conductive bumps to form an insulating film. The coating method is not particularly limited. For example, it is preferable to use a doctor blade method, a curtain coater method, a micro gravure method, and a slot die method. In the coating step, it is preferable to coat the insulating film thicker than the conductive bump. If the thickness of the insulating film is reduced until the height of the conductive bump is thinner than the height of the conductive bump after coating the conductive bump to a height larger than the height of the conductive bump, the conductive bump can be uniformly exposed with good reproducibility.

3. Solvent Evaporation Process

The solvent evaporation process is not necessarily performed in the production of the multilayer wiring board member according to the present invention. However, it is possible to obtain higher wiring connection stability as compared with the case where solvent evaporation is not performed. More specifically, the coated insulating film is heated or naturally dried to evaporate the volatile component in the insulating film. This reduces the thickness of the insulating film. It is necessary to appropriately adjust the processing time for the predetermined temperature in accordance with the type of the solvent, the air flow rate of the dryer, the air flow rate, and the like. For example, the processing time for a predetermined temperature is set at about 80 to 120 DEG C for about 1 to 30 minutes.

(Laminated thermal press)

In the case of the batch lamination, a plurality of the wiring board members and the core board are laminated while aligning them as required. Thereafter, they are pressed under heating to form a multilayer wiring board. On the other hand, in the case of the sequential lamination, a plurality of wiring board members are stacked one by one on the core board while hot pressing is performed. The heating condition is preferably set to a temperature that is not higher than the heat-resistant temperature of the thermosetting resin constituting the multilayer wiring board, and is such that the thermosetting resin is completely cured. The conditions of the heating press can be appropriately set. It is preferable that the heating temperature is not more than the curing reaction initiation temperature of the insulating resin but not more than the temperature at which the thermal dissolution viscosity is lowered. It is preferable that the condition of the hot press be such that even when the insulating filler is present on the conductive bump, cracks do not occur in the conductive bump in the laminated hot pressing step, and sufficient electrical connection can be ensured. For example, this condition may be a temperature of 170 to 210 ° C and an actual pressure of 5 to 15 kgf / cm ² . In this laminated thermal press, the lowest melt viscosity of the uncured film can be relatively increased. Therefore, the resin does not flow in the hot press. Therefore, the thickness of the resin before and after curing can be made substantially constant. In addition, the uniformity of the thickness of the resin after curing can be improved.

[material]

(Conductive bump material)

As the resin composition constituting the conductive paste, it is preferable to use a thermosetting resin such as a phenol resin, an epoxy resin or a melamine resin. Since the thermosetting resin has fluidity, it can be easily molded. Therefore, the thermosetting resin can be mechanically hardened by heating and curing in a subsequent step.

As the solvent for dissolving or dispersing the resin composition, for example, an organic solvent is used. Examples of the organic solvent include aromatic solvents, for example, toluene, xylene, and ketone solvents. Examples of the ketone solvent include methyl ethyl ketone and methyl isobutyl ketone. As the conductive particles dispersed in the resin compounding liquid, it is preferable to use Ag, Cu, Au, or Ni, or a mixture of at least two or more thereof, or a compound thereof.

As a material of the resin composition constituting the conductive bump, it is preferable to use a material obtained by adding a thermoplastic resin to the thermosetting resin at a mixing ratio of 10 wt% or more and 30 wt% or less. It is possible to obtain an effect of suppressing the occurrence of cracks in the conductive bumps in the lamination hot pressing step of the multilayer wiring board.

(Insulating film material)

BACKGROUND ART In recent years, in the highly information-oriented society, speeding up of the operating frequency of electronic devices is progressing year by year in order to transmit a large amount of information at a high speed. As for the multilayer wiring board mounted on an electronic device, it is required to use a material having a low dielectric constant and a low dielectric loss as a material of the insulating film constituting the wiring board.

In addition, with the downsizing and thinning of electronic devices, it is required to reduce the thickness of the wiring board. Therefore, it is preferable that the material of the insulating coating is a material which has high reproducibility and is capable of forming a thin insulating coating. Further, in order to reduce the manufacturing cost, it is preferable to use a material capable of being thinned even when a thick film process is used.

As the material of the insulating member in the production of the multilayer wiring board of the present invention, it is preferable to use a thermosetting resin having a low dielectric constant and a low dielectric tangent. For example, epoxy resin, bismaleimide triazine resin, polyimide resin, , A phenol resin, an oligophenylene ether resin, a polyether resin, and a melamine resin.

As the material of the thermosetting resin, a material that satisfies any of the following conditions: the relative dielectric constant after curing is in the range of 2.0 to 3.0 at 5 GHz, or the dielectric loss tangent is in the range of 0.001 to 0.005 at 5 GHz .

≪ Epoxy resin &

As the thermosetting resin composition, an epoxy resin composition described in International Publication No. 2005/100435 can be suitably used. Specifically, the epoxy resin composition comprises a linear epoxy resin (A) having a weight average molecular weight of 1,500 to 70,000, which has at least one hydroxyl group and at least two epoxy groups, and at least part of the phenolic hydroxyl group is esterified (B), which is obtained by subjecting the modified phenol novolak to a polymerization reaction. In this epoxy resin composition, the content of the modified phenol novolak (B) is 30 to 200 parts by weight based on 100 parts by weight of the linear epoxy resin (A). This epoxy resin composition has excellent dielectric properties (for example, low dielectric constant and low dielectric loss tangent).

The weight average molecular weight of the linear epoxy resin (A) is 1,500 to 70,000.

The number average molecular weight of the linear epoxy resin (A) is preferably from 3,700 to 74,000, more preferably from 5,500 to 26,000.

The epoxy equivalent of the linear epoxy resin (A) is preferably 5000 g / eq or more.

In the present specification, the weight average molecular weight and the number average molecular weight are values obtained by gel permeation chromatography (GPC) using a calibration curve of standard polystyrene.

Particularly preferable linear epoxy resin (A) has a weight average molecular weight / number average molecular weight of 2 to 3.

As the linear epoxy resin (A), for example, a compound represented by the following formula (1) is preferable, and a compound represented by the following formula (2) is more preferable.

However,

X and Y each represent a single bond, a hydrocarbon group having 1 to 7 carbon atoms, -O-, -S-, -SO ₂ -, -CO-, or a group represented by the following formula: When there are a plurality of X and Y, these may be the same or different.

[Figure 2]

Wherein R ² is a hydrocarbon group of 1 to 10 carbon atoms or a halogen atom. When there are several R ^{2 s} , these may be the same or different. R ³ is a hydrogen atom, a hydrocarbon group of 1 to 10 carbon atoms or a halogen atom. q is an integer of 0 to 5;

In the formulas (1) to (2), R ¹ and R ⁴ are each a hydrocarbon group of 1 to 10 carbon atoms or a halogen atom. When there are several R ¹ and R ^4, they may be the same or different.

p and s are each an integer of 0 to 4; These may be the same or different.

In the above formula (1), n represents an average value. This n is 25 to 500.

In Equation (2), t represents an average value. This t is 10 to 250.

More preferably, the linear epoxy resin (A) is a compound represented by the formula (1) wherein p is 0, that is, a compound represented by the formula (1 ').

[Figure 3]

Wherein X and n are the same as X and n in the formula (1), respectively.

The above-mentioned straight-chain epoxy resin (A) may be used alone. Two or more kinds of linear epoxy resins (A) may be used in combination.

As a very suitable example of the modified phenol novolak (B) obtained by fatty acid esterification of at least a part of the phenolic hydroxyl group, for example, the modified phenol novolak represented by the following formula (3) can be mentioned.

[Figure 4]

In the formula (3), R ⁵ represents an alkyl group having 1 to 5 carbon atoms. R ⁵ is preferably a methyl group. The plurality of R ⁵ may be the same or different.

R ⁶ represents an alkyl group having 1 to 5 carbon atoms, a phenyl group which may have a substituent, an aralkyl group which may have a substituent, an alkoxy group or a halogen atom. The plural R < ⁶ > s may be the same or different.

R ⁷ represents an alkyl group having 1 to 5 carbon atoms, a phenyl group which may have a substituent, an aralkyl group which may have a substituent, an alkoxy group or a halogen atom. The plural R < ⁷ > s may be the same or different.

and g represents an integer of 0 to 3. The plurality of g may be the same or different.

and h represents an integer of 0 to 3. The plural h may be the same or different.

n: m is 1: 1 to 1.2: 1, and preferably about 1: 1.

The sum of n and m may be, for example, 2 to 4.

In the above formula (3), n and m are average values of repeating units. The order of repeating units is not limited. This order may be block or random.

As the preferred modified phenol novolak (B), modified phenol novolak represented by the following formula (3 ') may be mentioned.

[Figure 5]

In the formula (3 '), R ^5, n and m are each the same as R ^5, n and m in the formula (3).

Particularly preferred modified phenol novolacs are acetylated phenol novolacs wherein R ⁵ in the formula (3 ') is a methyl group.

Such modified phenol novolak may be used alone. Two or more kinds of modified phenol novolak may be used in combination.

The content of the component (B) is preferably 30 to 200 parts by weight based on 100 parts by weight of the component (A). When the content of the component (B) is within this range, excellent dielectric properties, film formability, and curing reactivity are obtained. The content of the component (B) is more preferably 50 to 180 parts by weight based on 100 parts by weight of the component (A).

One of the preferred embodiments of the epoxy resin composition further includes (C) an isocyanate compound. When a hydroxy group is present in the epoxy resin, the hydroxy group or the hydroxyl group generated when the epoxy resin is ring-opened react with the isocyanate group in the isocyanate compound. Thereby, a urethane bond is formed. As a result, the crosslinking density of the polymer after curing is increased, the mobility of the molecule is further lowered, and the hydroxyl group having a larger polarity is decreased. Therefore, the dielectric constant can be lowered and the dielectric loss tangent can be lowered. Furthermore, epoxy resins have large intermolecular forces. For this reason, when the epoxy resin is made into a film, it is difficult to make film formation uniform. In addition, even if the epoxy resin is made into a film, the film strength is weak, and cracks tend to enter easily during film formation. However, by incorporating an isocyanate compound, such drawbacks can be eliminated.

Examples of the isocyanate compound include compounds having two or more isocyanate groups. Examples of the isocyanate compound include hexamethylene diisocyanate, diphenylmethane diisocyanate, tolylene diisocyanate, isophorone diisocyanate, dicyclohexylmethane diisocyanate, tetramethylxylene diisocyanate, xylene diisocyanate, naphthalene diisocyanate, (Isocyanate phenyl) tri (meth) acrylate such as trimethyl hexamethylene diisocyanate, tolylene diisocyanate, p-phenylene diisocyanate, cyclohexylene diisocyanate, dimer acid diisocyanate, hydrogenated xylene diisocyanate, lysine diisocyanate, triphenylmethane triisocyanate, Phosphate and the like. These may be used alone. Two or more of the above isocyanate compounds may be used in combination.

Of these, hexamethylene diisocyanate and diphenylmethane diisocyanate are preferably used.

The isocyanate compound includes a prepolymer having an isocyanurate ring formed by a cyclization reaction. For example, a prepolymer containing a trimer of an isocyanate compound is also included.

The isocyanate compound is preferably used in combination with the above-mentioned linear epoxy resin (A). In this case, in addition to the reaction between the hydroxy group and the isocyanate group generated by the ring-opening reaction of the epoxy resin, the hydroxyl group present in the linear epoxy resin (A) may react with the isocyanate group. Therefore, a larger effect can be obtained.

The content of the component (C) is preferably 100 to 400 parts by weight, more preferably 300 to 350 parts by weight, based on 100 parts by weight of the component (A). When the content of the component (C) is within this range, foaming that occurs upon curing is suppressed. Therefore, it is easy to obtain a uniform film, cracks are hardly generated after curing, and dielectric characteristics (for example, low permittivity and low dielectric loss tangent) are excellent.

One of the preferred embodiments of the epoxy resin composition further comprises (D) divinylbenzene. The inclusion of divinylbenzene contributes to lowering the melting temperature of the crosslinking component, improving the fluidity at the time of molding, lowering the curing temperature, and improving the compatibility.

The content of the component (D) is preferably 40 to 180 parts by weight based on 100 parts by weight of the component (A).

The epoxy resin composition may contain a curing accelerator as an optional component.

As the curing accelerator, a known curing accelerator of the epoxy resin composition can be used. As the curing accelerator, for example, heterocyclic compound imidazoles such as 2-methylimidazole and 2-ethyl-4-methylimidazole, phosphorus compounds such as triphenylphosphine and tetraphenylphosphonium tetraphenylborate, 2 , Tertiary amines such as 4,6-tris (dimethylaminomethyl) phenol and benzyldimethylamine, BBUs such as 1,8-diazabicyclo (5,4,0) undecene and its salts, amines, And adduct type accelerators in which adducts of dazols with epoxy, urea, and acid are listed.

The content of the curing accelerator to 100 parts by weight of the component (A) is preferably 1 to 10 parts by weight.

The epoxy resin composition may contain a polymerization initiator as an optional component.

As the polymerization initiator, known polymerization initiators can be used. Examples of the polymerization initiator include benzoyl peroxide, azobisisobutyronitrile, t-butyl peroxybenzoate, and 1,1,3,3-tetramethylbutylperoxy-2-ethylhexanoate. have.

The content of the polymerization initiator is preferably 1 to 10 parts by weight based on 100 parts by weight of the component (A).

The epoxy resin composition may contain additives such as a tackifier, a flame retarder, a defoaming agent, a flow control agent, and a dispersion aid, if necessary.

The epoxy resin composition may further contain (A) an epoxy resin composition, if necessary, for the purpose of improving the modulus of elasticity, lowering the expansion coefficient, or changing the glass transition temperature (Tg value) May contain an epoxy resin other than the above components.

Examples of the epoxy resin other than the component (A) include a bisphenol A type epoxy resin, a bisphenol F type epoxy resin, an alicyclic epoxy resin, and a biphenyl epoxy resin. These may be used singly or two or more kinds of epoxy resins may be used in combination.

The epoxy resin composition may contain a known epoxy resin curing agent such as phenol novolak, cresol novolak resin, phenol polynuclear resin, etc., which is not converted into a fatty acid ester, so long as the object of the present invention is not impaired.

Examples of the phenol polynucleer include phenols such as about 3 to 5 nuclei.

The above epoxy resin composition can be produced by a known method. For example, (A) and (B) can be mixed with a propeller stirrer, a Banbury mixer, a planetary mixer, a heated vacuum mixing kneader or the like in the presence or absence of a solvent.

In addition, for example, resin components may be dissolved in a predetermined solvent concentration, and they may be put into a reaction kettle heated to 25 to 60 占 폚 and mixed at a normal pressure for 30 minutes to 6 hours. Thereafter, mixing and stirring can be further carried out under vacuum (maximum 1 Torr) for 5 minutes to 60 minutes.

<OPE resin>

As the thermosetting resin composition, an oligophenylene ether resin compound combination can also be suitably used. Specifically, the component (A) is an oligophenylene ether having a thermosetting number average molecular weight of 1000 or more and 3000 or less and a functional group at both terminals. The component (B) is a block copolymer including a hard segment block mainly composed of a vinyl aromatic hydrocarbon and a soft segment block composed mainly of a conjugated diene. The solvent for the insulating resin composition liquid in which the solvent is blended is hardened And an oligophenylene ether-based resin blend obtained by volatilization so that no reaction occurs.

Here, in the liquid composition for insulating resin, (B) is 67 parts or more and 150 parts or less with respect to 100 parts of component (A). Further, the component (B) of the insulating uncured film may be at least one thermoplastic elastomer selected from a rubber and / or a styrene-butadiene-styrene block copolymer, a styrene-isoprene-styrene block copolymer, and a styrene-ethylene / butadiene- to be.

Examples of the thermosetting resin used in the thermosetting resin composition include a thermosetting oligophenylene ether resin or an epoxy resin having functional groups such as a styrene functional group, a vinyl group, a glycidyl group, an amino group, a hydroxyl group and a carboxyl group at both terminals . Among these, thermosetting oligophenylene ether resins or epoxy resins having styrene functional groups at both terminals are preferable because they have excellent dielectric properties (for example, low dielectric constant, low dielectric loss tangent), low water absorption, and film formability.

The thermosetting resin composition is preferably an oligophenylene ether resin composition described in the specification of Japanese Patent Application No. 2006-215464 filed by the applicant of the present application. Specifically, for example, a thermosetting oligophenylene ether (A) having a number average molecular weight of 500 to 5,000 and a styrene functional group at both terminals of 100 parts by weight, a repeating unit derived from 50 to 250 parts by weight of a vinyl aromatic hydrocarbon monomer Since the thermosetting resin composition containing the block copolymer (B) containing a repeating unit derived from a conjugated diene monomer has excellent dielectric properties (for example, low dielectric constant, low dielectric loss tangent), low elasticity and film formability, It is very suitable.

Examples of the thermosetting oligophenylene ether (A) include 2,2 ', 3,3', 5,5'-hexamethylbiphenyl-4,4'-diol described in JP-A-2006-28111 -2,6-dimethylphenol polycondensate and chloromethylstyrene.

The thermosetting oligophenylene ether (A) can be prepared by a known method. Commercially available products may also be used. For example, OPE-2st 2200 (manufactured by Mitsubishi Gas Chemical) can be suitably used.

When the number average molecular weight of the thermosetting oligophenylene ether (A) exceeds 5,000, it is difficult to dissolve in the volatile solvent. On the other hand, if the number average molecular weight is less than 500, the crosslinking density becomes excessively high, so that the modulus of elasticity and the aging property of the cured product are adversely affected. Therefore, the thermosetting oligophenylene ether (A) has a number average molecular weight of 500 to 5,000, preferably 1,000 to 3,000.

The block copolymer (B) is a block copolymer comprising a hard segment block composed mainly of a vinyl aromatic hydrocarbon and a soft segment block composed mainly of a conjugated diene.

Examples of the block copolymer (B) include a styrene-butadiene-styrene block copolymer, a styrene-isoprene-styrene block copolymer, and a styrene-ethylene / butadiene-styrene block copolymer.

The block copolymer (B) can be produced by a known method. Commercially available products may also be used. For example, TR2003 (manufactured by JSR Corporation) can be suitably used.

The content of the block copolymer (B) in the thermosetting resin composition is 50 to 250 parts by weight, preferably 65 to 200 parts by weight, more preferably 80 to 150 parts by weight per 100 parts by weight of the thermosetting oligophenylene ether (A) It is more desirable to be negative. When the content of the block copolymer (B) is within this range, the film formability and compatibility with the thermosetting oligophenylene ether (A) are improved.

Examples of the volatile solvent used in the oligophenylene ether resin composition include aromatic solvents such as toluene and xylene; and ketone solvents such as methyl ethyl ketone and methyl isobutyl ketone. These may be used singly. Two or more kinds of volatile solvents may be used in combination.

The content of the volatile solvent may be appropriately adjusted so that the viscosity of the composition is in the above range, and is not particularly limited. The volatile solvent is preferably used in an amount of 15 to 45% by weight, and more preferably 15 to 35% by weight. When the ratio of the resin component in the composition is within this range, it becomes easy to impregnate the fibrous substrate. Therefore, air bubbles can be reduced. With such a low-concentration resin, the conventional vertical impregnation apparatus must have a large amount of varnish adhered thereto in order to obtain a desired resin adherence amount. Then, when the substrate advances in the vertical direction, the impregnated resin is stretched. Because of this, uneven vertical stripes are formed, and thus, uneven resin spots are formed. In addition, although the solvent remains in the coating film, only the surface is dry. Therefore, a uniform uncured state can not be obtained.

The oligophenylene ether resin composition may contain additives such as an inorganic filler, a tackifier, a flame retardant, a defoaming agent, a flow control agent, a film forming auxiliary agent, and a dispersion auxiliary agent to the extent that the effect of the present invention is not impaired.

The oligophenylene ether resin composition may contain a curing catalyst. The oligophenylene ether resin composition can be cured only by heating.

The production method of the oligophenylene ether resin composition is not particularly limited and may be a known production method. The above-mentioned oligophenylene ether resin composition can be produced, for example, by thoroughly mixing the above-mentioned respective components with a stirrer.

<ADFLEMA>

As the insulating resin, for example, ADFLEMA (trade name, manufactured by Nemix Co., Ltd.) is preferably used. ADFLEMA is a resin containing an oligo-phenylene ether, which is one type of OPE resin, and a styrene-butadiene-based elastomer. The ADFLEMA product is an uncured film. However, the relative permittivity and dielectric constant? When it is thermally cured are 2.0 to 3.0 and dielectric tangent tan? = 0.001 to 0.005, all of which are small values. Because of this, ADFLEMA products have excellent high-frequency characteristics. In the ADFLEMA product, it is possible to form a thin film having a thickness of about 2 to 90 mu m. ADFLEMA products also contain about 70% volatile solvents. For this reason, by coating or heating or drying, the film thickness of the ADFLEMA product can be reduced by, for example, 70%. Therefore, the ADFLEMA product is very suitable for the production of the multilayer wiring board of the present invention including the exposure process of the conductive bump by the film thickness reduction.

&Lt; Fibrous base material included in insulating resin &

It is preferable that the insulating resin used in the member for a multilayer wiring board of the present invention does not include a fiber substrate. In this case, since the insulating resin blend liquid does not contain the fiber base, the viscosity of the blend liquid can be reduced. As a result, the coverage around the conductive bumps and the surface of the substrate becomes high. Further, in the film thickness reducing step, the residue of the compounding liquid in the head portion of the conductive bump can be reduced. On the other hand, it is extremely difficult to obtain a uniform dispersion slurry by blending a fiber base material such as glass fiber chopped into the insulating resin blend liquid. Moreover, even if it does occur, it is inevitable that the bridge of the fiber amplifier is formed at the top of the conductive bump at the time of application. Incidentally, introducing a glass fiber base material having a low dielectric property can not be compatible with the effect obtained by the present invention.

&Lt; Insulating filler &

The insulating filler used in the member for a multilayer wiring board of the present invention is characterized in that it has a high electrical insulating property, is not deformed by a laminated thermal press, has a strength capable of maintaining interlayer insulation of a multilayer wiring board, And it is preferably formed from a dispersing material. As the material of the insulating filler, it is preferable to use, for example, one or a plurality of materials selected from silica, silicon carbide, alumina, aluminum nitride, zirconia beads, glass beads and acrylic beads.

The insulating filler is preferably powdery or particulate. The average particle diameter of the insulating filler is preferably 20% or more of the conductive bump height, preferably 100% or less, and more preferably 50% or less of the bottom diameter of the conductive bump.

(Wiring material)

As for the wiring of the multilayer wiring board, the conductive pattern may be formed by etching a conductive foil, or a conductive pattern may be formed by printing a conductive paste.

As the resin composition constituting the conductive paste, it is preferable to use a thermosetting resin such as phenol resin, epoxy resin, or melamine resin. The thermosetting resin has fluidity and can be easily molded, and it is possible to provide mechanical strength by heating and curing in a subsequent step.

As the solvent for dissolving or dispersing the resin composition, for example, an organic solvent is used. Examples of the organic solvent include aromatic solvents, for example, toluene, xylene, and ketone solvents. Examples of the ketone solvent include methyl ethyl ketone and methyl isobutyl ketone. As the conductive particles dispersed in the resin mixture liquid, it is preferable to use any one of Ag, Cu, Au, and Ni, or a mixture of at least two or more thereof, or a compound thereof.

The conductive paste may be prepared by, for example, dispersing conductive particles (for example, any one of Ag, Cu, Au, Ni, or a mixture of at least two thereof) in a resin and further mixing a volatile solvent And the like.

&Lt; Thermal curing type conductive paste &

It is also possible to use a thermosetting conductive paste as the wiring material. In this case, it is possible to form a wiring having a sufficiently low resistance even in a low-temperature heat treatment at 100 to 200 ° C. In the case of using the thermosetting conductive paste, the thickness of the wiring is preferably in the range of 1 to 20 mu m.

&Lt; Conductive paste containing silver fine particles &

The conductive paste disclosed in Patent Document 3 may be used as the conductive paste material. The conductive paste (material) containing silver fine particles disclosed in Patent Document 3 is prepared by mixing a silver salt of carboxylic acid and an aliphatic amine in the presence or absence of an organic solvent, adding a reducing agent, And is recovered from the reaction product obtained by the above method.

The silver fine particles contained in the conductive paste are,

(a) the primary particles have an average particle diameter of 40 to 350 nm,

(b) the crystallite diameter is 20 to 70 nm, and

(c) the ratio of the average particle diameter to the crystallite diameter is preferably 1 to 5.

Further, the silver fine particles contained in the conductive paste may be,

(a) the primary particles have an average particle diameter of 50 to 80 nm,

(b) the crystallite diameter is 20 to 50 nm, and

and (c) the ratio of the average particle diameter to the crystallite diameter is 1 to 4.

This conductive paste material exhibits sufficiently high conductivity even at a low temperature of 200 DEG C or less. This conductive paste material can be cured even at a low temperature below the heat resistance temperature of the organic wiring board, and a conductive pattern having a relatively low conductor resistance (about 10 x ^10-5 ? Cm or less) can be formed despite the low temperature curing. Therefore, it is possible to suppress or reduce an increase in wiring delay even if the film thickness of the wiring is made thin and the wiring width is made narrow. Since the particle diameter is small, clogging is unlikely to occur even when screen printing is performed on the fine lines. The particle diameter of the conductive paste material is larger than the particle diameter of the conductive paste containing other conductive fine particles (for example, a conductive paste containing nanoparticles). Therefore, this conductive paste material is very suitable for forming wiring with a thickness of 1 탆 to 10 탆. Further, by using this conductive paste material, it is possible to suppress the material cost to a lower level. In the case of using the conductive paste disclosed in Patent Document 3, the thickness of the wiring is preferably 5 占 퐉 or less.

[Degree of hardening]

(Degree of hardening of conductive bump)

In the middle of the manufacturing process, the curing state of the conductive bump and the insulating film constituting the multilayer wiring board member can be selected from the following combinations.

(1) Conductive bump: fully cured state, insulating film: uncured state

(2) Conductive bump: intermediate state between uncured and completely cured, insulating film: uncured state

 Here, the 'intermediate state between uncured and fully cured' is a resin state which is hardened to some extent but not completely hardened by an appropriate heat treatment.

In the insulating film in the conventional B ² it technology, the insulating film in a cured state, which is generally called a B stage, is softened by heat, and the conductive bumps are penetrated through the insulating film. In this technique, vias are formed by the penetration of conductive bumps. For this reason, the conductive bumps require an aspect ratio of at least a predetermined value. Further, the conductive bumps need to have a hardness of at least a predetermined value. For this reason, it is necessary to make the conductive bump completely cured.

However, the technique of the present invention does not perform the penetration of the conductive bump. In this technique, an insulating film is formed on a conductive bump and a film thickness of the insulating film is reduced to form an insulating uncured film. Thereafter, the conductive bump and the second conductor layer or the core substrate are bonded. Therefore, the hardness of the conductive bump does not need to be as much as necessary for the through-hole method. It is sufficient that the hardness of the conductive bump can maintain its shape to some extent. The hardness of the conductive bump can be set to a completely cured state or an intermediate state between uncured and fully cured state. The insulating uncured film is uncured in the present invention, and strictly speaking, at least the surface of the insulating uncured film is uncured. The hardness of each member can be controlled to an arbitrary hardness by controlling the treatment temperature or the treatment time in a process such as drying or heating after printing or coating. Optimum conditions such as temperature and time vary depending on the material of the member. The optimum condition for each specific material can be obtained by experiment or the like in advance.

Examples of the concrete hardness of the conductive bump are shown below.

In order to penetrate the prepreg, the conventional conductive bump needs to be in a completely cured state at the stage of the penetration step (temperature condition: 80 ° C to 120 ° C). It was necessary that the hardness of the conductive bump was 35 to 40.

According to the technique of the present invention, when the conductive bumps are in an intermediate state between uncured and fully cured, conductive bumps made of a material having a glass transition temperature of, for example, 110 to 140 DEG C are used, 15 to 30.

The effect of bringing the conductive bump into an intermediate state between uncured and fully cured is as follows.

1. The adhesion between the conductive bump and the wiring pattern contacting the conductive bump and the conductivity are superior to the case where the conductive bump is completely cured. When the conductive bump is not in the fully cured state, plastic deformation of the conductive bump tends to occur under a predetermined heating condition in the laminated press process. As a result, the adhesion between the conductive bump and the wiring member contacting the conductive bump improves. At the same time, since the contact area is increased, the via resistance is reduced and the reliability of the electrical connection is improved. At the same time, the binder component in the conductive paste forming the conductive bump is compressed and pushed into the insulating uncured film. Therefore, the connection between the conductive particles dispersed in the conductive paste and the wiring member contacting the conductive bump becomes strong. For this reason, the conductive particles are densified. Thereafter, contraction causes the conductive particles in the conductive bumps to be rearranged, and as a result, the conductivity is further improved.

2. In the multilayer press process, it is possible to form a multilayer wiring board at a much lower pressing pressure than in the past. As a result, the warp caused on the member is reduced. This improves the reliability of the member.

3. The manufacturing method of the present invention forms an insulating uncured film by reducing the film thickness of the insulating resin blend liquid. Thereafter, the conductive bump and the second conductor layer or the core substrate are bonded. Therefore, a force that seems to penetrate through the prepreg as in the prior art is not applied to the conductive bump. Also, by setting the drying / solidifying temperature condition for reducing the film thickness to a range that does not affect the curing state of the conductive bump, the shape immediately after printing in the conductive bump is stably maintained.

4. When the conductive bump and the wiring pattern are brought into close contact with each other, the tip of the conductive bump is plastically deformed smoothly.

The hardness of the conductive bump was measured at a test temperature of 23 占 폚, a test load of 25 Kgf, and a load holding time of 15 seconds in a microhardness meter MXT50 (Matsuzawa Seiki).

(Degree of curing of insulating film)

In the method for manufacturing a multilayer wiring board of the present invention, the insulating film formed around the conductive bump in the middle step is in a state before curing, which is called &quot; uncured &quot;. It is preferable to control the heating conditions so that the insulating film is in a state called &quot; completely cured &quot; or &quot; cured &quot; in the hot pressing step.

The epoxy resin system or the OPE resin system which is very suitable as the material of the insulating film in the multilayer wiring board member of the present invention specifically refers to the material described in paragraph (0026) or (0027) of the present specification. When the insulating film is an epoxy resin system, the insulating film has a degree of curing intermediate between "uncured" and "completely cured" under a heating condition of 130 to 180 ° C. for 10 minutes to 1 hour. When the insulating film is an oligo-phenylene ether resin system, the insulating film has a degree of curing intermediate between "uncured" and "completely cured" under heating conditions of 130 to 200 ° C. and 10 minutes to 1 hour. The insulating cured coating in this state is referred to as an &quot; insulating uncured coating &quot; in the specification of the present application. When the film is heated at a lower temperature or a shorter time than the heating condition, the insulating film is in an uncured state. When heated to a higher temperature or a longer time than such a heating condition, the insulating film becomes more fully cured. For example, in the case of an oligophenylene ether resin system, even if heating is carried out at 160 ° C, if the heating time is about 5 minutes, the curing reaction is insufficient. For this reason, the insulating film maintains a state close to uncured.

When the insulating film is formed as an uncured film, the adhesion strength between a member formed in contact with the insulating film (for example, a conductive film such as a conductive pattern or an insulating film of an upper layer or a lower layer) and the insulating film are strengthened. The reason for this is that the insulating film is a resin having a low molecular weight before crosslinking, and therefore, both are in contact with each other in a state of having heat fluidity, and as a result, the insulating film is wetted to the adherend. As a result, there is an effect that the wiring becomes difficult to peel off and the wiring board becomes strong. In addition, since the degree of hardening is low, it is possible to fill the irregularities due to the mounting parts of the base without gaps. A high effect can be obtained also in the planarization of the surface of the wiring board.

On the other hand, the uncured coating film has a low mechanical strength. For this reason, for example, when a conductive pattern is formed on a coating film by printing, there is a possibility that handling is not easy. In such a case, it is preferable to heat the coating on the side where the conductive pattern is formed under appropriate conditions, and to laminate the uncured coating film thereon after changing the coating to a fully cured state. By laminating the uncured film and the fully cured film, the adhesion and flatness can be improved. Further, the workability in the conductive pattern processing step can be improved.

For example, in the epoxy system of the present invention, depending on the application, the heat fluidity is excessively high. For this reason, in the previous step, it is preferable to increase the flow viscosity by slightly accelerating the heating and hardening (after pre-baking) and press laminate.

[Shape of member, size parameter]

(Definition of size parameter)

12 (a) to 12 (c) are diagrams for explaining the definition of the size parameter according to the multilayer wiring board member of the present invention.

12 (a) is a cross-sectional view of a multilayer wiring board member obtained by forming a fluidic coating 222 on a conductive bump 221 by coating. 12 (b) and 12 (c) are cross-sectional views of the multilayer wiring board member obtained by forming the insulating uncured coating 223 by reducing the thickness of the fluidic coating 222. FIG. Exposure of the conductive bump typically exposes the head of the conductive bump, as shown in Figure 12 (b). However, in the worst case, as shown in Fig. 12 (c), an insulating film remains on part of the head of the conductive bump.

Here, t1 is the thickness of the fluid coating 222. and t2 is the thickness of the insulating uncured film 223. and h1 is the thickness of the conductive bump 221. A1 is the diameter of the bottom surface of the conductive bump (diameter of the bottom surface). and? 1 is a central angle of the upper end surface of the conductive bump 221. In the worst case shown in Fig. 12C, Sb1 is the bottom area of the bump, and Se1 is the exposed area of the conductive bump 221 in the head of the conductive bump. The exposed area ratio of the conductive bump to the bottom area is defined as Se1 / Sb1 x 100 (%).

 Though not shown, the height of the conductive bump after laminated hot pressing is defined as h2, and the thickness of the insulating layer after laminated hot pressing is defined as t3. t3 is preferably 5 mu m or more.

(The shape of the conductive bump)

It is preferable that the shape of the conductive bump is such that the diameter of the distal end section is smaller than the diameter of the bottom section. This shape is preferably, for example, a conical shape, a substantially truncated conical shape, or a mountain shape. It is preferable that the shape of the top surface of the conductive bump is a gentle arc having a center angle &amp;thetas; 1 of 180 DEG or less. Here, the tip end section of the conductive bump is a horizontal section of the conductive bump when the tip of the conductive bump is disposed on the top. The top surface of the conductive bump is a vertical cross section of the conductive bump. In the method for manufacturing a multilayer wiring board of the present invention, since the conductive bump need not penetrate the prepreg, the conductive bump need not have a sharp tip. By making the tip end of the conductive bump a gentle arc, the sectional area of the via can be increased, and the via resistance can be reduced.

When the upper surface of the conductive bump is formed as an arc having a central angle exceeding 180 degrees, the tip of the conductive bump becomes a recessed shape. For this reason, the insulating uncured resin remains in the groove portion. For this reason, inconveniences such as connection failure of the via and increase of the via resistance occur. In the multilayer wiring board member of the present invention, the upper surface of the conductive bump has a gentle circular arc shape having a central angle of 180 DEG or less. Therefore, the insulating uncured resin is not left at the tip of the conductive bump. Therefore, it is effective to reliably connect the vias and reduce the via resistance. Further, the tips of the conductive bumps are not sharp. Therefore, even if a batch laminated thermal press is performed, the tip of the via is not broken or folded. Therefore, reliable electrical connection between the via and the conductive member on the upper layer can be realized.

(Exposure of conductive bumps)

When the insulating resin compounding liquid is applied and the film thickness is reduced by heating or drying, as shown in Fig. 12 (c) at the boundary between the insulating uncured film and the conductive bump, There is something left of the material. When the ratio of the portion of the conductive bump on which the conductive bump is not covered by the residue of the insulating material or the like is expressed by the ratio of the area of the conductive bump to the area of the bottom of the conductive bump using the technique of the present invention, % Or more. The cross-sectional area of the via can be substantially increased, which is effective in reducing the via resistance.

[Multilayer wiring board according to the embodiment of the present invention and method for manufacturing the same]

A specific example of a method of manufacturing a multilayer wiring board using a wiring board member and a core substrate will be described with reference to Figs. 4 to 6. Fig. A method of manufacturing a multilayer wiring board according to the present invention is a method of using a conductive foil, an insulating board, or a multilayer wiring board member in place of the core board in the method for manufacturing a multilayer wiring board substrate described herein.

(First Example of Manufacturing Method of Multilayer Wiring Board)

In the first specific example, the method of manufacturing the multilayer wiring board in the lamination system will be described in turn with reference to Figs. 4 (a) to 4 (i). An example using a printed multilayer wiring board manufactured by a plated through hole method as a core substrate is shown. A multilayer wiring board member 51 manufactured by a second specific example (FIG. 2) of the method for manufacturing a multilayer wiring board member according to the present invention is formed on each of the upper surface and the lower surface of the core substrate 52, And 53 are aligned (Fig. 4 (a)), and laminated thermal press is performed. Thus, the insulating coating of the multilayer wiring board member which was the insulating uncured coating was used as the cured coating (Fig. 4 (b)). Then, a resist pattern 54 is formed on the multilayer wiring board members 51 and 53 by, for example, photolithography (FIG. 4 (c)). Subsequently, the conductive foil 55 is etched by wet etching using the resist pattern 54 as a mask. Then, the resist pattern 54 is removed. Thus, the wiring 56 is formed (Fig. 4 (d)). Next, a multilayer wiring board member 57 (FIG. 2) manufactured by a second specific example (FIG. 2) of the method for producing a multilayer wiring board member according to the present invention is formed on the upper surfaces of the multilayer wiring boards 51 and 53 and the wiring 56 (Fig. 4 (e)), and laminated hot pressing is performed. Thus, the insulating coating of the multilayer wiring board member, which was the insulating uncured coating, is used as the cured coating (Fig. 4 (f)). Then, a resist pattern 62 is formed on the multilayer wiring board members 59 and 60 by photolithography (FIG. 4 (g)). Subsequently, the conductive foil 61 is etched by wet etching using the resist pattern 62 as a mask. Then, the resist pattern 62 is removed. Thus, the wiring 63 is formed, and as a result, the multilayer wiring board 66 is completed (Fig. 4 (h)).

In the method for producing a composite multi-layered wiring board substrate of the sequential lamination type shown in Fig. 4, a multi-layered wiring board using a substrate member manufactured by the manufacturing method shown in Figs. 1 and 3, It is needless to say that it is possible to use a printed multilayer wiring board which is interlayer-connected by conductive bumps.

(Second Specific Example of Manufacturing Method of Multilayer Wiring Board)

In the second specific example, a manufacturing method of a multilayer wiring board of a batch lamination type is described with reference to Figs. 5 (a) to 5 (d). Layer printed circuit board manufactured using conductive bumps as a core substrate.

Generally, the mounting density of the core substrate manufactured by the through-hole plating method is low. Therefore, it is also possible to use a substrate manufactured by a conventional method such as B ² it. 3) of the method for manufacturing a multilayered circuit board member according to the present invention, the multilayered circuit board member manufactured on the upper and lower surfaces of the core substrate 75 is preliminarily formed of, for example, (FIG. 1) of the multilayer wiring board members 74, 73, 76, and 77 and the method of manufacturing the multilayer wiring board member according to the present invention, in which wiring patterns are formed by lithography and etching, (See Fig. 5 (a)). Subsequently, laminated hot pressing is performed to form a cured coating of the insulating coating of the multilayer wiring board member which was the insulating uncured coating (Fig. 5 (b)). Then, a resist pattern 84 is formed on the conductive foil 71 by, for example, photolithography (FIG. 5 (c)). The conductive foil 71 is etched by wet etching using the resist pattern 84 as a mask. Then, the resist pattern 84 is removed. Thus, a wiring 83 is formed (Fig. 5 (d)). As a result, the multilayer wiring board 87 is completed.

In the method of manufacturing a multilayered circuit board substrate of the laminated type shown in Fig. 5, a multilayered circuit board using a substrate member manufactured using the manufacturing method shown in Figs. 1 and 2, Needless to say, it is possible to use a printed multilayer wiring board manufactured by a through hole method.

(Third Specific Example and Fourth Specific Example of Manufacturing Method of Multilayer Wiring Board)

In the third specific example and the fourth specific example, a manufacturing method of the core / core lamination type multilayer wiring board is described with reference to Figs. 6 (a) and 6 (b). Layer printed circuit board manufactured using conductive bumps as a core substrate.

In the third embodiment, first, the conductive bump 94 is formed on the upper surface of the core substrate 95. Thereafter, an insulating resin compounding liquid in which the insulating filler 93 is dispersed is applied on and around the conductive bumps 94. Whereby a fluid coating is formed. By drying the fluid coating, the solvent is evaporated. Thus, the insulating uncured film 92 is formed. Then, the core substrate 91 is aligned (Fig. 6 (a)), and laminated hot press is performed. As a result, the insulating film of the multilayered circuit board member which is the insulating uncured film becomes a cured film. As a result, the multilayer wiring board is completed.

In the fourth embodiment, first, the conductive bumps 99 are formed on the upper surface of the core substrate 100. An insulating resin compounding liquid in which an insulating filler 98 is dispersed is applied on the upper surface of the other core substrate 96. Thereby, a fluid film is formed. By drying the fluid coating, the solvent is evaporated. Thus, the insulating uncured coating film 97 is formed. Then, the core substrate 96 and the conductive bumps 99 are aligned with each other (Fig. 6 (b)), and laminated hot pressing is performed. As a result, the insulating film of the multilayered circuit board member which is the insulating uncured film becomes a cured film. As a result, the multilayer wiring board is completed.

Needless to say, in the method of manufacturing a multilayered circuit board substrate of the core / core lamination system shown in Fig. 6, a printed multilayered circuit board manufactured by a plated through hole method can be used as the core substrate.

[Sangdo construction method and under construction method]

In the step of manufacturing the multilayer wiring board, the insulating method and the conductive method are disposed on the insulating resin layer and the conductive bump before the laminated thermal press.

Figs. 7 (a) and 7 (b) are cross-sectional views of a multilayer wiring board prior to lamination when a sublimation method is performed. The undercoating method is a method of coating an insulating compounding liquid on the side where the conductive bump is processed. In Fig. 7 (a), there is shown a positional alignment of the multilayer wiring board members including the conductive bumps and the insulating material so as to face the core board 122. Fig. In Fig. 7 (b), the conductive foils 124 and 128 are disposed on the multilayer wiring member having the conductive bump and the insulating material, which are formed on the core substrate 126. Fig.

7 (c) and 7 (d) are cross-sectional views of the multilayer wiring board prior to lamination in the case of performing the topography method. The topography method is a method of coating an insulating compounding liquid on the side opposite to the side where the conductive bumps are processed. 7C, an insulating resin composition containing an insulating filler and a volatile solvent is formed on a conductor layer or a second core substrate facing the first core substrate 131 on which the conductive bumps 130 and 132 are formed A step of forming an insulating uncured film by forming a fluid uncured film by volatilizing a volatile solvent and a volatile solvent by applying a liquid, and a step of forming a dielectric uncured film by reducing the thickness of the fluidized film, And a step of laminating hot pressing the conductor layer or the second core substrate on which the uncured film is formed to form a conductor layer of the first core wiring board and the conductor layer on which the insulating uncured film is formed, In the conductive bump, electrical connection with the conductor layer of the core substrate of the multilayer wiring board. Fig. 7 (d) shows a step of forming a fluid coating by applying an insulating resin blend liquid containing an insulating filler and a volatile solvent onto a first conductor layer disposed on the first core substrate, and a step of evaporating the volatile solvent Forming an insulating uncured film by reducing the film thickness of the fluidic coating; forming a protruding conductive bump group on the second conductive layer or the second core substrate; A step of laminating hot pressing the core substrate and the insulating layer to form a conductor layer of the first core wiring board on which the insulating uncured coating is formed and a conductor layer of the conductor layer or the second core substrate on which the conductive bump is formed Layer is formed in the conductive bump.

The manufacturing method of the member for a multilayer wiring board shown in Figs. 1 to 3 and the manufacturing method of the multilayer wiring board shown in Figs. 4 to 6 have been described with reference to cross-sectional views of steps in the case of a subbing method. However, it is needless to say that even when a member for a multilayer wiring board and a multilayer wiring board are manufactured by a top-surface-forming method, an excellent effect as in the case of applying the underlaying method can be obtained.

[Method of measuring via resistance]

The electrical resistance of a via of a multilayer wiring board formed by a technique such as a conductive bump is generally measured using a test pattern called a daisy chain. 13 (a) and 13 (b) are a plan view and a cross-sectional view of a test pattern for via resistance measurement. The test pattern is constituted by the first layer wiring 234, the via 235, the second layer wiring 233, and the measurement terminals 231 and 232. The first layer wiring 234 is a wiring formed on the lower surface of the insulating film 236. The second layer wiring 233 is a wiring formed on the upper surface of the insulating film 236. A plurality of vias 235 are formed between the measuring terminal 231 and the measuring terminal 232, Via the wiring pattern of the first layer wiring 233 and the second layer wiring 233. Via resistance is determined by applying a predetermined voltage to the measurement terminal 231 and the measurement terminal 232 and measuring the current flowing through the test pattern The wiring resistance is subtracted from the resistance between the terminals and the result is divided by the number of vias to calculate the via resistance per unit. In order to calculate the via resistance with high precision, it is necessary to prepare a pattern in which a plurality of vias are connected in series to perform measurement, and in general, The wiring resistance can be calculated theoretically based on the size of the wirings if there is data on the resistivity of the wiring material or the sheet resistance of the wiring in advance. It is also possible to independently measure the via resistance and the wiring resistance by measuring a plurality of patterns having different numbers.

Hereinafter, the present invention will be described in detail with reference to examples and comparative examples. Incidentally, the present invention is not limited to these embodiments.

[Filler dependency of conduction stability]

In order to investigate the influence of the insulating filler dispersed in the insulating resin against the conductivity stability between the layers of the multilayer wiring board, the electric resistance of the pattern for conductivity test formed on the substrate was measured.

9 is a graph showing the dependence of the electrical resistance of the daisy chain on the presence or absence of the insulating filler. The graph on the left is a graph when there is no insulating filler. The graph on the right is a graph when there is an insulating filler. As the insulating filler used was silica (D50 = 10㎛Φ. Is the laminated heat press pressure was set to 50 ~ 500 kgf / cm ^2. The horizontal axis of the graph is the number of the extraction electrode for measuring the connection resistance of the daisy chain. As shown in these graphs, it can be seen that, in the absence of the insulating filler, the dispersed state of the interlayer connection resistance in the substrate is large and the conduction stability is low. , It can be seen that when the insulating filler is present, the dispersion state of the interlayer connection resistance in the substrate is small and the conduction stability is high.

The insulating filler in the insulating resin was evaluated while changing the mixing ratio thereof. As a result, it was found that the mixing ratio of the insulating filler was preferably 1 vol% or more and 50 vol% or less. It has been found that the mixing ratio is preferably 1 vol% or more and 30 vol% or less. When considering the low connection resistance, it is more preferable that the mixing ratio is 1 vol% or more and 20 vol% or less.

10 (a) to 10 (f) are graphs showing electric resistance of the conductive bump on the ordinate axis and the position in the substrate on the abscissa axis. 10 (a), 10 (b) and 10 (c) correspond to the case where the diameter of the insulating filler is 0-4 탆, 5-20 탆, and 25-50 탆, respectively. The addition amount of the insulating filler to the insulating layer material is 10 vol%. The average diameter of the bottom surface of the conductive bumps after laminated press is 100 mu m phi and the average height thereof is 20 mu m.

As can be seen from this figure, when the diameter of the insulating filler is smaller than 20% of the height of the conductive bump, the insulating filler is too small, so that a short circuit is likely to occur between the wirings and the insulating filler tends to remain on the conductive bump The problem of losing occurs. Therefore, conduction stability is lowered. If the diameter of the insulating filler is 20% or more and 100% or less of the height of the conductive bump, problems such as short-circuiting and opening between wirings are less likely to occur. Therefore, conduction stability is improved. When the diameter of the insulating filler is larger than 100% of the height of the conductive bump, a gap between the conductive bump and the wiring to be connected thereto occurs because the insulating filler is too large. Therefore, conduction stability is lowered.

10 (d), 10 (e), and 10 (f) correspond to the case where the addition amount of the insulating filler to the insulating material is 0 vol% and 25 to 30 vol%, 1-20 vol%, and 10-15 vol% . When the addition amount of the insulating filler is 0 vol%, the conductivity is dispersed by the influence of the warpage of the substrate, and the absolute value of the resistance becomes 10 Ω or more. On the other hand, when the addition amount is 25 vol% or more, the absolute value and dispersion of electric resistance are improved as compared with the case where the addition amount is 0 vol%. When the addition amount is 30 vol%, the conductivity due to the conductive bump becomes 10? Or less. It can be seen that this value is a problem-free level in use of the multilayer wiring board (Fig. 10 (d)). On the other hand, when the insulating filler amount is 1-20 vol%, the warpage tends to be further improved. The absolute value and the dispersion of the electric resistance are further remarkably reduced. When the amount of the insulating filler is 10-15 vol%, it is understood that the electric resistance becomes 100 m? Or less and the deviation also becomes extremely small.

[Dependence of conduction stability on the conductive bump height]

The dependence of the conduction stability between two wiring layers connected with the conductive bump on the shape and size of the conductive bump was evaluated. In the insulating layer, an insulating filler having a particle size of D50 and about 10 mu m phi was dispersed. The thickness of the insulating layer was about 10 mu m. The conductive bumps prepared as the evaluation sample were three types of 50 mu m in diameter, 50 mu m in diameter, 80 mu m in diameter and 100 mu m in diameter. In the samples of the conductive bumps having the bottom surface diameter of 80 占 퐉 or 100 占 퐉?, The height of the conductive bumps was stably higher than that of the insulating layer. In a sample having a conductive bump bottom diameter of 50 占 퐉, the height of the conductive bump was stably higher than that of the insulating layer in a sample having a high conductive bump height. However, in a sample in which the conductive bump bottom diameter was 50 占 퐉 and the height of the conductive bump was low, the dispersion of the height of the conductive bump was large. In addition, the conductive bumps having a thickness larger than that of the insulating layer and the low conductive bumps were mixed.

As a result of evaluating the conduction stability of these samples, it was found that a sample having low or high conductivity bumps with a bottom diameter of 80 占 퐉 or 100 占 퐉 and a sample having a low bottom diameter of 50 占 퐉 and a high conductive bump height Good conduction stability was obtained. On the other hand, good conduction stability could not be obtained in a sample having a bottom surface diameter of 50 占 퐉 and a height of a conductive bump being low.

[Dependence of conduction stability on the conductive bump height]

Figs. 11 (a) and 11 (b) are graphs showing the dependence of the film thickness (height) and resistance value of the conductive bumps on the addition amount of the thermoplastic resin added in the conductive bumps. 11A and 11B show that as the amount of the thermoplastic resin to be added increases, the film thickness of the conductive bump after lamination heat press becomes thin, the conductive bump spreads in the lateral direction (XY direction) The resistance value was lowered and stabilized. However, in consideration of the line / space of the wiring pattern, the extension of the conductive bump in the transverse direction increases, and in particular, a short circuit may occur in the X and Y directions due to high temperature and high humidity bias test with 85 deg. C, 85% . Therefore, it has been found that the addition amount of the thermoplastic resin to the conductive bump material is 10 wt% or more and 30 wt% or less.

[Evaluation on Exposure of Bump Using Epoxy Resin]

By applying an epoxy resin to the insulating compounding liquid, a sample for evaluation of exposure of the conductive bump was produced. In the production and evaluation of samples, an insulating resin compounding liquid containing an epoxy resin was applied onto a support substrate on which conductive bumps were formed and dried. Thereafter, the change in the film thickness was measured, and the appearance of the conductive bump was observed.

(Adjustment of conductive paste)

The conductive paste was prepared by blending the resin component, the conductive component and the solvent under the following conditions.

Resin component:

Biphenyl type liquid epoxy resin: 2 to 10 wt%

Epoxy / phenol resin: 1 to 10 wt%

Biphenyl type epoxy resin: 5% by weight or less

Additive: 5% by weight or less

Conductive component: 80 wt% or more of Ag powder (weight of scaly powder: spherical powder = 1: 1) was blended.

Solvent: Methyl ethyl ketone was added to adjust the viscosity.

(Adjustment of Insulating Resin Blend Solution)

The insulating resin compounding liquid was adjusted by blending the resin component and the solvent under the following conditions.

Resin component (epoxy resin):

(A) YX695BH30 (trade name, manufactured by Japan Epoxy Resins Co., Ltd.): 100 parts by weight

(B) Epicure DC808 (trade name, manufactured by Japan Epoxy Resin Co., Ltd.): 154 parts by weight

(C) Colonate 2507 (trade name, manufactured by Nippon Polyurethane Industry Co., Ltd.): 312 parts by weight

(D) 2 E4MZ (imidazole-based crosslinking catalyst, trade name, manufactured by Shikoku Chemical Industry Co., Ltd.): 9. 6 parts by weight

DVB-960 (trade name, manufactured by Shin-Etsu Chemical Co., Ltd.): 98. 6 parts by weight

Perocta O (trade name, manufactured by Nippon Oil Corporation): 9. 6 parts by weight

(E) Insulating filler silica D50 = 10 탆 Φ 10 VOL%

Solvent: Methyl ethyl ketone was added to adjust the viscosity.

(Formation of conductive bump)

On the support substrate made of PET, a conductive paste was applied by screen printing. As a result, protruding conductive bumps were formed. The diameter of the bottom surface of the conductive bump was 80 占 퐉 to 110 占 퐉 and the height was 25 占 퐉 to 40 占 퐉.

(Application and Drying of Insulating Resin Blend)

On the support substrate on which the conductive bumps were formed, the insulating resin composition liquid was applied by the doctor blade method. The coating conditions were a clearance of 50 mu m to 100 mu m and a coating speed of 1 m / min. As a result, an insulating film having a thickness of 30 mu m to 100 mu m was formed. Thereafter, the thickness of the insulating film was measured, and then the sample was placed in a drying furnace. The sample was dried at 100 DEG C for 3 minutes. As a result, the solvent of the coating film was evaporated to reduce the thickness of the insulating uncured coating film.

After the sample was dried, the thickness of the insulating film was measured. The exposed state of the conductive bump was also observed.

(Measurement of dielectric property)

The dielectric properties of the prepared epoxy resin were measured.

The dielectric properties after curing

Relative dielectric 2.71 / 1GHz, 2.68 / 5GHz

Dielectric loss tangent 0.019 / 1 GHz, and 0.0098 / 5 GHz.

[Evaluation on Exposure of Conductive Bump Using OPE Resin]

By applying the OPE resin to the insulating film, a sample for evaluation of exposure of the conductive bump was produced. In the production and evaluation of samples, an insulating resin compound liquid containing OPE resin was applied to a support substrate on which conductive bumps were formed, and this was dried. Thereafter, the change of the film thickness was measured, and the appearance of the conductive bump was observed.

(Adjustment of conductive paste)

The conductive paste was prepared by blending the resin component, the conductive component and the solvent under the following conditions.

Resin component:

Biphenyl type liquid epoxy resin: 2 to 10 wt%

Epoxy / phenol resin: 1 to 10 wt%

Biphenyl type epoxy resin: 5% by weight or less

Additive: 5% by weight or less

Conductive component: 80 wt% or more of Ag powder (weight of scaly powder: spherical powder = 1: 1) was blended.

Solvent: Methyl ethyl ketone was added to adjust the viscosity.

(Adjustment of Insulating Resin Blend Solution)

The insulating resin compounding liquid was adjusted by blending the resin component and the solvent under the following conditions.

Resin component (OPE resin):

(A) OPE-2 st2200 (trade name of Mitsubishi Gas Chemical Co., Ltd.): 5 to 40 wt%

(B) TR2003 (trade name, manufactured by JSR Corporation): 5 to 40 wt%

Solvent: toluene: 20 to 90 wt%

(C) Insulating filler silica D50 = 10 mu m phi 10 vol%

(Formation of conductive bump)

On the support substrate made of PET, a conductive paste was applied by screen printing. As a result, protruding conductive bumps were formed. The diameter of the bottom surface of the conductive bump was 80 占 퐉 to 110 占 퐉 and the height was 16 占 퐉 to 40 占 퐉.

(Application and Drying of Insulating Resin Blend)

On the support substrate on which the conductive bumps were formed, the insulating resin composition liquid was applied by the doctor blade method. The coating conditions were a clearance of 20 mu m to 100 mu m and a coating speed of 1 m / min. As a result, an insulating film having a thickness of 20 mu m to 100 mu m was formed. Thereafter, the thickness of the insulating film was measured, and then the sample was placed in a drying furnace. The sample was dried at 100 DEG C for 3 minutes. As a result, the solvent of the coating film was evaporated, and the thickness of the insulating coating was reduced.

After the sample was dried, the thickness of the insulating film was measured. The exposed state of the conductive bump was also observed.

(Measurement of dielectric property)

The dielectric properties of the fabricated OPE resin were measured.

The dielectric properties after curing

Relative dielectric constant 2.40 / 5 GHz

Dielectric loss tangent 0.0019 / 5 GHz.

As described above, the present invention relates to a multilayer wiring board corresponding to high density mounting. Particularly, according to the present invention, it is possible to improve the stability of interlayer connection, and to provide a high-yield and low-cost multilayer wiring board and a manufacturing method thereof. The present invention contributes greatly to the field of electronics.

Claims (18)

delete delete delete delete delete delete delete delete At least a step of forming protruding conductive bump groups on conductor layers,
A step of forming a fluid coating film on the conductive layer and on the conductive bump group by applying an insulating resin compounding liquid containing an insulating filler and a volatile solvent,
Volatilizing the volatile solvent and reducing the thickness of the fluid coating to form an insulating uncured coating;
And a step of forming an insulating layer by laminating a conductor layer or a core substrate on the insulating uncured coating film followed by curing reaction of the insulating uncured coating film,
In the step of forming the fluid film, the liquid composition of the insulating resin is applied to a thickness larger than the height of the conductive bump group to form a fluid film,
Wherein the step of forming the insulating uncured coating film reduces the thickness of the applied fluid coating film to a thickness smaller than the height of the conductive bump group to form an insulating uncured coating film,
Wherein the top surface of the conductive bumps constituting the conductive bump group is in an arcuate shape with a central angle of 180 DEG or less. At least a step of forming protruding conductive bump groups on the first core substrate,
A step of forming a fluid film by applying an insulating resin compound liquid containing an insulating filler and a volatile solvent onto the conductive bump group,
A step of forming an insulating uncured film by volatilizing the volatile solvent and reducing the film of the fluidized film, a step of laminating a conductor layer or a second core substrate on the insulating uncured film, To form an insulating layer,
In the step of forming the fluid film, the liquid composition of the insulating resin is applied to a thickness larger than the height of the conductive bump group to form a fluid film,
Wherein the step of forming the insulating uncured coating film reduces the thickness of the applied fluid coating film to a thickness smaller than the height of the conductive bump group to form an insulating uncured coating film,
Wherein the top surface of the conductive bumps constituting the conductive bump group is in an arcuate shape with a central angle of 180 DEG or less. At least a step of forming protruding conductive bump groups on the first core substrate,
A step of forming a fluid coating film by applying an insulating resin composition liquid containing an insulating filler and a volatile solvent onto the conductor layer or the second core substrate,
Volatilizing the volatile solvent and reducing the thickness of the fluid coating to form an insulating uncured coating,
And a step of laminating hot pressing the conductor layer or the second core substrate on which the first core substrate and the insulating uncured film are formed,
In the step of forming the fluid film, the liquid composition of the insulating resin is applied to a thickness larger than the height of the conductive bump group to form a fluid film,
Wherein the step of forming the insulating uncured coating film reduces the thickness of the applied fluid coating film to a thickness smaller than the height of the conductive bump group to form an insulating uncured coating film,
Wherein the top surface of the conductive bumps constituting the conductive bump group is in an arcuate shape with a central angle of 180 DEG or less. delete Forming an electrically conductive bump group on the first conductor layer; applying an insulating resin compounding liquid containing an insulating filler and a volatile solvent to form a fluid coating; volatilizing the volatile solvent; One or a plurality of members for a multilayer wiring board formed by forming an insulating uncured film by reducing the thickness are formed,
A multilayer wiring board is formed by repeating a process including laminating hot pressing the member for a multilayer wiring board on a core substrate and forming a second conductor layer on the multilayer wiring board member once or several times,
In the step of forming the fluid film, the liquid composition of the insulating resin is applied to a thickness larger than the height of the conductive bump group to form a fluid film,
Wherein the step of forming the insulating uncured coating film reduces the thickness of the applied fluid coating film to a thickness smaller than the height of the conductive bump group to form an insulating uncured coating film,
Wherein the top surface of the conductive bumps constituting the conductive bump group is in an arcuate shape with a central angle of 180 DEG or less. Forming an electrically conductive bump group on the first conductor layer; applying an insulating resin compounding liquid containing an insulating filler and a volatile solvent to form a fluid coating; volatilizing the volatile solvent; To form an insulating uncured film, thereby forming one or a plurality of members for a multilayer wiring board,
One or a plurality of the multilayer wiring board members are collectively laminated and hot pressed on the core substrate to form a multilayer wiring board,
In the step of forming the fluid film, the liquid composition of the insulating resin is applied to a thickness larger than the height of the conductive bump group to form a fluid film,
Wherein the step of forming the insulating uncured coating film reduces the thickness of the applied fluid coating film to a thickness smaller than the height of the conductive bump group to form an insulating uncured coating film,
Wherein the top surface of the conductive bumps constituting the conductive bump group is in an arcuate shape with a central angle of 180 DEG or less. The multilayer wiring board according to any one of claims 9, 10, 11, 13, and 14, wherein the content of the nonvolatile component in the insulating resin mixed solution is 10 wt% to 80 wt% &Lt; / RTI &gt; The method for manufacturing a multilayer wiring board according to claim 9 or 10, wherein the drying / solidifying temperature of the insulating layer is 60 占 폚 or more and 160 占 폚 or less. The conductive bump group as set forth in any one of claims 9, 10, 11, 13, and 14, wherein the resin composition constituting the conductive bump group comprises a thermosetting resin, a thermoplastic resin in an amount of 10 wt% By weight based on the total weight of the composition. The laminated thermal press according to any one of claims 11, 13 and 14, characterized in that the temperature of the laminated thermal press is equal to or lower than the temperature at which the curing reaction of the insulating resin starts, Of the total thickness of the multilayer wiring board.

Images