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CN102474993B - Multilayered wiring board and method for manufacturing multilayered wiring board - Google Patents

Multilayered wiring board and method for manufacturing multilayered wiring board Download PDF

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Publication number
CN102474993B
CN102474993B CN201080034878.7A CN201080034878A CN102474993B CN 102474993 B CN102474993 B CN 102474993B CN 201080034878 A CN201080034878 A CN 201080034878A CN 102474993 B CN102474993 B CN 102474993B
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CN
China
Prior art keywords
insulating properties
coverlay
multilayer circuit
circuit board
salient point
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CN201080034878.7A
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Chinese (zh)
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CN102474993A (en
Inventor
福冈义孝
户井田刚
熊仓萨桃洣
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Nameishi Co Ltd
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Nameishi Co Ltd
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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • H05K3/4655—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern by using a laminate characterized by the insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203—Fillers and particles
    • H05K2201/0206—Materials
    • H05K2201/0209—Inorganic, non-metallic particles
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2036—Permanent spacer or stand-off in a printed circuit or printed circuit assembly
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06—Lamination
    • H05K2203/061—Lamination of previously made multilayered subassemblies
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H05K3/4617—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar single-sided circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4647—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer around previously made via studs

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

To date, multilayer wiring technology such as B2it in which layers are connected to each other using conductive bumps has been used for manufacturing multilayered wiring boards used for mounting electronic components. However, warpage of substrates often causes short-circuits between multilayered wiring lines or poor connection between conductive bumps and wiring lines. To avoid this, an insulating film is formed by coating a substrate with insulating varnish including insulating filler. This leads to maintenance of electrical insulation between multilayered wiring lines, higher stability of wiring connections, and improvement in production yield even when the substrate warps.

Description

The manufacture method of multilayer circuit board and multilayer circuit board
Technical field
The present invention relates to the manufacture method for multilayer circuit board and the multilayer circuit board of mounting electronic parts, particularly possess the via (PVC ア) that formed by conductivity salient point, can high-density wiring the manufacture method of multilayer circuit board.
Background technology
Patent documentation 1: No. 3167840th, Japanese patent gazette
Patent documentation 2: Japanese Patent Publication communique JP 2007 ?No. 13208
Patent documentation 3: Japanese Patent Publication communique JP 2006 ?No. 183072
Patent documentation 4: Japanese Patent Publication communique JP 2002 ?No. 353617
In recent years, be accompanied by miniaturization and, high speed and the multifunction of electronic equipment, also day by day improve for the requirement of carrying out high-density installation on the wiring board being arranged in electronic equipment.In order to tackle this requirement, carry out the exploitation of multilayer circuit board, on this multilayer circuit board, by alternately laminated to multiple insulating properties basis materials and conductive pattern, carry out mounting electronic parts.
As the manufacturing technology of representative multilayer circuit board, the B of the known ALIVH, Toshiba and the Dai Nippon Printing that have Panasonic's electronic unit (Electricity of Panasonic component) 2it.
ALIVH (Any Layer Interstitial Via Hole structure multi layered printed wiring board, random layer inner via hole structure multilayer printed circuit board) be to form interlayer connection hole on insulating body material, then in this hole portion, imbed the technology of conductive material.First,, by prepreg (プ リ プ レ グ) (as the insulating properties basis material thin slice of wiring board material) irradiating laser, form fine through hole.With electrocondution slurry (Guide Electricity ペ ー ス ト, Guide Electricity ペ ー ス ト) be filled in the through hole of formation, form via (interlayer connecting portion), Copper Foil laminating hot pressing on described prepreg, then form conductive pattern by chemical etching, thereby obtain board part.By described board part laminating hot pressing, manufacture multilayer circuit board.
In ALIVH, can be on through hole laying-out and wiring and electronic unit, therefore can shorten length of arrangement wire and high-density installation electronic unit.
; if the quantity of through hole increases; increase the process time of Ear Mucosa Treated by He Ne Laser Irradiation; thereby cause manufacturing cost to increase; in addition; adhesive strength (adherence Strong degree) by the bonding Copper Foil of laminating hot pressing and via is not high, therefore in the time of shatter test, easily produces the unfavorable conditions such as open circuit, has the problem that reliability is low.
At B 2it (Buried Bump Interconnection Technology, imbed bump interconnect technology) in, on conductor plate, form chevron or the conical conductivity salient point of cardinal principle, then, make the thermoplastic of insulating properties prepreg basis material, make salient point connect this insulating properties prepreg basis material by pressurization, form thus the via being formed by conductivity salient point.In patent documentation 1 and patent documentation 2, disclose and B 2the technology that it is relevant.
In the disclosed technology of patent documentation 1, make chevron conductor salient point connect synthetic resin supporting mass along the thickness direction of synthetic resin supporting mass, form thereafter interlayer wiring.
In the disclosed technology of patent documentation 2, on the conical conductor salient point of cardinal principle being formed on conductor plate, configure uncured insulating material matrix material,,, to this basis material pressurization, salient point is connected thereafter, then make conductor plate form pattern, make thus base board unit.Stacked multiple these base board units, carry out after pressurized, heated, it being solidified.
At B 2identical with ALIVH in it, on through hole, do not form pit, can laying-out and wiring and electronic unit, therefore can shorten length of arrangement wire and carry out high-density installation.In addition, different from ALIVH, B 2it forms via in a lump.Even if therefore increase the quantity of through hole, also can not increase manufacturing cost.At layer of prepreg prestack, on Copper Foil, form conductivity salient point by being printed on.Therefore at B 2the cementability in it with salient point and Copper Foil might as well.
On the other hand, B 2there is following problem in it.
(1) in the time that conductivity salient point connects and in the time being used to form multilayer circuit board and carrying out laminating hot pressing, large conductivity salient point and the prepreg of draw ratio (ア ス ペ Network ト ratio) applied to large pressure.Present situation is that the interior density of the face of via is about 300,000/m 2.The prediction in the future interior density of face of via is 1,000,000/m 2left and right.In this case, conductivity salient point and prepreg are applied to very large pressure, therefore, the fraction defective causing because of the breakage of conductivity salient point and prepreg increases, therefore, and at B 2in it, be difficult to realize densification.
(2) at B 2in it, conductivity salient point will have certain mechanical strength, therefore, make its external diameter more than 100 μ m.In order to realize high-density installation, carry out the miniaturization of conductivity salient point, the bottom surface diameter that makes conductivity salient point is 30 μ m～50 μ m.At B 2in it, the draw ratio of salient point is large, and makes prepreg filming have the limit, and therefore conductivity salient point is difficult to miniaturization.
(3) if do not make the draw ratio (highly/external diameter) of conductivity salient point more than 0.8～1.0, conductivity salient point can not connect prepreg.In addition, making as the insulating resin impregnated glass colth basis material attenuate of the common material of prepreg is also (more than～30 μ m) that have the limit.In addition,, in order to make the perforation characteristic of conductivity salient point good, conductivity bump height will be approximately three times of prepreg thickness.Therefore if guarantee the described draw ratio that can connect, just producing the limit aspect the miniaturization of the bottom surface of conductivity salient point diameter, (minimum (min.) 72～90 μ m).If adjust irrelevantly the thickness of prepreg and the temperature of pressurization operation, conductivity salient point just can not connect prepreg.Therefore, at B 2in it, the nargin of creating conditions that forms conductivity salient point, perforation operation and laminating hot pressing operation etc. is little, therefore has the problem that rate of finished products is low.
(4) it is very difficult that exploitation can be printed with the electrocondution slurry of conductivity salient point of high length-diameter ratio of fine external diameter.
(5) by softening the heating prepreg being made up of the insulative resin of state before solidifying, the conductivity salient point of overshooting shape is pressed, the operation that makes salient point connect this prepreg also has problems.; described prepreg is glass cloth basis material to be knitted in length and breadth with fibre bundle and the structure that obtains; the crossover sites of therefore encountering tow at conductivity salient point and encountering between tow and tow, the difference of the resistance of perforation is large.The part that resistance is larger, more can produce the broken nubbin of insulative resin and/or glass cloth in the interface locations of insulative resin prepreg and conductivity salient point.The broken nubbin of these insulative resins and/or glass cloth, when the stacked pressurization of the conductor layer conductivity salient point and wiring board in subsequent handling, can cause that contact resistance value increases down to poor flow, therefore broken nubbin reduces the rate of finished products of wiring board.
(a) of Figure 14 is to represent B in the past, connect prepreg with salient point to Figure 14 (d) 2cutaway view and the stereogram of the process sequence of the multilayer circuit board component manufacturing method of it mode.First, by the operation of printing conductive slurry on the first conductivity paper tinsel 501, form conical conductivity salient point 502 substantially, obtain thus intermediate product (Figure 14 (a)).Then make this intermediate product and state before solidifying, as the prepreg 503 relative (Figure 14 (b)) of insulative resin.Then under heated condition, make prepreg 503 be warmed up to by melting, make it softening, make the leading section of conductivity salient point 502 from prepreg 503 outstanding (Figure 14 (c)).Then on the outstanding prepreg 503 of the leading section of conductivity salient point 502, paste the second conductivity paper tinsel 505 (Figure 14 (d)).(e) of Figure 14 is the horizontal cross on conductivity salient point 502 tops of the multilayer line plate member that is made into by described method.The fragmentation bits 508 of observing the glass fibre matrix material containing in prepreg remain in salient point surface 507.Multiple multilayer circuit board stacking parts the pressurization of using described method to be made into by handle, form multilayer circuit board.At B in the past 2in the manufacture method of the multilayer line plate member of it mode, broken bits remain in salient point surface, therefore exist easily generation interlayer wiring to be electrically connected bad problem.
On the other hand, in patent documentation 4, disclose without B 2the such perforation method of it forms the conventional art that is made up of via conductor salient point.In the conventional art, in the conductor group of bumps being formed in the first metal forming, by curtain coating method coating insulating resin composition, more overlapping the second metal forming pressurization thereon.The method of coating insulating resin composition, except curtain coating method, also records spraying process and makes insulating resin composition become the membranaceous of thermal softening, the method covering from conductor salient point.In the disclosed method of patent documentation 4, conductor salient point is not applied to mechanical pressure, therefore can avoid described B 2problem in it.; the method is directly coated on full-bodied insulative resin on conductor salient point with liquid condition by curtain coating method; by spray-on process, full-bodied insulative resin is become to droplet-like and be coated on conductor salient point, therefore exist insulative resin to be easily attached to the high problem of incidence of the loose contact of problem on conductor salient point leading section and conductor salient point and the second metal forming.This is external covers thermal softening film in the situation on conductor salient point, and the leading section of conductor salient point does not expose, and therefore exists and can not form the problem that interlayer connects.
In addition,, in the manufacture method of multi-layer wire substrate in the past, exist and cause the problem that produces bad connection between multilayer wiring because of the warpage of core substrate.(b) of Fig. 8 and (c) of Fig. 8 are the cutaway views that represents to produce by the manufacture method of multilayer wiring in the past bad connection between wiring.In Fig. 8 (b), form from the teeth outwards the first core substrate 213 and second core substrate 208 of wiring, stacked in the mutual relative mode of wiring side by insulative resin layer 211.A part of region of a part of region of wiring 212 and wiring 209 is electrically connected by conductivity salient point 210.Produce large warpage at core substrate, for example, as shown in Fig. 8 (b), become protruding warpage at central portion, owing to being in contact with one another by the separated wiring layer of being insulated property resin bed 211, cause producing short-circuit.On the other hand, as shown in Fig. 8 (c), in the situation that wiring 215 does not mutually contact, insulated by insulative resin layer 217 with wiring 218, conductivity salient point 216 that should be electrically connected, periphery does not contact with relative wiring, produces wiring open circuit.In the manufacture method of multi-layer wire substrate in the past, can produce the wiring bad connection causing because of the warpage of substrate, therefore there is the problem that can not fully improve the fabrication yield of multilayer circuit board.
Summary of the invention
The technical problem to be solved in the present invention
The object of this invention is to provide the manufacture method of a kind of multilayer circuit board parts and multilayer circuit board, according to these parts, can realize miniaturization, densification and the slim multiple stratification of multilayer circuit board, and the layer insulation of multilayer circuit board might as well, in addition, according to this manufacture method, can provide the high wiring board of connection reliability that utilizes the fine conductivity salient point of interlayer, and fabrication yield is high, low cost of manufacture.
The technical scheme of technical solution problem
(1) of the present invention is multilayer circuit board, it is characterized in that comprising: conductivity group of bumps, is formed between the first conductor layer and the second conductor layer; And insulating barrier, be formed on described conductivity group of bumps around, contain the insulating properties filler that prevents that short circuit from using.
(2) of the present invention are multilayer circuit boards, it is characterized in that comprising: conductivity group of bumps, is formed between the first conductor layer and the second conductor layer; And the insulating barrier being formed by the insulative resin mixed liquor that contains insulating properties filler, this insulating barrier is formed on described conductivity group of bumps around, wherein, the average grain diameter of described insulating properties filler is more than 20% below 100% of average height of the described conductivity group of bumps after laminating hot pressing.
(3) of the present invention are the multilayer circuit boards as described in (1) of the present invention or (2) of the present invention, it is characterized in that, described insulating barrier is not occur actually to make solvent evaporates make film attenuate under the condition of curing reaction by the resin at the insulative resin mixed liquor that makes to contain insulating properties filler, contains the layer that the resin solidification of the insulative resin mixed liquor of insulating properties filler forms described in then making.
(4) of the present invention are if (1) of the present invention is to the multilayer circuit board as described in any in (3) of the present invention, it is characterized in that, described insulating properties filler is one or more materials of selecting from silicon dioxide, carborundum, aluminium oxide, aluminium nitride, zirconium oxide bead (ジ Le コ ニ ア ビ ー ズ), bead, acrylic acid pearl.
(5) of the present invention are that described insulating properties filler is below the above 30vol% of 1vol% with respect to the addition of described insulative resin mixed liquor if (1) of the present invention is to the multilayer circuit board as described in any in (4) of the present invention.
(6) of the present invention are if (1) of the present invention is to the multilayer circuit board as described in any in (5) of the present invention, it is characterized in that, described insulative resin mixed liquor has used epoxy resin, bismaleimide-triazine resin, polyimide resin, acrylic resin, phenolic resins (Off ェ ノ ー Le Trees fat), oligomerisation phenylene ether (オ リ go Off ェ ニ レ ン エ ー テ Le) resin, polyether resin and melmac.
(7) of the present invention are if (1) of the present invention is to the multilayer circuit board as described in any in (6) of the present invention, it is characterized in that, the relation of the height h2 of described conductivity group of bumps and the thickness t 3 of described insulating barrier is: h2≤t3.
(8) of the present invention are if (1) of the present invention is to the multilayer circuit board as described in any in (7) of the present invention, it is characterized in that, the resin combination that forms described conductivity group of bumps is made by thermoplastic resin is added to the material obtaining in thermosetting resin with the mixing ratio below the above 30wt% of 10wt%.
(9) of the present invention are the manufacture methods of multilayer circuit board, it is characterized in that at least comprising: the operation that forms the conductivity group of bumps of overshooting shape on conductor layer; By being coated with the insulative resin mixed liquor that contains insulating properties filler and volatile solvent on described conductor layer and in described conductivity group of bumps, form the operation of mobility coverlay; By making described volatile solvent volatilization and making described mobility coverlay attenuate, form the operation of the uncured coverlay of insulating properties; And by after conductor layer or core substrate are layered on the uncured coverlay of described insulating properties, make the uncured coverlay generation of described insulating properties curing reaction, form the laminating hot pressing operation of insulating barrier, the average grain diameter of described insulating properties filler is more than 20% below 100% of average height of the described conductivity group of bumps after laminating hot pressing.
(10) of the present invention are the manufacture methods of multilayer circuit board, it is characterized in that at least comprising: the operation that forms the conductivity group of bumps of overshooting shape on the first core substrate; By the insulative resin mixed liquor that coating contains insulating properties filler and volatile solvent in described conductivity group of bumps, form the operation of mobility coverlay; By making described volatile solvent volatilization and making described mobility coverlay attenuate, form the operation of the uncured coverlay of insulating properties; And by after conductor layer or the second core substrate are layered on the uncured coverlay of described insulating properties, make the uncured coverlay generation of described insulating properties curing reaction, form the laminating hot pressing operation of insulating barrier, the average grain diameter of described insulating properties filler is more than 20% below 100% of average height of the described conductivity group of bumps after laminating hot pressing.
(11) of the present invention are the manufacture methods of multilayer circuit board, it is characterized in that at least comprising: the operation that forms the conductivity group of bumps of overshooting shape on the first core substrate; By the insulative resin mixed liquor that coating contains insulating properties filler and volatile solvent on conductor layer or the second core substrate, form the operation of mobility coverlay; By making described volatile solvent volatilization and making described mobility coverlay attenuate, form the operation of the uncured coverlay of insulating properties; And by described the first core substrate be formed with the conductor layer of the uncured coverlay of described insulating properties or the operation of the second core substrate laminating hot pressing, the average grain diameter of described insulating properties filler is more than 20% below 100% of average height of the described conductivity group of bumps after laminating hot pressing.
(12) of the present invention are the manufacture methods of multilayer circuit board, it is characterized in that at least comprising: the insulative resin mixed liquor that contains insulating properties filler and volatile solvent by coating on the first conductor layer being configured on the first core substrate, the operation of formation mobility coverlay; By making described volatile solvent volatilization and making described mobility coverlay attenuate, form the operation of the uncured coverlay of insulating properties; On the second conductor layer or the second core substrate, form the operation of the conductivity group of bumps of overshooting shape; And by described the first core substrate be formed with the second conductor layer of conductivity group of bumps or the operation of the second core substrate laminating hot pressing of described overshooting shape, the average grain diameter of described insulating properties filler is more than 20% below 100% of average height of the described conductivity group of bumps after laminating hot pressing.
(13) of the present invention are the manufacture methods of multilayer circuit board, it is characterized in that, on the first conductor layer, form conductivity group of bumps, the insulative resin mixed liquor that contains insulating properties filler and volatile solvent by coating forms mobility coverlay, by making described volatile solvent volatilization and making described mobility coverlay attenuate form the uncured coverlay of insulating properties, thereby form multilayer circuit board parts, form one or more described multilayer circuit boards with after parts, by once comprise the hot pressing of described multilayer circuit board stacking part on core substrate and at described multilayer circuit board with the operation or repeated multiple times the comprising the hot pressing of described multilayer circuit board stacking part on core substrate and in the operation that forms the second conductor layer on parts for described multilayer circuit board that form the second conductor layer on parts, form multilayer circuit board, the average grain diameter of described insulating properties filler is more than 20% below 100% of average height of the described conductivity group of bumps after laminating hot pressing.
(14) of the present invention are the manufacture methods of multilayer circuit board, it is characterized in that, on the first conductor layer, form conductivity group of bumps, the insulative resin mixed liquor that contains insulating properties filler and volatile solvent by coating forms mobility coverlay, by making described volatile solvent volatilization and making described mobility coverlay attenuate form the uncured coverlay of insulating properties, thereby form multilayer circuit board parts, form one or more described multilayer circuit boards with after parts, by one or more described multilayer circuit boards with parts in a lump laminating hot pressing on core substrate, form multilayer circuit board, the average grain diameter of described insulating properties filler is more than 20% below 100% of average height of the described conductivity group of bumps after laminating hot pressing.
(15) of the present invention are if (9) of the present invention are to the manufacture method of the multilayer circuit board as described in any in (14) of the present invention, it is characterized in that, the content of the fixedness composition in described insulative resin mixed liquor is 10 % by weight～80 % by weight.
(16) of the present invention are if (9) of the present invention are to the manufacture method of the multilayer circuit board as described in any in (15) of the present invention, it is characterized in that, described insulating barrier dry/setting temperature (universe dry/curing temperature) be 60 DEG C above below 160 DEG C.
(17) of the present invention are (9) of the present invention to the manufacture method of the multilayer circuit board described in any in (16) of the present invention, it is characterized in that, the resin combination that forms described conductivity group of bumps is made by thermoplastic resin is added to the material obtaining in thermosetting resin with the mixing ratio below the above 30wt% of 10wt%.
(18) of the present invention are if (9) of the present invention are to the manufacture method of the multilayer circuit board as described in any in (17) of the present invention, it is characterized in that, the temperature of described laminating hot pressing is below the beginning temperature of insulative resin curing reaction and more than the temperature of the heat fusing reduced viscosity of insulative resin.
Effect of the present invention
Effect of the present invention is as follows.
1. and B 2it comparison
Do not have conductivity salient point to connect operation, therefore parts are not applied to mechanical pressure.
Owing to can making insulating barrier attenuation, so can reduce the height of conductivity salient point.In addition, even if the draw ratio of conductivity salient point is little, also can form via, thus, can make the size decreases of conductivity salient point.Its result, can manufacture and have the high-density multi-layered wiring board that external diameter is the conductivity salient point of 30～50 μ m.The present invention also can tackle 1,000,000/m in the future 2conductivity bump density.
Need not improve the draw ratio of conductivity salient point, even if therefore do not use special electrocondution slurry, even or be not repeatedly repeatedly used to form the slurry painting process of conductivity salient point, also can form conductivity salient point.Therefore can reduce material cost and manufacturing cost.
The disqualification rate causing because of the damage of conductivity salient point, wiring and insulating properties coverlay reduces.
The nargin of creating conditions is large, and therefore, even if be used to form good interlayer, to connect the draw ratio of needed conductivity salient point little, also can improve fabrication yield.
2. with the comparison of ALIVH
In the present invention, do not use laser drilling, therefore can eliminate the inhomogeneities of position, hole shape.In manufacturing process, the shape inhomogeneities causing because of laser drilling method can cause bore portion and via conductive agent bonding bad.Bonding bad meeting causes that liquid or moisture permeate in wiring board, becomes one of reason producing various defect.On the other hand, according to manufacture method of the present invention, form the interface of conductivity salient point and insulating properties coverlay by be coated with liquid resin that viscosity is low around conductivity salient point, be therefore equivalent to the conductivity salient point of via and the cementability of insulating properties coverlay and the reliability of wiring board all very high.
The present invention is the mode that multiple vias are once all made, and also can not increase manufacturing cost even if therefore increase the quantity of via.
3. plate the comparison of mode with through hole
The present invention, because the space availability ratio of via is high, is applicable to miniaturization.Structure of the present invention is the structure that is full of interlayer connection hole with electroconductive component, and therefore good heat dissipation effect is applicable to installing the large parts of caloric value such as high-speed CPU.Owing to can not producing pit, thus wiring and other vias on via, also can be formed, and also can installing component on the via of top layer, therefore can improve packing density.
4. with the difference that is coated with the mode of insulating resin composition by curtain coating method
Manufacture method of the present invention is the thickness that reduces coverlay by the lower resin mixture liquor formation coverlay of coating concentration, thereby the mode that conductivity salient point is exposed, therefore insulative resin can not remain on conductivity salient point leading section, therefore can form the resistance that reliable interlayer connects and reduce via.
5. in the present invention,, even if make conductivity salient point upper section be shaped as the smooth circular arc that central angle is less than 180 °, also can form via.Different from the conductivity salient point that the topside area using in previous methods is little, the area of section of via is large.In addition, can make the residual quantity of the insulating properties material of the contact site of via and wiring reduce, therefore can obtain large via and the contact area of wiring, therefore can reduce the resistance of via.
6. in the present invention, the board part by handle with the uncured coverlay of insulating properties is stacked, manufactures multilayer circuit board.
The adhesive strength of insulating properties coverlay and conductive pattern uprises, and therefore wiring is difficult to peel off.
Adhesive strength between adjacent insulating properties coverlay uprises, and therefore can manufacture firmly multilayer circuit board.
Insulating properties coverlay has flexibility, even if therefore substrate is uneven, due to good film-forming property, so that surface becomes is smooth.
Conductivity salient point uprises with the adhesive strength of the wiring being in contact with it, and therefore can reduce the resistance of via.
7. by the combination of the etch process of thick-film technique and conductive membrane, can reduce the manufacturing cost of high-density multi-layered wiring board.
8. can provide packing density much higher sandwich circuit board, therefore be conducive to miniaturization and and the multifunction of electronic equipment.
9. utilize the insulating properties material that relative dielectric constant, dielectric loss are low to form insulation coverlay, therefore can make the installation wiring board of electric signal transmission characteristic good.Particularly using ADFLEMA (trade name, Na Meishi Co., Ltd. manufactures) the situation of OPE series under, relative dielectric constant and dielectric loss angle tangent (Lure Electricity just connects) step-down, therefore can make the installation wiring board of electric signal transmission characteristic good.In addition because the content of solvent is large, so can easily form thin insulating properties coverlay.
10. use the wiring material of good conductivity to form wiring and conductivity salient point, therefore, can reduce heat treatment temperature, make the thickness attenuation of wiring, even if wiring width is thin in addition, also can produce the installation wiring board of electric signal transmission characteristic good.
11. can, by the stacked multilayer circuit board of manufacturing in a lump, therefore, with manufacture the method for multilayer circuit board by sequential cascade compared with, can reduce worker ordinal number, therefore can reduce manufacturing cost.In addition, can make heat history that board part is applied reduce, therefore improve parts and the reliability of the multilayer circuit board that formed by these parts.
12. are dispersed with insulating properties filler in insulating properties coverlay material, therefore can reduce the disqualification rate of the wiring such as short circuit or the open circuit connection causing because of core substrate warpage, therefore can improve the rate of finished products of manufacture.
Brief description of the drawings
(a) of Fig. 1 is the cutaway view that represents the process sequence of the first object lesson of multilayer circuit board component manufacturing method execution mode of the present invention to (d).
(a) of Fig. 2 is the cutaway view that represents the process sequence of the second object lesson of multilayer circuit board component manufacturing method execution mode of the present invention to (d).
(a) of Fig. 3 is the cutaway view that represents the process sequence of the 3rd object lesson of multilayer circuit board component manufacturing method execution mode of the present invention to (i).
(a) of Fig. 4 is the cutaway view that represents the process sequence of the first object lesson of the manufacture method execution mode of multilayer circuit board of the present invention to (i).
(a) of Fig. 5 is the cutaway view that represents the process sequence of the second object lesson of the manufacture method execution mode of multilayer circuit board of the present invention to (d).
(a) of Fig. 6 and (b) be the cutaway view that represents the process sequence of the 3rd object lesson of the manufacture method execution mode of multilayer circuit board of the present invention.
(a) of Fig. 7 is the cutaway view that the priming operation processing method of multilayer circuit board component manufacturing method execution mode of the present invention is described respectively or is coated with surface layer processing method to (d).
(a) of Fig. 8 is the cutaway view for the manufacture method of the manufacture method of multilayer circuit board more of the present invention and multilayer circuit board in the past to (c).
Fig. 9 represents conducting stability and the figure that has packless relation.
(a) of Figure 10 is the figure that represents the conduction of conductivity salient point and the relation of filler diameter to (c), and (d) of Figure 10 is the figure that represents the conduction of conductivity salient point and the relation of filler addition to (f).
(a) of Figure 11 and (b) be the figure of the thickness (highly) that represents respectively conductivity salient point or resistance value and the thermoplastic resin amount's that adds in conductivity salient point relation.
(a) of Figure 12 is the figure of the dimensional parameters definition for multilayer line plate member of the present invention is described to (c).
Figure 13 is vertical view and the cutaway view of the measuring test pattern of resistance.
(a) of Figure 14 is cutaway view and the stereogram that represents the process sequence of the manufacture method of multilayer circuit board in the past to (d).(e) of Figure 14 is the horizontal cross on the conductivity salient point top of multilayer circuit board in the past.
Description of reference numerals
1,11,21 conductivity paper tinsels
2,12,22 conductivity salient points
3,13,23 mobility coverlays
5, the uncured coverlay of 15,27 insulating properties
4,14,24 insulating properties fillers
25 do not reach completely crued insulating properties solidifies coverlay
51,53,57,58,59,60 multilayer line plate member
52 core substrates
55,61 conductivity paper tinsels
54,62 resist patterns
56,63 wirings
66 multilayer circuit boards
71,79 conductivity paper tinsels
72,73,74,76,77,78 multilayer line plate member
75 core substrates
80 insulating properties fillers
81,82 multilayer line plate member
83 wirings
84 resist patterns
85 circuit boards
91,95,96,100 core substrates
92, the uncured coverlay of 97 insulating properties
93,98 insulating properties fillers
94,99 conductivity salient points
121,123,125,127,129,133 multilayer line plate member
122,126,131,137 core substrates
124,128,134,140 conductivity paper tinsels
130,132,135,139 conductivity salient points
136, the uncured coverlay of 138 insulating properties
201,207,208,213,214,219 core substrates
202,206,209,212,215,218 wirings
204,211,217 insulative resin layers
205 insulating properties fillers
203,210,216 conductivity salient points
221 conductivity salient points
222 mobility coverlays
The uncured coverlay of 223 insulating properties
231,232 measurement terminal
233 second layer wirings
234 ground floor wirings
235 vias
236 insulating properties coverlays
501,505 conductivity paper tinsels
502 conductivity salient points
503,506 prepregs
508 broken bits
507 conductivity salient point surfaces
Embodiment
Below the specific embodiment of the present invention is described.
(multilayer line plate member, multilayer circuit board, composite multi-layer wiring board)
In the manufacture of multilayer circuit board, form as the multilayer line plate member (wiring board with parts or be only called board part) of parts that forms multilayer circuit board, multiple described multilayer circuit board stacking parts, under heated condition pressurize, form multilayer circuit board thereafter.Particularly by by surface circuit layer and the low stacked multilayer circuit board obtaining of core substrate of conductivity bump density, be called composite multi-layer wiring board, described surface circuit layer comprises, conductivity bump density much higher sandwich circuit board parts that technology of the present invention is manufactured by utilizing, or, sometimes also the composite multi-layer wiring board that comprises core substrate is only called to multilayer circuit board.Core substrate is born rigidity physically.In addition, on core substrate, form the so not fine circuit such as power-supply wiring and ground connection wiring.On the surface circuit layer of core substrate, form fine wiring.By utilizing technology manufacture of the present invention to form the multilayer line plate member of surface circuit layer, the etch process combination of the thick-film technique of low cost of manufacture and conductive membrane that can microfabrication, can form the composite multi-layer wiring board that packing density is high.
(stacked (mono-Kuo Plot Layer in a lump), sequential cascade, core substrate-core substrate are stacked)
Being called as stacked in a lump method is to have after the multilayer line plate member of wiring in formation, laminating hot pressing of multiple multilayer line plate member, manufactures the method for multilayer circuit board; Or multiple multilayer line plate member and laminating hot pressing of core substrate, manufacture the method for composite multi-layer wiring board.On the other hand, in the method that is called as sequential cascade, repeatedly implement following operation, formation has wiring or does not have the multilayer line plate member of wiring, paste conductivity paper tinsel thereon, form after wiring by etching, next multilayer line plate member is placed on above it, carry out laminating hot pressing, manufacture thus multilayer circuit board or composite multi-layer wiring board.
Stacked owing to can reducing process number in a lump, so can reduce manufacturing cost.In addition, the heat history that board part is applied is few, therefore there are parts and the reliability of the multilayer circuit board that formed by these parts high.B in the past 2it is difficult to carry out stacked in a lump.Technology of the present invention can easily be implemented by the stacked multilayer circuit board of manufacturing in a lump.
On the other hand, sequential cascade have advantages of need not position by wiring pattern, only conductivity salient point be positioned just passable., each stacked multilayer line plate member, all needs to carry out etching and laminating hot pressing, has therefore increased process number, thereby manufacturing cost uprises, heat history increases, the problem that therefore exists the reliability of parts to reduce.
In core substrate-core substrate is stacked, between core substrate and core substrate, configure one deck insulating properties coverlay, utilize conductivity salient point to make to be electrically connected between core substrate.
As the variation of the execution mode of the manufacture method of multilayer circuit board of the present invention, comprise that in a lump stacked, sequential cascade and core substrate-core substrate are stacked.
(manufacture method of parts for wiring board)
Use in the manufacture method of parts at the wiring board of embodiment of the present invention, the overshooting shape conductivity salient points such as cardinal principle truncated cone or general cylindrical are used as interlayer link.In addition, be formed on to high-density conductivity salient point (conductivity group of bumps) on support unit upper and around, coating insulative resin mixed liquor, forms mobility coverlay thus.At the resin that make insulative resin mixed liquor be not cured the condition of reaction under, make solvent evaporates, described mobility coverlay is solidified and make coverlay attenuate, make thus this mobility coverlay become insulating properties coverlay thereafter.
Thought if multilayer circuit board stacking part is pressurizeed in the situation that conductivity salient point is not exposed in the past, can not realize interlayer electrical connection.; the inventor finds that it not is necessary that conductivity salient point is exposed, that is, the inventor finds first: the insulative resin that wiring board is electrically separated by handle is stacked under the state of uncured coverlay; it is carried out to hot pressing, can make multilayer circuit board or composite multi-layer wiring board; And can realize interlayer electrical connection with high stability according to the method.Also confirm, the multilayer circuit board producing by the method or composite multi-layer wiring board, have the reliability of good electrical connection simultaneously.In addition, multilayer circuit board of the present invention, in the situation that conductivity salient point is exposed, although can increase process number, with identical in the situation that conductivity salient point is not exposed, all has the effect that can tackle high-density installation etc.Compared with the situation that conductivity salient point is not exposed, can further improve the conducting stability between wiring.In the situation that conductivity salient point is exposed, append and carry out following operation: by making at least a portion solvent evaporation of described mobility coverlay, reduce the thickness of described insulating properties coverlay, make thus the leading section of described conductivity salient point give prominence on described insulating properties coverlay.In the time being only coated with thinly insulative resin mixed liquor on conductivity salient point, resin mixture liquor can remain on the leading section of conductivity salient point.If be coated with after the resin mixture liquor thicker than the height of conductivity salient point, make solvent evaporation, can conductivity salient point be exposed with good repeatability.
In addition, in this manual, after coating resin mixed liquor, the insulating properties coverlay of thickness before reducing call mobility coverlay.On the other hand, after thickness reduces, the insulating properties coverlay of curing reaction before starting call the uncured coverlay of insulating properties.Thus, the two difference is come.
In the present invention, with pass through B 2the such perforation of it makes conductivity salient point front end give prominence to the manufacture method difference on insulating properties coverlay, forms the stage of insulating properties coverlay in conductivity salient point surrounding, and conductivity salient point and insulating properties coverlay are not applied to mechanical pressure.Therefore, the present invention, aspect the mechanical endurance of insulating properties coverlay, can tackle the densification of conductivity salient point.In addition can reduce, the bottom surface diameter of conductivity salient point.In addition can also reduce, the draw ratio of conductivity salient point.Therefore, can make the design margin of conductivity salient point shape and the nargin of creating conditions improve, therefore can improve the fabrication yield of multilayer circuit board.
Multilayer circuit board of the present invention is characterised in that with parts, by being dissolved in resin-cast in solvent around group of bumps, after fully around adhesional wetting conductivity salient point, make to be dissolved in resin drying in solvent/solidify, thereby obtain the uncured coverlay of insulating properties, therefore there is the structure that conductivity salient point and resin closely bond.On the other hand, for example, at B in the past 2insulative resin in it is the solid thin-sheet after solvent evaporation that makes that is commonly referred to as the B stage.At B 2in it, heat and make this solid thin-sheet softening by utilization, thereby make conductivity salient point connect this thin slice.In such method, perforation is by the pressure perforation of carrying out of breaking, and therefore often around salient point, forms gap, compared with the present invention, and the poor reliability of conductivity salient point and resin bonding.
(dispersion of insulating properties filler)
For solve narrate above because substrate warp causes the problem of interlayer wiring bad connection, the inventor finds: make the fillers dispersed of insulating properties is very effective in the interlayer dielectric of multilager base plate.
Multilayer circuit board of the present invention is characterised in that, it comprises: conductivity group of bumps, is formed between the first conductor layer and the second conductor layer; And insulating barrier, be formed on around described conductivity group of bumps, containing being useful on the insulating properties filler that makes conduction stable.In addition, preferably, more than 20% in the scope below 100% of the average height of the conductivity group of bumps of the average grain diameter of insulating properties filler after laminating hot pressing.
(a) of Fig. 8 is the cutaway view of multi-layer wire substrate of the present invention.Core substrate 201 and core substrate 207 are stacked together by being dispersed with the insulative resin layer 204 of insulating properties filler 205.The wiring that is configured to core substrate 201 1 sides is mutually relative with the wiring of core substrate 207 1 sides.Part wiring region is electrically connected by conductivity salient point 203.On core substrate, for example there is the large warpage of the shape outstanding at central portion, therefore, the distance between core substrate is large at core substrate periphery.For the interlayer of realizing substrate periphery portion connects, must make core substrate enough close.In the situation that not being dispersed with insulating properties filler, as shown in Fig. 8 (b), the wiring of substrate center portion is short-circuited.According to manufacture method of the present invention, in insulative resin layer 204, be dispersed with the insulating properties fillers such as the silicon dioxide little to pressurizing and deformation, therefore, as shown in Fig. 8 (a), be also difficult to occur short-circuit in substrate center portion.
As described above, multilayer circuit board of the present invention is characterised in that, using the insulating barrier that contains the insulating properties filler that prevents that short circuit from using as component part.Use this object that prevents the insulating barrier that short circuit uses to be not only to prevent the short circuit between multiple conductors, be also not affect the conduction of above-below direction of the conductivity salient point for the interlayer of multilayer circuit board is electrically connected and the thickness of guaranteeing insulating barrier for preventing short circuit.
(thin-film technique and thick-film technique)
The process technology of manufacturing multilayer circuit board use is generally divided into thin-film technique and thick-film technique.
Thin-film technique is the process technology centered by vacuum technology and wet processing.What the film formation technology using in thin-film technique can exemplify has evaporation, sputter, CVD, PVD, plating etc.What in addition, pattern formation technology can exemplify has the technology such as photoetching, dry ecthing.For the installation wiring board that is called as wiring board or printed substrate, generally, in the processing of 50 μ m or 50 μ m fine wiring width below horizontal, spacing, the thin-film techniques such as semi-additive process are used.According to this technique, though can carry out the processing of fine pattern, there is the problem that manufacturing cost is high in this technique.
On the other hand, thick-film technique is representational is the process technology centered by printing such as silk screen printing.Thick-film technique is dry process, and is the technique under atmospheric condition.Thick-film technique has the feature that manufacturing cost is lower than thin-film technique.
For example, in order to make the much higher sandwich circuit board of wiring density of the wiring width having below 100 μ m, must make the bottom surface diameter of overshooting shape conductivity salient point that connects via as interlayer below 100 μ m simultaneously.But, connecting in the manufacture method of prepreg of insulative resin at the use conductivity salient point as previous methods, present situation is that the thickness of prepreg is minimum also more than 30 μ m.In order stably to connect described thickness with conductivity salient point, need to make the height of conductivity salient point be about the more than 3 times of prepreg thickness.Therefore, in order to make the miniaturization of conductivity salient point diameter, have to increase the draw ratio of conductivity salient point, the fine conductivity salient point below formation 100 μ m φ is very difficult.In the past in order to realize the via diameter that has below 100 μ m and the high-density circuit board of wiring width, general manufacturing cost and the large thin-film technique of manufacturing equipment investment (for example form fine wiring pattern case by semi-additive process, with sensitization guide hole method (Off ォ ト PVC ア method) form fine via) of using.
(organic wiring board)
Multilayer circuit board, because of baseplate material difference, is generally divided into organic wiring board and inorganic wiring board.The organic wiring board of the present invention taking use organic material as insulating properties baseplate material is as object.
(definition of the term relevant with insulating barrier, conductor layer)
In this manual, the term relevant with insulating barrier is defined as follows.
The liquid that insulative resin is dissolved under the state in solvent is called to " insulative resin mixed liquor ".After this insulative resin mixed liquor is coated on parts, the film that solvent evaporates is obtained, is called " the uncured coverlay of insulating properties ".To the uncured coverlay heating of this insulating properties, make to be contained in the film that the resin generation curing reaction in the uncured coverlay of insulating properties obtains, be called " insulating properties coverlay ".The insulating properties coverlay under the state being layered on conductor layer or core substrate, be called " insulating barrier ".
In addition, " conductor layer " is the layer that the conductivity such as metal are high, for example, comprise pattern layers, solid layer (べ Layer), contact layer.
[the multilayer line plate member of embodiment of the present invention and its manufacture method]
(the first object lesson of the manufacture method of multilayer line plate member)
(a) of Fig. 1 is the cutaway view that represents the process sequence of the first object lesson of the execution mode of multilayer circuit board component manufacturing method of the present invention to Fig. 1 (d).First, prepare the conductivity paper tinsels 1 (Fig. 1 (a)) such as Copper Foil.Then the assigned position on conductivity paper tinsel 1 forms conductivity salient point 2 (Fig. 1 (b)).Preferably, make the shape of conductivity salient point 2 become the leading section diameter of section shape less than base diameter such as truncated cone or general cylindrical substantially.For example form conductivity salient point by the silk screen printing of electrocondution slurry.As the electrocondution slurry of material that forms conductivity salient point 2, for example, use by metallic particles (silver, gold, copper, scolding tin etc.) being dispersed in after also sneaking into as required volatile solvent in liquid resin and obtain material.Conductivity salient point is printed as to regulation shape and specified altitude.In the case of the height that can not obtain by a silk screen printing needing, repeatedly print repeatedly on the shape limit of limit change mask (マ ス Network) as required.Then the insulative resin mixed liquor that is dispersed with insulating properties filler 4 by handle be coated on conductivity salient point 2 and conductivity salient point 2 around, form mobility coverlay 3 (Fig. 1 (c)).Then make mobility coverlay 3 dry, make solvent evaporation, obtain thus the uncured coverlay 5 of insulating properties, thereby be made as the board part (Fig. 1 (d)) of multilayer line plate member.As shown in Fig. 1 (d), in the first object lesson, the height of the Thickness Ratio conductivity salient point 2 of the uncured coverlay 5 of insulating properties is large, and this stage that is illustrated in Fig. 1 (d) need not make conductivity salient point expose.
(the second object lesson of the manufacture method of multilayer line plate member)
(a) of Fig. 2 is the cutaway view that represents the process sequence of the second object lesson of the execution mode of multilayer circuit board component manufacturing method of the present invention to Fig. 2 (d).First, prepare the conductivity paper tinsels 11 (Fig. 2 (a)) such as Copper Foil.Then the assigned position on conductivity paper tinsel 11 forms conductivity salient point 12 (Fig. 2 (b)).Preferably, make the shape of conductivity salient point 12 become the diameter shape less than base diameter in the leading section cross section such as truncated cone or general cylindrical substantially.For example, form conductivity salient point by the silk screen printing of electrocondution slurry.For example use by metallic particles (silver, gold, copper, scolding tin etc.) being dispersed in liquid resin and sneaking into as required the material obtaining after volatile solvent as the electrocondution slurry of conductivity salient point 12 materials.Conductivity salient point is printed as to regulation shape and specified altitude.In the case of the height that can not obtain by a silk screen printing needing, repeatedly print repeatedly on change mask shape limit in limit as required.Then the insulative resin mixed liquor that is dispersed with insulating properties filler 4 by handle be coated on conductivity salient point 12 and conductivity salient point 12 around, form mobility coverlay 13 (Fig. 2 (c)).Then, for example heat by drying oven, make to be contained in the amount of the volatile ingredient evaporation regulation in mobility coverlay 13, reduce thus the thickness of mobility coverlay 13, obtain the uncured coverlay 15 of insulating properties, thereby be made as the board part (Fig. 2 (d)) of multilayer line plate member.Now, adjust the amount and the heating condition that are contained in the volatile ingredient in insulative resin mixed liquor, to reduce the thickness of mobility coverlay 13, its result, exposes the leading section of conductivity salient point 12.
(the 3rd object lesson of the manufacture method of multilayer line plate member)
(a) of Fig. 3 is the cutaway view that represents the process sequence of the 3rd object lesson of the execution mode of multilayer line board fabrication method of the present invention to (i).First, prepare the conductivity paper tinsels 21 (Fig. 3 (a)) such as Copper Foil.Then, the assigned position on conductivity paper tinsel 21 forms conductivity salient point 22 (Fig. 3 (b)).Preferably, make the shape of conductivity salient point 22 become the diameter shape less than base diameter in the leading section cross section such as truncated cone or general cylindrical substantially.For example, form conductivity salient point by the silk screen printing of electrocondution slurry.For example use by metallic particles (silver, gold, copper, scolding tin etc.) being dispersed in liquid resin and sneaking into as required the material obtaining after volatile solvent as the electrocondution slurry of conductivity salient point 22 materials.Conductivity salient point is printed as to regulation shape and specified altitude.In the case of the height that can not obtain by a silk screen printing needing, repeatedly print repeatedly on change mask shape limit in limit as required.Then, the insulative resin mixed liquor that is dispersed with insulating properties filler 24 by handle be coated on conductivity salient point 22 and conductivity salient point 22 around, form mobility coverlay 23 (Fig. 3 (c)).Then, for example heat by drying oven, make to be contained in the amount of the volatile ingredient evaporation regulation in mobility coverlay 23, reduce thus the thickness of mobility coverlay 23, obtain the uncured coverlay 25 of insulating properties, thereby be made as the board part (Fig. 3 (d)) of multilayer line plate member.Now, adjust the amount and the heating condition that are contained in the volatile ingredient in insulative resin mixed liquor, to reduce the thickness of mobility coverlay 23, its result, exposes the leading section of conductivity salient point 22.Reduce the heating in operation by thickness, the mobility of the uncured coverlay 23 of insulating properties changes, and forms thus insulating properties coverlay 25.Preferably, the heating condition of insulating properties coverlay 25 being adjusted to insulating properties coverlay 25 starts curing reaction but does not reach completely crued degree.Thus, cementability can not make stacked insulating properties coverlay time worsens, and process circuit plate becomes easy while making to form conductive pattern overleaf.Then, form diaphragm 26 (Fig. 3 (e)) by being layered on insulating properties coverlay 25 that thickness reduced and conductivity salient point 22.Diaphragm 26 for example, is made up of the organic resin film that can make the leading section of conductivity salient point 22 be embedded (Network レ ラ ッ プ, パ イ レ Application, nylon, PET, PPT or PI).As subsequent handling go up overleaf printing conductive pattern time, for protect conductivity salient point 22 indeformable and damage and form diaphragm 26.Then, on the conductivity paper tinsel 21 at insulating properties coverlay 25 back sides, for example, form resist pattern by photoetching process.Then make resist pattern become mask by wet etching, conductivity paper tinsel 21 is carried out to etching, remove thus resist pattern, form wiring 27, diaphragm 26 is peeled off to (Fig. 3 (g)).Then, by insulative resin mixed liquor is coated on conductivity salient point 22 and conductivity salient point 22 around, form mobility coverlay 28 (Fig. 3 (h)).Then, for example heat by drying oven, make to be contained in the amount of the volatile ingredient evaporation regulation in mobility coverlay 28, reduce thus the thickness of mobility coverlay 28, obtain the uncured coverlay 29 of insulating properties, thereby make board part (Fig. 3 (i)).Insulating properties coverlay 29 is uncured coverlays, therefore can improve insulating properties coverlay 29 and the cementability that contacts stacked parts with insulating properties coverlay 29.
[detailed description relevant with manufacture method, material etc.]
Below to conductivity salient point, insulating properties coverlay and connect up relevant, suitable manufacture method and the material etc. of multilayer line plate member that forms embodiment of the present invention, be elaborated.
[manufacture method]
(formation of conductivity salient point)
1. the preparation section of electrocondution slurry
By resin combination and conductive particle are dissolved or be dispersed in solvent, prepare used electrocondution slurry.
2. the printing of electrocondution slurry, be dried/solidify operation
For example utilize silk screen print method to form conductivity salient point., the mask specifying by use in the circuit board or on supporting substrates, forms conductivity salient point electrocondution slurry printing.In order to be formed with the conductivity salient point of specified altitude and draw ratio, can use as required different masks repeatedly to print.
(formation of insulating properties coverlay)
1. the preparation section of insulative resin mixed liquor
By compositions of thermosetting resin is dissolved or is dispersed in solvent, prepare insulative resin mixed liquor.As solvent for example with an organic solvent.What can exemplify as organic solvent has ketone series solvent, an aromatic series series solvent.What for example the former can exemplify has methylethylketone and methyl iso-butyl ketone (MIBK), and what the latter can exemplify has toluene and dimethylbenzene.
Make insulating properties fillers dispersed in solvent simultaneously.Preferably, insulating properties uniform filling is dispersed in solvent.Insulating properties filler with respect to the addition of insulating resin composition preferably more than 10vol% (10 volume %).
About the use amount of solvent, for conductivity salient point suitably being exposed by the evaporation of solvent, preferably, the content that is adjusted to volatile ingredient in insulative resin mixed liquor becomes suitable scope.For example preferably, by solvent dilution resin, make N.V. (content of fixedness resinous principle) in the scope of 10 % by weight～80 % by weight.In addition, the viscosity of insulative resin mixed liquor is preferably in the scope of 100～600mPas.If viscosity is too low, have in the time of coating resin mixed liquor, because of resin mixture liquor trickling cause can not coating resin mixed liquor problem.If viscosity is too high, the problem that exists the flatness of coating surface to worsen.
The epoxy resin using in the manufacture of multilayer circuit board insulating properties coverlay of the present invention and oligomerisation phenylene ether resin are all solids at normal temperatures, are the resins that shows thermal softening at the temperature to 100 DEG C of left and right.Powder or membranaceous solid material dissolved or be distributed in solvent, and heat as required, thereby obtaining resin mixture liquor (liquid).After resin mixture liquor is coated on substrate, be dried and turn back to normal temperature, resin mixture liquor becomes coverlay (solid) thus.In the manufacture of multilayer circuit board of the present invention, particularly preferably be use and can make be dried/the setting temperature solvent in 160 DEG C of following scopes and combination of resin more than 60 DEG C.
2. the painting process of insulative resin mixed liquor
The insulative resin mixed liquor obtaining by handle is applied on the supporting mass of conductivity salient point, forms insulating properties coverlay.There is no particular limitation for coating process.Preferably, for example use scraper plate method, curtain coating method, nick version rubbing method, slot coated method (ス ロ ッ ト ダ イ method).In addition,, in painting process, preferably make the height of Thickness Ratio conductivity salient point of insulating properties coverlay of coating large.If after being coated with the insulating properties coverlay that Thickness Ratio conductivity bump height is large, to less than the height of conductivity salient point, can conductivity salient point evenly be exposed with good repeatability the reduced thickness of insulating properties coverlay.
3. solvent evaporization process
Solvent evaporization process must not carry out aspect manufacture multilayer line plate member of the present invention., compared with not carrying out the situation of solvent evaporation, can obtain higher wiring connective stability.Specifically, by the insulating properties coverlay of coating is heated or makes it natural drying, make the volatile ingredient evaporation in insulating properties coverlay, reduce thus the thickness of insulating properties coverlay.According to exhaust wind speed, the air quantity etc. of the kind of solvent, drying machine, need suitably to adjust the processing time for set point of temperature.For example being set as at 80～120 DEG C for the processing time of set point of temperature is about 1～30 minute.
(laminating hot pressing)
Stacked in a lump in the situation that, limit is carried out multiple board parts and core substrate gulde edge stacked as required.,, by they are pressurizeed under heated condition, form multilayer circuit board thereafter.On the other hand, the in the situation that of sequential cascade, multiple board parts are stacked with core substrate and carry out hot pressing one by one.Heating condition is preferably set for below the heat resisting temperature of thermosetting resin that forms multilayer circuit board and is to make the completely crued temperature of this thermosetting resin.The condition of hot pressing can suitably be set.More than the temperature that preferably heating-up temperature starts at insulative resin to decline below the temperature of curing reaction and in heat fusing viscosity (Hot dissolves viscosity).In addition, the condition of hot pressing preferably: even the in the situation that of having insulating properties filler on conductivity salient point, in the operation of laminating hot pressing, conductivity salient point does not also crack, and can fully guarantee electrical connection.For example described condition can be that temperature is that 170～210 DEG C, actual pressure are 5～15kgf/cm 2.In this laminating hot pressing, can make the lowest melt viscosity of cured films higher, therefore in hot pressing, resin can not flow, and therefore can make the resin thickness before and after solidifying substantially certain.In addition the having good uniformity of resin thickness after can making to solidify.
[material]
(conductivity convex point material)
Form the resin combination of electrocondution slurry preferably, for example, use the thermosetting resins such as phenolic resins, epoxy resin, melmac.Because thermosetting resin has mobility, so be easily shaped, therefore by subsequent handling, thermosetting resin being heating and curing, can make this thermosetting resin there is certain mechanical strength.
The solvent of dissolving or dissipating resin composition for example with an organic solvent.What can exemplify as machine solvent has the aromatic series such as toluene, dimethylbenzene series solvent, a ketone series solvent etc.As ketone series solvent, what can exemplify has methylethylketone, a methyl iso-butyl ketone (MIBK).Be dispersed in preferably a certain in Ag, Cu, Au, Ni or at least two or more mixture in them of conductive particle in resin mixture liquor, or use their compound.
In addition, form the resin combination material of conductivity salient point, preferably use with the mixing ratio below the above 30wt% of 10wt% and in described thermosetting resin, added the material that thermoplastic resin obtains.In the laminating hot pressing operation of multi-layer wire substrate, the effect that can be inhibited and crack on conductivity salient point.
(insulating properties coverlay material)
In advanced information society, for the large capacity information of high-speed transfer, make the development year by year of operating frequency high speed of electronic equipment in recent years.For the multilayer circuit board being arranged in electronic equipment, as the insulating properties coverlay material that forms wiring board, require to use relative dielectric constant and the low material of dielectric loss.
In addition,, along with miniaturization and the slimming of electronic equipment, also require wiring board slimming.Therefore, insulating properties coverlay material preferably can form with high repeatability the material of thin insulating properties coverlay.In addition in order to reduce manufacturing cost, even if preferably use the material that also can make film attenuation in the situation that using thick-film technique.
As the insulating properties component materials in the manufacture of multilayer circuit board of the present invention, preferably use the thermosetting resin that relative dielectric constant and dielectric loss angle tangent are low, for example, preferably use epoxy resin, bismaleimide-triazine resin, polyimide resin, acrylic resin, phenolic resins, oligomerisation phenylene ether resin, polyether resin, melmac etc.
As thermoset resin material, preferably use the relative dielectric constant meeting after solidifying is 2.0～3.0 scopes or to meet dielectric loss angle tangent be the material of 0.001～0.005 scope under 5GHz under 5GHz.
< epoxy resin >
In addition, also can be applicable to using as described compositions of thermosetting resin the composition epoxy resin of recording in PCT publication number WO2005/100435.Specifically, this composition epoxy resin comprises that to have more than one hydroxyl and plural epoxy radicals, weight average molecular weight be 1,500～70,000 straight chain shape epoxy resin (A); The phenol-formaldehyde resin modified (sex change Off ェ ノ ー Le ノ ボ ラ ッ Network) at least a portion esterification of phenol hydroxyl being obtained with aliphatic acid (B).In addition,, in this composition epoxy resin, the content of described phenol-formaldehyde resin modified (B) is 30～200 weight portions with respect to the described straight chain shape epoxy resin (A) of 100 weight portions.The dielectric property (for example low-k, low dielectric loss angle tangent) of this composition epoxy resin is good.
The weight average molecular weight of straight chain shape epoxy resin (A) is 1,500～70,000.
The number-average molecular weight of straight chain shape epoxy resin (A) preferably 3,700～74,000, more preferably 5,500～26,000.
The epoxide equivalent of straight chain shape epoxy resin (A) is preferably more than 5000g/eq (5000g/ equivalent).
In addition, the weight average molecular weight in this specification and number-average molecular weight are to utilize gel permeation chromatography (GPC), the value that uses the calibration curve of polystyrene standard to obtain.
Particularly preferably be, in straight chain shape epoxy resin (A), the scope that weight-average molecular weight/number-average molecular weight is 2～3.
Specifically, the compound of for example preferably using following chemical formula (1) to represent as straight chain shape epoxy resin (A), the compound of more preferably using following chemical formula (2) to represent.
[changing 1]
In described chemical formula, X and Y represent respectively alkyl, that singly-bound, carbon number are 1～7 ?O ?, ?S ?, ?SO2 ?, ?CO ?or with the group of following chemical formulation.At X and Y, be multiple in the situation that, each X and Y can be identical, also can be different.
[changing 2]
Wherein, the R in above-mentioned chemical formula 2represent alkyl or halogen atom that carbon number is 1～10.At R 2in multiple situations, each R 2can be identical, also can be different.R 3represent alkyl or halogen atom that hydrogen atom, carbon number are 1～10.Q is 0～5 integer.
In described chemical formula (1)～chemical formula (2), R 1and R 4represent that respectively carbon number is 1～10 alkyl or halogen atom.At R 1and R 4in multiple situations, each R 1and R 4can be identical, also can be different.
P and s are respectively 0～4 integers, and they can be identical, also can be different.
In described chemical formula (1), n represents mean value.This n is 25～500.
In described chemical formula (2), t represents mean value.This t is 10～250.
Straight chain shape epoxy resin (A) compound that more preferably p in described chemical formula (1) is 0, the compound of more preferably using chemical formula (1 ') to represent.
[changing 3]
In above-mentioned chemical formula, X and n are identical connotations with X in described chemical formula (1) and n respectively.
Described straight chain shape epoxy resin (A) can use separately, also can use in addition two or more straight chain shape epoxy resin (A) simultaneously.
As the suitable example of the phenol-formaldehyde resin modified (B) obtaining with fatty acid esterification by described at least a portion phenol hydroxyl, can exemplify out the phenol-formaldehyde resin modified representing with following chemical formula (3).
[changing 4]
In described chemical formula (3), R 5represent the alkyl that carbon number is 1～5.R 5preferably methyl.Multiple R 5can be identical, also can be different.
R 6represent the carbon number alkyl that is 1～5, can have substituent phenyl, can have substituent aralkyl, alkoxy or halogen atom.Multiple R 6can be identical, also can be different.
R 7represent the carbon number alkyl that is 1～5, can have substituent phenyl, can have substituent aralkyl, alkoxy or halogen atom.Multiple R 7can be identical, also can be different.
G represents 0～3 integer.Multiple g can be identical, also can be different.
H represents 0～3 integer.Multiple h can be identical, also can be different.
N:m is 1:1～1.2:1, and preferably n:m is about 1:1.
It can be for example 2～4 that n and m add up to.
N in described chemical formula (3) and m are the mean value of repetitive.The order of repetitive does not limit.This order can be block, can be also random.
As preferred phenol-formaldehyde resin modified (B), can exemplify the phenol-formaldehyde resin modified representing with following chemical formula (3 ').
[changing 5]
In above-mentioned chemical formula (3 '), R 5, n and m respectively with described chemical formula (3) in R 5, n is identical with m.
Particularly preferred phenol-formaldehyde resin modified is the R in described chemical formula (3 ') 5the acetylation phenolic resins of methyl.
Described phenol-formaldehyde resin modified can use separately, also can use in addition two or more phenol-formaldehyde resin modifieds simultaneously.
The content of described (B) composition is preferably 30～200 weight portions with respect to described (A) composition of 100 weight portions.If (B) content of composition is within the scope of this, dielectric property, film forming, solidification reactivity are good.The content of described (B) composition is more preferably 50～180 weight portions with respect to described (A) composition of 100 weight portions.
One of preferred mode of described composition epoxy resin is also to contain (C) isocyanate compound.The in the situation that of having hydroxyl in epoxy resin, isocyanates radical reaction in hydroxyl and the isocyanate compound generating when this hydroxyl or epoxy resin open loop, form thus amino-formate bond (ウ レ タ ン Knot closes), the crosslink density of the polymer after therefore solidifying increases, the motility of molecule further reduces, in addition reduced the large hydroxyl of polarity, therefore can make relative dielectric constant further reduce, and can make dielectric loss angle tangent reduce.In addition, epoxy resin has large molecular separating force, therefore in the situation that making epoxy resin membranization, be difficult to even film forming, even if make in addition epoxy resin membranization, film strength also a little less than, have the tendency that easily occurs crackle when film forming, but by allocating isocyanate compound into, can eliminate these shortcomings.
As described isocyanate compound, what can exemplify is the compound that has plural NCO.For example, as described isocyanate compound, what can exemplify has a hexamethylene diisocyanate, methyl diphenylene diisocyanate, toluene di-isocyanate(TDI), IPDI, dicyclohexyl methyl hydride diisocyanate, tetramethylxylylene diisocyanate, XDI, naphthalene diisocyanate, trimethyl hexamethylene diisocyanate, dimethyl diphenyl vulcabond, PPDI, cyclohexyl diisocyanate, dimer acid diisocyanate, hydrogenation of benzene dimethylene diisocyanate, LDI, triphenylmethane triisocyanate, triphosphoric acid three (phenyl isocyanate) (ト リ (イ ソ シ ア ネ ー ト Off ェ ニ Le) ト リ ホ ス フ ァ ー ト) etc.They can use separately, also can use in addition two or more described isocyanate compounds simultaneously.
Wherein preferably use hexamethylene diisocyanate, methyl diphenylene diisocyanate.
In addition, comprise the prepolymer with the chlorinated isocyanurates ring that utilizes annulation formation at described isocyanate compound.For example comprise the trimeric prepolymer that comprises isocyanate compound.
Particularly preferably be, described isocyanate compound and described straight chain shape epoxy resin (A) are used in combination.In this case, except following the hydroxyl of ring-opening reaction generation and the reaction of NCO of epoxy resin, the hydroxyl and the NCO that are present in straight chain shape epoxy resin (A) also can react, and therefore can obtain larger effect.
Preferably, described (C) component content is 100～400 weight portions with respect to described (A) composition of 100 weight portions to described (C) component content, more preferably 300～350 weight portions.If (C) content of composition is within the scope of this, can be suppressed at while solidifying and produce bubble, therefore easily obtain uniform film, after solidifying, be not easy to crack, in addition also good (for example low-k, low dielectric loss angle tangent) of dielectric property.
One of preferred mode of described composition epoxy resin is also to contain (D) divinylbenzene.Contain low temperature that divinylbenzene contributes to the melt temperature of crosslinking component, improve mobility while shaping, the low temperature of curing temperature and improve intermiscibility.
The content of described (D) composition preferably, is 40～180 weight portions with respect to described (A) composition of 100 weight portions.
Described composition epoxy resin also can contain the curing accelerator as any composition.
As curing accelerator, can be used as the known material of the curing accelerator of composition epoxy resin.As curing accelerator, what can exemplify has: 2 ?methylimidazole, 2 ?Yi Ji ?4 ?the heterocyclic compound imidazoles such as methylimidazole; The phosphorus compound classes such as triphenylphosphine, tetraphenyl boron tetraphenyl phosphine; 2,4,6 ?the tertiary amines such as three (dimethylamino methyl) phenol, benzyl dimethylamine; 1,8 ?diazabicyclo (5,4,0) hendecene or its salt etc. BBU class, with epoxy radicals, urea, acid etc., amine, imidazoles being carried out addition product type promoter class that addition obtains etc.
The content of curing accelerator preferably, is 1～10 weight portion with respect to described (A) composition of 100 weight portions.
Described composition epoxy resin also can contain the polymerization initiator as any composition.
Polymerization initiator can use known polymerization initiator.As this polymerization initiator, what can exemplify has benzoyl peroxide, azobis isobutyronitrile, a peroxidized t-butyl perbenzoate, 1,1,3,3 ?tetramethyl butyl cross Yang Ji ?2 ?ethylhexoate etc.
The content of polymerization initiator is preferably 1～10 weight portion with respect to described (A) composition of 100 weight portions.
Described composition epoxy resin also can contain the additives such as tackifier, fire retardant, defoamer, flowing regulator, dispersing aid as required.
In addition, described composition epoxy resin is in the scope without detriment to the object of the invention, to improve modulus of elasticity, to reduce the coefficient of expansion or change vitrification point (Tg value) etc. as object, also can contain as required (A) composition epoxy resin in addition.
As the epoxy resin beyond (A) composition, what can exemplify has bisphenol A type epoxy resin, bisphenol f type epoxy resin, cycloaliphatic epoxy resin, a biphenyl epoxy resin etc.They can use separately, also can use two or more described epoxy resin simultaneously.
In addition, described composition epoxy resin, in the scope without detriment to the object of the invention, also can contain known epoxy curing agents such as not carrying out fatty acid-esterified phenolic resins, cresol novolac resin, phenol syncytiam (Off ェ ノ ー Le syncytiam).
As phenol syncytiam, the phenol that has 3～5 nucleome degree etc. that can exemplify.
Described composition epoxy resin can be manufactured by known method.For example, can, in the situation that having solvent exist or there is no solvent, mix by propeller agitator, banbury (バ Application バ リ ー formula ミ キ サ ー), planet strrier, heating, vacuum mixing kneading machine etc. (A) with (B).
In addition, for example, resinous principle can be dissolved into the solvent strength of regulation, they of ormal weight are packed in the reactor that is heated to 25～60 DEG C, under normal pressure, mix 30 minutes～6 hours.Thereafter (maximum 1Torr) mix and blend 5 minutes～60 minutes again under vacuum.
< OPE resin >
In addition,, as described compositions of thermosetting resin, also can be applicable to using oligomerisation phenylene ether is resin compound.Specifically, (A) composition is the oligomerisation phenylene ether that heat cured number-average molecular weight more than 1000 below 3000, two ends have functional group.In addition, (B) composition is block copolymer, this block copolymer comprises hard section of block portion and the soft section of block portion taking conjugated diene as main body taking vinylaromatic hydrocarbon as main body, and can enumerate by being resin compound with the oligomerisation phenylene ether that does not produce curing reaction the solvent evaporates of the insulative resin mixed liquor of allocating solvent into is obtained.
At this, in described insulative resin mixed liquor, (B) composition (A) composition with respect to 100 parts be 67 parts above below 150 parts.In addition, (B) composition of the uncured coverlay of described insulating properties be from rubber and/or Ben Yi Xi ?Ding bis-Xi ?styrene block copolymer, Ben Yi Xi ?Yi Wu bis-Xi ?styrene block copolymer, Ben Yi Xi ?ethene/Ding bis-Xi ?more than one the thermoplastic elastomer (TPE) selected styrol copolymer.
As the thermosetting resin using in described compositions of thermosetting resin, what can exemplify has the thermosetting oligomerisation phenylene ether resin or the epoxy resin etc. that there are the functional groups such as styrenic functionality, vinyl, glycidyl, amino, hydroxyl, carboxyl at two ends.Wherein, preferably have thermosetting oligomerisation phenylene ether resin or the epoxy resin of styrenic functionality at two ends, this is because they are such as, at aspects such as dielectric property (low-k, low dielectric loss angle tangent), low water absorbable, film formatives good.
Described compositions of thermosetting resin preferably the applicant the Japanese patent application No. 2006 of having applied for ?the oligomerisation phenylene ether based resin composition recorded in 215464 specifications.Specifically, for example comprise the compositions of thermosetting resin of the thermosetting oligomerisation phenylene ether (A) of 100 weight portions and the block copolymer (B) of 50～250 weight portions, because it for example, at dielectric property (low-k, low dielectric loss angle tangent), low elasticity, the aspects such as film formative are good, so be preferred, wherein, the number-average molecular weight of described thermosetting oligomerisation phenylene ether (A) is 500～5000, there is styrenic functionality at two ends, the recurring unit that described block copolymer (B) comprises vinyl aromatic hydrocarbon monomer origin and the recurring unit of conjugate diene monomer origin.
As described thermosetting oligomerisation phenylene ether (A), can exemplify have Japanese Patent Publication communique JP 2006 ?record for No. 28111 2,2 ', 3,3 ', 5,5 ′ ?hexamethyl Lian Ben ?4,4 ′ ?Er Chun ?2,6 ?the product of xylenol condensation polymer and 1-chloro-4-methyl-benzene.
Such thermosetting oligomerisation phenylene ether (A) can be manufactured by known method.In addition also can use the commodity of selling on market.For example can be applicable to using OPE ?2st2200 (aerochemistry Co., Ltd. of Mitsubishi manufactures (the ガ ス of Mitsubishi chemistry She System)).
If the number-average molecular weight of thermosetting oligomerisation phenylene ether (A) is greater than 5,000, be difficult to be dissolved in volatile solvent.On the other hand, if the number-average molecular weight of thermosetting oligomerisation phenylene ether (A) is less than 500, because crosslink density is too high, the modulus of elasticity on solidfied material and flexiblely have a bad impact.Therefore, the number-average molecular weight of thermosetting oligomerisation phenylene ether (A) is 500～5,000, preferably 1,000～3,000.
Described block copolymer (B) is to contain hard section of block portion taking vinylaromatic hydrocarbon as main body and the block copolymer of the soft section of block portion taking conjugated diene as main body.
As described block copolymer (B), can exemplify have Ben Yi Xi ?Ding bis-Xi ?styrene block copolymer, Ben Yi Xi ?Yi Wu bis-Xi ?styrene block copolymer, Ben Yi Xi ?ethene/Ding bis-Xi ?styrene block copolymer etc.
Block copolymer (B) can be manufactured by known method.In addition also can use the commodity of selling on market.For example, can be applicable to using TR2003 (JSR Corp.'s manufacture).
The content of the block copolymer (B) in described compositions of thermosetting resin is 50～250 weight portions with respect to the thermosetting oligomerisation phenylene ether (A) of 100 weight portions, preferably 65～200 weight portions, more preferably 80～150 weight portions.If the content of block copolymer (B) in described scope, film form can, with the intermiscibility excellence of thermosetting oligomerisation phenylene ether (A).
As the volatile solvent using in described oligomerisation phenylene ether resin combination, what can exemplify has the aromatic series such as toluene, a dimethylbenzene series solvent; The ketone such as methylethylketone, methyl iso-butyl ketone (MIBK) series solvent etc.They can use separately one, also can use two or more volatile solvents simultaneously.
The content of volatile solvent is just passable in described scope as long as be suitably adjusted to the viscosity of composition, and there is no particular limitation.Preferably, using volatile solvent to make resinous principle is 15～45 % by weight, more preferably, uses volatile solvent to make resinous principle 15～35 % by weight.If the ratio of the resinous principle in composition within the scope of this, is easily impregnated in cellulosic matrix material, therefore can reduce bubble.For the described resin of such low concentration, in longitudinal type immersion system in the past, in order to obtain desirable resin adhesion amount, must make varnish adhesion amount increase.So substrate is in the time vertically advancing, the resin of dipping can drip down, therefore owing to forming inhomogeneous nicking, can form ugly resin speckle, in addition, although can produce dissolvent residual coated film is inner but therefore the phenomenon of dry tack free only can not obtain uniform its uncured state.
Described oligomerisation phenylene ether resin combination, in the scope without detriment to effect of the present invention, can also contain the additives such as inorganic filler, tackifier, fire retardant, defoamer, flowing regulator, coalescents, dispersing aid.
In addition, described oligomerisation phenylene ether resin combination can also contain curing catalysts.Described oligomerisation phenylene ether resin combination only just can solidify by heating.
There is no particular limitation for the manufacture method of described oligomerisation phenylene ether resin combination, can adopt known manufacture method.For example, described each composition is fully mixed by mixer, just can manufacture described oligomerisation phenylene ether resin combination.
＜ADFLEMA＞
Preferably, for example use ADFLEMA (trade name, Na Meishi Co., Ltd. manufactures) as insulative resin.ADFLEMA is the elastomeric resin that comprises the oligomerisation phenylene ether a kind of as OPE resin and styrene butadiene system.ADFLEMA product is the film of its uncured state., after its hot curing in the situation that, relative dielectric constant ε and dielectric loss angle tangent tan δ are: ε=2.0～3.0, dielectric loss angle tangent tan δ=0.001～0.005 are all less values.Therefore ADFLEMA product has good high frequency characteristics.In addition, ADFLEMA product can form the film that thickness is 2～90 μ m left and right.In addition, ADFLEMA product for example contains the volatile solvent of 70% left and right.Therefore, after coating, by heating or being dried, the thickness of ADFLEMA product for example can be reduced to 70%, therefore, ADFLEMA product is suitable for comprising by reducing thickness conductivity salient point is exposed in the multilayer circuit board manufacture of the present invention of operation.
< is contained in the fiber-based material > in insulative resin
Preferably, at not fibre-bearing basis material of the insulative resin using in parts for multilayer circuit board of the present invention.In this case, due to not fibre-bearing basis material of insulative resin mixed liquor, so can reduce the viscosity of mixed liquor, therefore to conductivity salient point around and the performance of substrate surface covering good.In addition,, by the operation of film attenuate, can reduce the mixed liquor residue on conductivity salient point head.On the other hand, if allocated the fiber-based materials such as short glass fiber in insulative resin mixed liquor, be very difficult to obtain homodisperse slurry.In addition, even if suppose to obtain homodisperse slurry, in the time of coating, can not avoid forming at conductivity salient point top the bridge of short fiber, in addition, import the effect objectionable intermingling that the poor glass fibre matrix material of dielectric property and the present invention will obtain.
< insulating properties filler >
Preferably, multilayer circuit board of the present invention with the insulating properties filler using in parts there is high electrical insulating property, not because the intensity of the layer insulation that can keep multi-layer wire substrate is out of shape, is had to laminating hot pressing and be made up of the material that being dispersed in solvent.As the material of insulating properties filler, preferably, for example, use one or more materials of selecting from silicon dioxide, carborundum, aluminium oxide, aluminium nitride, zirconium oxide bead, bead, acrylic acid pearl.
Preferably, insulating properties filler is powder or graininess.The average grain diameter of insulating properties filler is preferably more than 20% below 100% of conductivity bump height, is more preferably below 50% of conductivity salient point bottom surface diameter.
(wiring material)
About the wiring of multilayer circuit board, can form conductive pattern by conductivity paper tinsel is carried out to etching, also can form conductive pattern by printing conductive slurry.
Preferably, the resin combination of formation electrocondution slurry for example uses the thermosetting resins such as phenolic resins, epoxy resin, melmac.Thermosetting resin has mobility, is easily shaped, in addition, and can be by being heating and curing in subsequent handling, thus certain mechanical strength there is.
The solvent of dissolving or dissipating resin composition for example with an organic solvent.As organic solvent, what can exemplify has aromatic series series solvent, for example toluene, dimethylbenzene and a ketone series solvent.As ketone series solvent, what can exemplify has methylethylketone, a methyl iso-butyl ketone (MIBK).Be dispersed in the preferably material of any in Ag, Cu, Au, Ni, at least two or more mixing in them of conductive particle in resin mixture liquor, or use their compound.
For example can conductive particle (materials of for example, in Ag, Cu, Au, Ni any or at least two or more mixing in them) be dispersed in to the material of sneaking in resin, more volatile solvent by preparation, obtain electrocondution slurry.
< heat curing-type electrocondution slurry >
In addition, also can use heat curing-type electrocondution slurry as wiring material, in this case, even by the Low Temperature Heat Treatment of 100～200 DEG C, also can form the wiring with enough low resistance.In the situation that using heat curing-type electrocondution slurry, preferably make the thickness of wiring within the scope of 1～20 μ m.
The electrocondution slurry > that < contains silver-colored particulate
In addition, can use the disclosed electrocondution slurry of patent documentation 3 as the material of electrocondution slurry.The disclosed electrocondution slurry that contains silver-colored particulate of patent documentation 3 (material) is to regain from following product the electrocondution slurry obtaining, that is: in the situation that there is organic solvent or not having organic solvent, mixed carboxylic acid's silver salt and aliphatic amine, and add reducing agent, by being reaction at 20～80 DEG C in reaction temperature, obtain described product.
Preferably, be contained in the silver-colored particulate in electrocondution slurry:
(a) average grain diameter of primary particle is 40～350nm,
(b) crystallite dimension is 20～70nm,
(c) average grain diameter is 1～5 with the ratio of crystallite dimension.
In addition, further preferably, be contained in the silver-colored particulate in electrocondution slurry:
(a) average grain diameter of primary particle is 50～80nm,
(b) crystallite dimension is 20～50nm,
(c) average grain diameter is 1～4 with the ratio of crystallite dimension.
Even also demonstrate enough large conductivity under the Low Temperature Heat Treatment of this electrocondution slurry material below 200 DEG C.Even if this electrocondution slurry material also can solidify lower than the low temperature below organic wiring board heat resisting temperature, although carry out low-temperature setting, also can form conductor resistance lower by (approximately 10 × 10 ?5Ω cm is following) conductive pattern.Therefore, even if reduce the thickness of wiring, and wiring width is attenuated, also can suppress or reduce the increase of wiring delay.Because particle diameter is little, even when silk screen printing fine rule, be also difficult for stopping up.The particle diameter of the electrocondution slurry (for example containing the electrocondution slurry of nano particle) that the size ratio of this electrocondution slurry material contains other electrically conductive microparticles is large, and therefore this electrocondution slurry material is suitable for forming the wiring that thickness is 1 μ m～10 μ m.In addition,, by using this electrocondution slurry material, material cost can be suppressed to lower.In the situation that using patent documentation 3 disclosed electrocondution slurry, the thickness of wiring is preferably below 5 μ m.
[curing degree]
(curing degree of conductivity salient point)
In the stage midway of manufacturing process, forming the conductivity salient point of multilayer line plate member and the solid state of insulating properties coverlay can select from following combination.
(1) conductivity salient point: solid state completely; Insulating properties coverlay: its uncured state;
(2) conductivity salient point: uncured and completely solidify between state; Insulating properties coverlay: its uncured state;
Wherein, what is called refers to by suitable heat treatment at the state between uncured and completely curing, is cured to a certain degree, but does not reach completely crued resin state.
At B in the past 2in insulating properties coverlay in it technology, utilize heat to make the insulating properties film of the solid state in being commonly called the B stage softening, then make conductivity salient point connect this softening insulating properties film.At B in the past 2in the technology of it, by the via that is formed through of conductivity salient point, therefore need to make the draw ratio of conductivity salient point more than setting, in addition, conductivity salient point need to have hardness more than setting, therefore needs to make conductivity salient point to become complete solid state.
, technology of the present invention is not carried out the perforation of conductivity salient point.In technology of the present invention, on conductivity salient point, form insulating properties coverlay, reduce the thickness of insulating properties coverlay, form the uncured coverlay of insulating properties, make conductivity salient point and the second conductor layer or core substrate engage thereafter, therefore, the hardness of conductivity salient point does not need required such hardness in perforation method, and the hardness of conductivity salient point is just enough to a certain degree as long as making its form remain.The hardness of conductivity salient point can set for arbitrarily completely crued state or uncured and completely solidify between state.In addition, the uncured coverlay of insulating properties is uncured in the present invention, and strictly speaking, at least surface of the uncured coverlay of insulating properties is uncured.In the operations such as dry, the heating of the hardness of each parts after printing or coating, by controlling treatment temperature or processing time, may be controlled to any hardness.Because of differences such as the materials of parts, the optimum condition of temperature, time etc. also will change.The optimum condition of every kind of concrete material is as long as obtain by test in advance.
The example of concrete conductivity salient point hardness is expressed as follows.
Conductivity salient point in the past, in order to connect prepreg, connecting operation (temperature conditions is 80 DEG C～120 DEG C) stage, become complete solid state, and the hardness of conductivity salient point need to be 35～40.
According to technology of the present invention, in the case of make conductivity salient point in uncured and completely solidify between state, for example use the conductivity salient point of being made by the material with the vitrification point 110 to 140 DEG C, making its hardness is 15～30.
Make conductivity salient point in uncured and solidify completely between the effect of state as follows.
1. the cementability of conductivity salient point and the wiring pattern contacting with conductivity salient point, conductivity are that completely crued situation is good than conductivity salient point.In the situation that conductivity salient point is not complete solid state, in stacked pressurization operation, under the heating condition of regulation, easily there is plastic deformation in conductivity salient point, therefore, improve the cementability of conductivity salient point with the wiring part contacting with conductivity salient point, simultaneously because contact area increases, reduce resistance, and improve the reliability of electrical connection, form bonding agent composition in the electrocondution slurry of conductivity salient point compressed simultaneously, be pressed against in the uncured coverlay of insulating properties, therefore, the conductive particle being dispersed in electrocondution slurry becomes firm with the combination of the wiring part contacting with conductivity salient point, and therefore can make conductive particle densification.By contraction thereafter, the conductive particle in conductivity salient point rearranges, can the be further enhanced effect of conductivity of its result.
2. in stacked pressurization operation, use than in the past little a lot of moulding pressure, just can form multilayer circuit board.Therefore reduce to be applied to the strain on parts, therefore improved the reliability of parts.
3. manufacture method of the present invention is utilized the film of attenuate insulative resin mixed liquor, form the uncured coverlay of insulating properties, conductivity salient point and second conductor layer or core substrate joint, therefore conductivity salient point do not applied the power of perforation prepreg as in the past thereafter.In addition, by handle, the temperature conditions be dried/solidifying of film attenuate is set in the solid state of conductivity salient point is not had in influential scope, stably former state keeps the shape of conductivity salient point after just printing.
4. in the situation that conductivity salient point and wiring pattern are adjacent to, the leading section of conductivity salient point can carry out plastic deformation swimmingly.
Microhardness testers MXT50 (Song Kanazawa Jing Machine (strain) for the hardness of described conductivity salient point) be that 23 DEG C, test load are to measure under 25Kgf, the condition that loads 15 seconds retention times in test temperature.
(curing degree of insulating properties coverlay)
In the manufacture method of multilayer circuit board of the present invention, preferably control heating condition, make halfway in operation, become at the insulating properties coverlay forming around conductivity salient point the state being called as before the solidifying of " uncured "; And in heating pressurization operation, insulating properties coverlay becomes the state that is called as " completely curing " or " solidifying ".
As epoxy resin or the OPE resin system of insulating properties coverlay material that is applicable to multilayer line plate member of the present invention, the material of specifically recording in [0026] of this specification or [0027].In the situation that insulating properties coverlay is epoxy resin, under the heating condition in the scope of 130～180 DEG C, 10 minutes～1 hour, insulating properties coverlay becomes the curing degree in the middle of " uncured " and " completely curing ".In the situation that insulating properties coverlay is oligomerisation phenylene ether resin system, under the heating condition in the scope of 130～200 DEG C, 10 minutes～1 hour, insulating properties coverlay becomes the curing degree in the middle of " uncured " and " completely curing ".In this manual, the insulating properties under this state is solidified to coverlay and call " the uncured coverlay of insulating properties ".In the case of using than described heating condition more the heating of low temperature or shorter time, insulating properties coverlay is its uncured state.In the case of using than described heating condition more high temperature or longer time heating, insulating properties coverlay is for more approaching completely crued state.For example, the in the situation that of oligomerisation phenylene ether resin system, even heating at 160 DEG C, if be about 5 minutes heating time, curing reaction is also insufficient, and therefore insulating properties coverlay maintains the uncured state that approaches.
In the situation that making insulating properties coverlay become uncured coverlay, contact the parts (the conductivity coverlay that for example conductive pattern is such or the insulating properties coverlay of upper strata or lower floor) and the bonding strength of insulating properties coverlay that form with insulating properties coverlay large.Its reason is that insulating properties coverlay is the crosslinked front low resin of molecular weight, therefore both contacts under the state that has thermal fluidity, its result insulating properties coverlay and bonding the other side soak, and the effect therefore producing is that wiring is difficult to peel off and wiring board becomes firm.In addition, due to curing degree step-down, therefore can seamlessly imbed substrate because of installing component form concavo-convex, the effect also obtaining for the planarization of PCB surface.
On the other hand, the mechanical strength of uncured coverlay worsens, and the in the situation that of therefore for example forming conductive pattern by printing on coverlay, exists and does not allow tractable possibility.In this case, preferably, under suitable condition, the coverlay that forms conductive pattern one side is heated; And this coverlay is become after complete solid state, uncured coverlay is layered in above it.By stacked to uncured coverlay and completely curing coverlay, can improve adhesiveness, flatness, in addition, can improve the operability in conductive pattern manufacturing procedure.
For example, in epoxy resin of the present invention, because of purposes difference, add thermal fluidity excessive.Therefore sometimes preferably undertaken by making to be heating and curing in the last stage, improving after kinematic viscosity (after prebake conditions), pressurize stacked.
[shape of parts, dimensional parameters]
(definition of dimensional parameters)
(a) of Figure 12 is the figure of the dimensional parameters definition of explanation multilayer line plate member of the present invention to Figure 12 (c).
(a) of Figure 12 is the cutaway view by be coated with the multilayer line plate member that mobility coverlay 222 obtains on conductivity salient point 221.(b) of Figure 12 and (c) of Figure 12 are the cutaway views that forms the multilayer line plate member that the uncured coverlay 223 of insulating properties obtains after the thickness by reducing mobility coverlay 222.As shown in Figure 12 (b), in the exposing of conductivity salient point, the head that is typically conductivity salient point exposes completely., in the worst case, as shown in Figure 12 (c), in a part for the head of conductivity salient point, remain insulating properties coverlay.
At this, t1 is the thickness of mobility coverlay 222, and t2 is the thickness of the uncured coverlay 223 of insulating properties, and h1 is the thickness of conductivity salient point 221.In addition, a1 is the bottom surface diameter (diameter of bottom surface) of conductivity salient point, and θ 1 is the central angle of conductivity salient point 221 upper sections.In addition, in the case of the worst shown in (c) of Figure 12, Sb1 is the floor space of salient point, and Se1 is the area that exposes of conductivity salient point 221 in conductivity salient point head, with the ratio that exposes area and floor space of Se1/Sb1 × 100 (%) definition conductivity salient point.
In addition,, though do not represent in figure, be defined as: the height of the conductivity salient point after laminating hot pressing is h2, the thickness of the insulating barrier after laminating hot pressing is t3.It is more than 5 μ m preferably making t3.
(shape of conductivity salient point)
The shape of conductivity salient point preferably becomes the diameter shape less than the diameter of bottom in leading section cross section.This shape is for example taper shape, cardinal principle truncated cone, chevron preferably.Conductivity salient point upper section shape preferably has the smooth circular arc of 180 ° of following central angle θ 1.At this, so-called conductivity salient point leading section cross section is conductivity salient point front-end configuration on top in the situation that, the cross section of the horizontal direction of conductivity salient point.So-called conductivity salient point upper section is the cross section of the vertical direction of conductivity salient point.In the manufacture method of multilayer circuit board of the present invention, because conductivity salient point does not need to connect prepreg, so to there is no need be sharp shape to front end.By making conductivity salient point leading section be formed as smooth circular arc, can increase the area of section of via, can reduce the resistance of via.
In the case of conductivity salient point upper section is become the circular arc with the central angle that is greater than 180 °, the leading section of conductivity salient point is the shape of depression, therefore insulating properties uncured resin remains in depressed part, can produce the rough sledding such as bad connection and resistance increase of via.In multilayer line plate member of the present invention, conductivity salient point upper section is the smooth circular shape with 180 ° of following central angles, therefore, insulating properties uncured resin can not remain on the leading section of conductivity salient point, connects reliably so have via the effect declining with resistance.In addition conductivity salient point front end is not sharp, even if therefore carry out in a lump laminating hot pressing, via leading section also can not strike the beam, bending, and the electroconductive component that therefore can realize via and upper strata is electrically connected reliably.
(exposing of conductivity salient point)
Coating insulative resin mixed liquor, by heating or dry making after film attenuate, as shown in Figure 12 (c), on the border of the uncured coverlay of insulating properties and conductivity salient point, more residual insulating properties materials on conductivity salient point sometimes.Represent that at expose area and the ratio of floor space with conductivity salient point conductivity salient point above conductivity salient point is not the ratio of the cover part such as being insulated property material residue, in the situation that utilizing technology of the present invention, can make to expose area with the ratio of floor space more than 20%.Owing in fact can making the area of section of via become large, so there is the effect that reduces resistance.
[multilayer circuit board of embodiment of the present invention and its manufacture method]
Below with reference to Fig. 4 to Fig. 6, the object lesson that uses board part and core substrate to manufacture the method for multilayer circuit board is described.The manufacture method of multilayer circuit board of the present invention is in multilayer circuit board manufacture of substrates described herein, replaces core substrate and uses the method for conductivity paper tinsel, insulating properties substrate or multilayer line plate member.
(the first object lesson of the manufacture method of multilayer circuit board)
In the first object lesson, the manufacture method of the multilayer circuit board of overlapped way is described to (i) order of Fig. 4 with (a) of Fig. 4.Represent to have used the example of the printing multilayer circuit board of manufacturing by plated-through-hole mode as core substrate.First, on core substrate 52 and below the multilayer line plate member 51,53 that respectively the second object lesson (Fig. 2) by multilayer circuit board component manufacturing method of the present invention produced position (Fig. 4 (a)), and carry out laminating hot pressing, make thus the insulating properties coverlay of the multilayer line plate member that was once the uncured coverlay of insulating properties become curing coverlay (Fig. 4 (b)).Then, for example in multilayer line plate member 51,53, form resist pattern 54 (Fig. 4 (c)) by photoetching process.Then, make resist pattern 54 become mask by wet etching, and conductivity paper tinsel 55 is carried out to etching, then remove resist pattern 54, form thus wiring 56 (Fig. 4 (d)).Then, at multilayer circuit board 51,53 with above wiring 56, multilayer line plate member 57,58 location (Fig. 4 (e)) that the second object lesson (Fig. 2) by multilayer circuit board component manufacturing method of the present invention is produced, and carry out laminating hot pressing.Make thus the insulating properties coverlay of the multilayer line plate member that was once the uncured coverlay of insulating properties become curing coverlay (Fig. 4 (f)).Then, in multilayer line plate member 59,60, form resist pattern 62 (Fig. 4 (g)) by photoetching process.Then, make resist pattern 62 become mask by wet etching, and conductivity paper tinsel 61 is carried out to etching, then remove resist pattern 62, form thus wiring 63, its result has been made multilayer circuit board 66 (Fig. 4 (h)).
In the manufacture method of the composite multi-layer wiring board substrate of the sequential cascade mode shown in Fig. 4, certainly can adopt the substrate element of producing by the manufacture method shown in Fig. 1 and Fig. 3 as multilayer circuit board, maybe can use the printing multilayer circuit board that carries out interlayer connection by conductivity salient point as core substrate.
(the second object lesson of the manufacture method of multilayer circuit board)
In the second object lesson, with reference to Fig. 5 (a) to Fig. 5 (d), the manufacture method of the multilayer circuit board of overlapped way is in a lump described.Represent to have used as core substrate the example of the printing multilayer circuit board that utilizes the manufacture of conductivity salient point.
The packing density of the general core substrate producing by plated-through-hole mode is low, therefore also can use and pass through B 2the substrate that the previous methods such as it produce.First, on core substrate 75 and below, the multilayer line plate member producing to multilayer line plate member 74,73,76,77 and by first object lesson (Fig. 1) of multilayer circuit board component manufacturing method of the present invention positions, described multilayer line plate member the 74,73,76, the 77th, in the multilayer line plate member producing, is for example formed with the multilayer line plate member (Fig. 5 (a)) of wiring pattern in advance at the 3rd object lesson (Fig. 3) of the manufacture method by multilayer line plate member of the present invention by photoetching process and etching.Then carry out laminating hot pressing, making becomes curing coverlay (Fig. 5 (b)) as the insulating properties coverlay of the multilayer line plate member of the uncured coverlay of insulating properties.Then, for example on conductivity paper tinsel 71, form resist pattern 84 (Fig. 5 (c)) by photoetching process.Then make resist pattern 84 become mask by wet etching, conductivity paper tinsel 71 is carried out to etching, then remove resist pattern 84, form thus wiring 83 (Fig. 5 (d)).Its result has been made multilayer circuit board 87.
In the manufacture method of the multilayer line base board of the overlapped way in a lump shown in Fig. 5, certainly can adopt the substrate element of producing by the manufacture method shown in Fig. 1 and Fig. 2 as multilayer circuit board or use the printing multilayer circuit board of manufacturing by plated-through-hole mode as core substrate.
(the 3rd object lesson of the manufacture method of multilayer circuit board, the 4th object lesson)
In the 3rd object lesson, the 4th object lesson, with reference to (a) of Fig. 6 and (b) manufacture method of the multilayer circuit board to core substrate-core substrate overlapped way describe.Represent to have used as core substrate the example of the printing multilayer circuit board that utilizes the manufacture of conductivity salient point.
In the 3rd object lesson, first, on the face of the upside of core substrate 95, form conductivity salient point 94.Then, the insulative resin mixed liquor that is dispersed with insulating properties filler 93 is coated on conductivity salient point 94 and conductivity salient point 94 around, form thus mobility coverlay.By making this mobility coverlay dry, make solvent evaporation, form thus the uncured coverlay 92 of insulating properties.Then core substrate 91 is positioned to (Fig. 6 (a)), carry out laminating hot pressing, making thus becomes curing coverlay as the insulating properties coverlay of the multilayer line plate member of the uncured coverlay of insulating properties.Its result has been made multilayer circuit board.
In the 4th object lesson, first, on the face of the upside of core substrate 100, form conductivity salient point 99.Then another above core substrate 96 on coating be dispersed with the insulative resin mixed liquor of insulating properties filler 98, form thus mobility coverlay.By making this mobility coverlay dry, make solvent evaporation, form thus the uncured coverlay 97 of insulating properties.Then make core substrate 96 and conductivity salient point 99 locate (Fig. 6 (b)), carry out laminating hot pressing, making thus becomes curing coverlay as the insulating properties coverlay of the multilayer line plate member of the uncured coverlay of insulating properties.Its result has been made multilayer circuit board.
In the manufacture method of the multilayer line base board of the core substrate-core substrate overlapped way shown in Fig. 6, certainly can adopt the printing multilayer circuit board of manufacturing by plated-through-hole mode as core substrate.
[be coated with surface layer (Shang Tu り) construction method and priming operation (Xia Tu り) construction method]
Manufacturing in the operation of multi-layer wire substrate, before laminating hot pressing, configure in the construction method of insulative resin layer and conductivity salient point and have the surface construction method of painting and priming operation construction method.
(a) of Fig. 7 and (b) be in the situation that carrying out priming operation construction method, the cutaway view of the multilayer circuit board before stacked.Priming operation construction method is in the construction method of conductivity salient point being processed to a side coating insulating properties mixed liquor.(a) of Fig. 7 represents the figure that the multilayer line plate member with conductivity salient point and insulating properties material is located in the mode relative with core substrate 122.(b) of Fig. 7 is illustrated on the multilayer wiring parts with the conductivity salient point that is formed on core substrate 126 and insulating properties material and configures conductivity paper tinsel 124,128.
(c) of Fig. 7 and (d) be in the situation that being coated with surface construction method, the cutaway view of the multilayer circuit board before stacked.Being coated with surface construction method is the construction method at a side coating insulating properties mixed liquor contrary with processing one side of conductivity salient point.The manufacture method of the multilayer circuit board representing in Fig. 7 (c) is: by forming the operation of the uncured coverlay of mobility, form the operation of the uncured coverlay of insulating properties and carry out the operation of laminating hot pressing, utilize described conductivity salient point to make the conductor layer of the first core substrate that is formed with described conductivity salient point and be formed with the conductor layer of the uncured coverlay of described insulating properties or the electrical connection of the conductor layer of the second core substrate, the operation of the uncured coverlay of described formation mobility be by be formed with conductivity salient point 130, on the relative conductor layer or the second core substrate of the first core substrate 131 of 132, the insulative resin mixed liquor that coating contains insulating properties filler and volatile solvent, form the operation of the uncured coverlay of mobility, the operation of the uncured coverlay of described formation insulating properties is by making described volatile solvent volatilization and making described mobility coverlay attenuate, form the operation of the uncured coverlay of insulating properties, described operation of carrying out laminating hot pressing is to described the first core substrate and is formed with the conductor layer of the uncured coverlay of described insulating properties or the second core substrate carries out the operation of laminating hot pressing.The manufacture method of the multilayer circuit board that (d) of Fig. 7 represents is: by forming the operation of mobility coverlay, form the operation of the uncured coverlay of insulating properties, form the operation of the conductivity group of bumps of overshooting shape, carry out the operation of laminating hot pressing, utilize described conductivity salient point to make the conductor layer of the first core substrate that is formed with the uncured coverlay of described insulating properties and be formed with the conductor layer of described conductivity salient point or the electrical connection of the conductor layer of the second core substrate, wherein, the operation of described formation mobility coverlay is the insulative resin mixed liquor that contains insulating properties filler and volatile solvent by coating on the first conductor layer being configured on the first core substrate, form the operation of mobility coverlay, the operation of the uncured coverlay of described formation insulating properties is by making described volatile solvent volatilization and making described mobility coverlay attenuate, form the operation of the uncured coverlay of insulating properties, the operation of the conductivity group of bumps of described formation overshooting shape is the operation that forms the conductivity group of bumps of overshooting shape on the second conductor layer or the second core substrate, the described operation of carrying out laminating hot pressing is the operation of described the first core substrate and described insulating barrier being carried out to laminating hot pressing.
In manufacture method at the multilayer circuit board shown in Fig. 1 to Fig. 3 with the multilayer circuit board shown in manufacture method and Fig. 4 to Fig. 6 of parts, all the cutaway view of the situation to priming operation construction method and process sequence is illustrated.Certain situation with being coated with surface construction method manufacture multilayer circuit board parts and multilayer circuit board, also can obtain the excellent effect identical with the situation of using priming operation construction method.
[method of measurement of resistance]
The general test pattern (テ ス ト パ タ ー Application) that is called daisy chain (デ イ ジ ー チ ェ ー Application) of using of resistance of the multilayer circuit board forming by technology such as conductivity salient points is measured.(a) of Figure 13 and (b) be vertical view and the cutaway view of measuring the test pattern used of resistance.Test pattern is made up of ground floor wiring 234, via 235, second layer wiring 233, measurement terminal 231,232.Ground floor wiring 234 is the wirings that form on the face of insulating properties coverlay 236 downsides.Second layer wiring 233 is the wirings that form on the face of insulating properties coverlay 236 upsides.Between measurement terminal 231 and measurement terminal 232, multiple vias 235 are by the connect up wiring pattern series connection of 234 wiring pattern and second layer wiring 233 of ground floor.By apply assigned voltage in measurement terminal 231 and measurement terminal 232, measure the electric current of test pattern of flowing through, thereby obtain the resistance of via.Specifically, by deducting cloth line resistance from the resistance between terminal, and a result obtaining is divided by the number of via, can calculate the resistance of each via.The value of general cloth line resistance and resistance is very little compared with the resistance as common electronic unit, and therefore in order to calculate accurately resistance, the pattern that must prepare multiple vias to connect with series system is measured.General use dozens of to hundreds of the vias pattern obtaining of connecting.About cloth line resistance, if having in advance the intrinsic resistance of wiring material or the sheet resistance of wiring (シ ー ト opposing) data, can calculate theoretically cloth line resistance according to the size of wiring.By measuring the different multiple patterns of flow hole number, also can measure independently resistance and cloth line resistance.
Embodiment
The present invention is described in detail to use embodiment and comparative example below.In addition, the invention is not restricted to these embodiment.
[relation of conducting stability and filler]
In order to study the impact of the interlayer conduction stability of the insulating properties filler being dispersed in insulative resin on multilayer circuit board, measured the resistance of the continuity test pattern being formed on substrate.
Fig. 9 represents the resistance of daisy chain and has or not the figure of the relation of insulating properties filler.The figure on the left side is the figure not having in the situation of insulating properties filler.The figure on the right is the figure having in insulating properties filler situation.Insulating properties filler has used silicon dioxide (D50=10 μ m φ).Exerting pressure of laminating hot pressing adopts 50～500kgf/cm 2.The transverse axis of figure is that the contact resistance of daisy chain is measured by extraction electrode numbering, and this numbering is corresponding to measuring positions different in substrate.As shown in the figure of Fig. 9, can determine: in the situation that there is no insulating properties filler, the interlayer contact resistance fluctuation in substrate is large, conducting poor stability; On the other hand, in the situation that having insulating properties filler, the fluctuation of the interlayer contact resistance in substrate is little, conducting good stability.
Limit changes the mixing ratio limit of the insulating properties filler in insulative resin to be evaluated, and can determine from the result of evaluating, and the mixing ratio of insulating properties filler is preferably below the above 50vol% of 1vol%, more preferably below the above 30vol% of 1vol%.In the situation that having considered low contact resistance, the mixing ratio of this insulating properties filler is further preferably below the above 20vol% of 1vol%.
(a) of Figure 10 is the figure taking the resistance of conductivity salient point as the longitudinal axis, taking the position in substrate as transverse axis to Figure 10 (f).The diameter that (c) of (a) of Figure 10, (b) of Figure 10, Figure 10 corresponds respectively to insulating properties filler be 0 ?4 μ m φ, 5 ?20 μ m φ, 25 ?the situation of 50 μ m φ.Insulating properties filler is 10vol% with respect to the addition of insulating layer material.The bottom surface average diameter of the conductivity salient point after stacked pressurization is 100 μ m φ, and the average height of conductivity salient point is 20 μ m.
Can determine from described figure, in the case of the diameter of insulating properties filler than conductivity bump height 20% little, because insulating properties filler is too small, be created between wiring be easily short-circuited, insulating properties filler easily remains in the first-class problem of conductivity salient point, therefore conducting bad stability.The diameter of insulating properties filler in the case of conductivity bump height more than 20% below 100%, be not easy the problem such as short circuit and open circuit between connecting up, therefore conducting good stability.In the case of the diameter of insulating properties filler than conductivity bump height 100% large, because insulating properties filler is excessive, occur conductivity salient point and should and the wiring that is connected of conductivity salient point between open a way, therefore conducting bad stability.
In addition, Figure 10 (d), Figure 10 (e), Figure 10 (f) correspond respectively to insulating properties filler with respect to the addition of insulating properties material be 0vol%, 25 ?30vol%, 1 ?20vol, 10 ?the situation of 15vol%.Be 0vol% at the addition of insulating properties filler, because the impact of substrate warp causes conduction fluctuation, and the absolute value of resistance is also greatly to more than 10 Ω.On the other hand, be 25vol% above in the situation that at described addition, improve compared with the situation that the absolute value of resistance is 0vol% with fluctuation with addition.In the situation that addition is 30vol%, the conduction causing because of conductivity salient point is below 10 Ω, can find out that this value is in level no problem in the use of multilayer circuit board (Figure 10 (d)).On the other hand, in the case of the amount of insulating properties filler be 1 ? 20vol%, warpage has the tendency of further improvement, the absolute value of resistance and fluctuation significantly reduce.In the case of the amount of insulating properties filler be 10 ? 15vol%, can find out that resistance is below 100m Ω, fluctuates also very little.
[relation of conducting stability and conductivity bump height]
Conducting stability between the two layers of wiring connecting with conductivity salient point and the relation of conductivity salient point shape and size are evaluated.In insulating barrier, be dispersed with particle diameter and count the insulating properties filler of approximately 10 μ m φ by D50.The thickness of insulating barrier is about 10 μ m.Bottom surface diameter as the conductivity salient point of evaluating sample preparation has tri-kinds of 50 μ m φ, 80 μ m φ, 100 μ m φ, highly has height and low two kinds, six kinds altogether.The bottom surface diameter of conductivity salient point is the sample of 80 μ m φ or 100 μ m φ, the thickness that is greater than insulating barrier of conductivity salient point highly stablely.In addition the bottom surface diameter of conductivity salient point is that the sample of 50 μ m φ is also the high sample of height of conductivity salient point, the thickness that is greater than insulating barrier of conductivity salient point highly stablely.The bottom surface diameter of conductivity salient point is the low sample of height of the conductivity salient point of 50 μ m φ, the fluctuation of conductivity bump height is large, in addition the conductivity salient point that the conductivity salient point that, aspect ratio thickness of insulating layer is large and aspect ratio thickness of insulating layer are little mixes.
Conducting stability to described sample is evaluated, consequently: bottom surface diameter is that sample that the height of conductivity salient point of 80 μ m φ or 100 μ m φ is high or low sample and bottom surface diameter are the high sample of height of the conductivity salient point of 50 μ m φ, has obtained good conducting stability.On the other hand, bottom surface diameter is the low sample of conductivity bump height of 50 μ m φ, can not obtain good conducting stability.
[relation of conducting stability and conductivity bump height]
(a) of Figure 11 and (b) be respectively the figure of the relation of the addition of the thickness (highly) that represents conductivity salient point and resistance value and the thermoplastic resin that adds in conductivity salient point.Can distinguish from (a) of Figure 11 with (b), along with the increase of thermoplastic resin addition, the thickness attenuation of the conductivity salient point after laminating hot pressing, conductivity salient point edge horizontal (XY direction) broaden and the resistance value of conductivity salient point reduces rear stable., consider line and the gap of wiring pattern, because conductivity salient point is along laterally broadening, particularly because of for example 85 DEG C, 85%, apply the hot and humid bias voltage test etc. of 50V, have the problem being short-circuited in XY direction.Therefore can distinguish, thermoplastic resin with respect to the addition of conductivity convex point material preferably below the above 30wt% of 10wt%.
[to the evaluation that has used the salient point of epoxy resin to expose]
By use epoxy resin in insulating properties mixed liquor, make the sample of the evaluation use that conductivity salient point is exposed.In the making and evaluation of sample, on the supporting substrates that is formed with conductivity salient point, coating contains the insulative resin mixed liquor of epoxy resin, and makes it dry.Then measured the variation of thickness, the outward appearance of conductivity salient point has been observed.
(preparation of electrocondution slurry)
By allocating under the following conditions resinous principle, conductivity composition and solvent into, prepare electrocondution slurry.
Resinous principle:
Biphenyl type liquid-state epoxy resin: 2～10 % by weight
Epoxy/phenolic resin: 1～10 % by weight
Biphenyl type epoxy resin: below 5 % by weight
Additive: below 5 % by weight
Conductivity composition: allocated Ag powder more than 80 % by weight (phosphorus flakelike powder weight: globular powder weight=1:1) into.
Solvent: add methylethylketone, adjusted viscosity.
(preparation of insulative resin mixed liquor)
By allocating under the following conditions resinous principle and solvent into, prepare insulative resin mixed liquor.
Resinous principle (epoxy resin):
(A) YX695BH30 (trade name, ジ ャ パ Application エ Port キ シ レ ジ Application (strain) is manufactured): 100 weight portions
(B) エ ピ キ ュ ア DC808 (trade name, ジ ャ パ Application エ Port キ シ レ ジ Application (strain) is manufactured): 154 weight portions
(C) コ ロ ネ ー ト 2507 (trade name, Japanese Port リ ウ レ タ Application industry (strain) is manufactured): 312 weight portions
(D) 2E4MZ (imidazoles is crosslinking catalyst, trade name, four countries change into Co., Ltd. manufacture): 9.6 weight portions
DVB ?960 (trade names, Nippon Steel Chemical Co., Ltd manufacture): 98.6 weight portions
パ ー オ Network タ O (trade name, NOF Corp manufactures): 9.6 weight portions
(E) insulating properties filler-silicon dioxide D50=10 μ m φ, 10VOL%
Solvent: add methylethylketone, adjusted viscosity.
(formation of conductivity salient point)
On the supporting substrates of being made by PET, be coated with electrocondution slurry with silk screen printing, form thus the conductivity salient point of overshooting shape.The bottom surface diameter of conductivity salient point is 80 μ m～110 μ m, is highly 25 μ m～40 μ m.
(coating of insulative resin mixed liquor and dry)
On the supporting substrates that is formed with conductivity salient point, be coated with insulative resin mixed liquor by scraper plate method.Coating condition is that gap is 50 μ m～100 μ m, and coating speed is 1m/min, and forming thus thickness is the insulating properties coverlay of 30 μ m～100 μ m.Measured the thickness of insulating properties coverlay, then sample has been packed into drying oven, made sample be dried 3 minutes at 100 DEG C, made thus the solvent evaporation of film, the thickness of the uncured coverlay of insulating properties is reduced thereafter.
After samples dried, measured the thickness of insulating properties coverlay, the state in addition conductivity salient point being exposed is observed.
(measurement of dielectric property)
The epoxy resin of producing has been measured to dielectric property.
Dielectric property after solidifying:
Relative dielectric constant is: 2.71/1GHz, 2.68/5GHz
Dielectric loss angle tangent is: 0.019/1GHz, 0.0098/5GHz
[to having used the evaluation of exposing of conductivity salient point of OPE resin]
By OPE resin is used for to insulating properties coverlay, make the sample of the evaluation use that conductivity salient point is exposed.In the making and evaluation of sample, the insulative resin mixed liquor that coating contains OPE resin on the supporting substrates that is formed with conductivity salient point, makes it dry.Measured the variation of thickness, and the outward appearance of conductivity salient point has been observed thereafter.
(preparation of electrocondution slurry)
By allocating under the following conditions conductivity composition and solvent into, prepare electrocondution slurry.
Resinous principle:
Biphenyl type liquid-state epoxy resin: 2～10 % by weight
Epoxy/phenolic resin: 1～10 % by weight
Biphenyl type epoxy resin: below 5 % by weight
Additive: below 5 % by weight
Conductivity composition: allocated Ag powder more than 80 % by weight (phosphorus flakelike powder weight: globular powder weight=1:1) into.
Solvent: add methylethylketone, adjusted viscosity.
(preparation of insulative resin mixed liquor)
By allocating under the following conditions resinous principle and solvent into, prepare insulative resin mixed liquor.
Resinous principle (OPE resin):
(A) OPE ?2st2200 (trade name, Mitsubishi Gas Chemical Co., Ltd manufacture): 5～40 % by weight
(B) TR2003 (trade name, JSR Corp. manufactures): 5～40 % by weight
Solvent: toluene: 20～90 % by weight
(C) insulating properties filler-silicon dioxide D50=10 μ m φ, 10VOL%
(formation of conductivity salient point)
On the supporting substrates of being made by PET, be coated with electrocondution slurry by silk screen printing, formed thus the conductivity salient point of overshooting shape.The bottom surface diameter of conductivity salient point is 80 μ m～110 μ m, is highly 16 μ m～40 μ m.
(coating of insulative resin mixed liquor and dry)
On the supporting substrates that is formed with conductivity salient point, be coated with insulative resin mixed liquor by scraper plate method, coating condition is that gap is 20 μ m～100 μ m, and coating speed is 1m/min, and having formed thus thickness is the insulating properties coverlay of 20 μ m～100 μ m.Thereafter the thickness of having measured insulating properties coverlay, then packs drying oven into sample, makes sample be dried 3 minutes at 100 DEG C, makes thus the solvent evaporation of film, and the thickness of insulating properties coverlay is reduced.
After samples dried, measure the thickness of insulating properties coverlay, and the state that exposes of conductivity salient point has been observed.
(measurement of dielectric property)
The OPE resin being made into has been measured to dielectric property.
Dielectric property after solidifying:
Relative dielectric constant is 2.40/5GHz
Dielectric loss angle tangent is 0.0019/5GHz
Industrial applicibility
As described in detail above, the present invention relates to the multilayer circuit board corresponding with high-density installation.Particularly according to the present invention, can provide can improve interlayer connective stability, high finished product rate and multilayer circuit board and manufacture method thereof cheaply.The present invention has very large contribution to electronic product field.

Claims (17)

1. a multilayer circuit board, is characterized in that comprising:
Conductivity group of bumps, is formed between the first conductor layer and the second conductor layer; And
The insulating barrier being formed by the insulative resin mixed liquor that contains insulating properties filler, this insulating barrier is formed on described conductivity group of bumps around, wherein,
The average grain diameter of described insulating properties filler is more than 20% below 100% of average height of the described conductivity group of bumps after laminating hot pressing.
2. multilayer circuit board according to claim 1, it is characterized in that, described insulating barrier is not occur actually to make solvent evaporates make film attenuate under the condition of curing reaction by the resin at the insulative resin mixed liquor that makes to contain insulating properties filler, contains the layer that the resin solidification of the insulative resin mixed liquor of insulating properties filler forms described in then making.
3. multilayer circuit board according to claim 1, is characterized in that, described insulating properties filler is one or more materials of selecting from silicon dioxide, carborundum, aluminium oxide, aluminium nitride, zirconium oxide bead, bead, acrylic acid pearl.
4. multilayer circuit board according to claim 1, is characterized in that, described insulating properties filler is below the above 30vol% of 1vol% with respect to the addition of described insulative resin mixed liquor.
5. multilayer circuit board according to claim 1, it is characterized in that, described insulative resin mixed liquor has used epoxy resin, bismaleimide-triazine resin, polyimide resin, acrylic resin, phenolic resins, oligomerisation phenylene ether resin, polyether resin and melmac.
6. multilayer circuit board according to claim 1, is characterized in that, the relation of the height h2 of described conductivity group of bumps and the thickness t 3 of described insulating barrier is: h2≤t3.
7. multilayer circuit board according to claim 1, is characterized in that, the resin combination that forms described conductivity group of bumps is made by thermoplastic resin is added to the material obtaining in thermosetting resin with the mixing ratio below the above 30wt% of 10wt%.
8. a manufacture method for multilayer circuit board, is characterized in that at least comprising:
On conductor layer, form the operation of the conductivity group of bumps of overshooting shape;
By being coated with the insulative resin mixed liquor that contains insulating properties filler and volatile solvent on described conductor layer and in described conductivity group of bumps, form the operation of mobility coverlay;
By making described volatile solvent volatilization and making described mobility coverlay attenuate, form the operation of the uncured coverlay of insulating properties; And
After conductor layer or core substrate are layered on the uncured coverlay of described insulating properties, make the uncured coverlay generation of described insulating properties curing reaction, form the laminating hot pressing operation of insulating barrier,
The average grain diameter of described insulating properties filler is more than 20% below 100% of average height of the described conductivity group of bumps after laminating hot pressing.
9. a manufacture method for multilayer circuit board, is characterized in that at least comprising:
On the first core substrate, form the operation of the conductivity group of bumps of overshooting shape;
By the insulative resin mixed liquor that coating contains insulating properties filler and volatile solvent in described conductivity group of bumps, form the operation of mobility coverlay;
By making described volatile solvent volatilization and making described mobility coverlay attenuate, form the operation of the uncured coverlay of insulating properties; And
After conductor layer or the second core substrate are layered on the uncured coverlay of described insulating properties, make the uncured coverlay generation of described insulating properties curing reaction, form the laminating hot pressing operation of insulating barrier,
The average grain diameter of described insulating properties filler is more than 20% below 100% of average height of the described conductivity group of bumps after laminating hot pressing.
10. a manufacture method for multilayer circuit board, is characterized in that at least comprising:
On the first core substrate, form the operation of the conductivity group of bumps of overshooting shape;
By the insulative resin mixed liquor that coating contains insulating properties filler and volatile solvent on conductor layer or the second core substrate, form the operation of mobility coverlay;
By making described volatile solvent volatilization and making described mobility coverlay attenuate, form the operation of the uncured coverlay of insulating properties; And
By described the first core substrate be formed with the conductor layer of the uncured coverlay of described insulating properties or the operation of the second core substrate laminating hot pressing,
The average grain diameter of described insulating properties filler is more than 20% below 100% of average height of the described conductivity group of bumps after laminating hot pressing.
The manufacture method of 11. 1 kinds of multilayer circuit boards, is characterized in that at least comprising:
The insulative resin mixed liquor that contains insulating properties filler and volatile solvent by coating on the first conductor layer being configured on the first core substrate, the operation of formation mobility coverlay;
By making described volatile solvent volatilization and making described mobility coverlay attenuate, form the operation of the uncured coverlay of insulating properties;
On the second conductor layer or the second core substrate, form the operation of the conductivity group of bumps of overshooting shape; And
By described the first core substrate and the second conductor layer of conductivity group of bumps or the operation of the second core substrate laminating hot pressing that are formed with described overshooting shape,
The average grain diameter of described insulating properties filler is more than 20% below 100% of average height of the described conductivity group of bumps after laminating hot pressing.
The manufacture method of 12. 1 kinds of multilayer circuit boards, is characterized in that,
On the first conductor layer, form conductivity group of bumps, the insulative resin mixed liquor that contains insulating properties filler and volatile solvent by coating forms mobility coverlay, by making described volatile solvent volatilization and making described mobility coverlay attenuate form the uncured coverlay of insulating properties, thereby form multilayer circuit board parts
Form one or more described multilayer circuit boards with after parts, by once comprise the hot pressing of described multilayer circuit board stacking part on core substrate and at described multilayer circuit board with the operation or repeated multiple times the comprising the hot pressing of described multilayer circuit board stacking part on core substrate and in the operation that forms the second conductor layer on parts for described multilayer circuit board that form the second conductor layer on parts, form multilayer circuit board
The average grain diameter of described insulating properties filler is more than 20% below 100% of average height of the described conductivity group of bumps after laminating hot pressing.
The manufacture method of 13. 1 kinds of multilayer circuit boards, is characterized in that,
On the first conductor layer, form conductivity group of bumps, the insulative resin mixed liquor that contains insulating properties filler and volatile solvent by coating forms mobility coverlay, by making described volatile solvent volatilization and making described mobility coverlay attenuate form the uncured coverlay of insulating properties, thereby form multilayer circuit board parts
Form one or more described multilayer circuit boards with after parts, by one or more described multilayer circuit boards with parts in a lump laminating hot pressing on core substrate, form multilayer circuit board,
The average grain diameter of described insulating properties filler is more than 20% below 100% of average height of the described conductivity group of bumps after laminating hot pressing.
The manufacture method of the multilayer circuit board in 14. according to Claim 8 to 13 described in any one, is characterized in that, the content of the fixedness composition in described insulative resin mixed liquor is 10 % by weight～80 % by weight.
The manufacture method of 15. multilayer circuit boards according to claim 8 or claim 9, is characterized in that, described insulating barrier dry/setting temperature be 60 DEG C above below 160 DEG C.
The manufacture method of the multilayer circuit board in 16. according to Claim 8 to 13 described in any one, it is characterized in that, the resin combination that forms described conductivity group of bumps is made by thermoplastic resin is added to the material obtaining in thermosetting resin with the mixing ratio below the above 30wt% of 10wt%.
17. manufacture methods according to claim 10 to the multilayer circuit board described in any one in 13, it is characterized in that, the temperature of described laminating hot pressing is below the beginning temperature of insulative resin curing reaction and more than the temperature of the heat fusing reduced viscosity of insulative resin.
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