KR101220851B1 - Liquid crystal display device - Google Patents

Abstract

The present invention relates to a liquid crystal display device for preventing the deterioration of color, the liquid crystal panel; A plurality of data lines and gate lines arranged to vertically cross the liquid crystal panel to divide a plurality of unit regions; Two in the unit region, each including a plurality of pixels including transistors, and the pixels are repeatedly connected to two adjacent gate lines through the transistor in a predetermined order, the order of which is at least It is characterized by one change.

Color, color, data line, split, transistor, symmetry

Description

[0001] LIQUID CRYSTAL DISPLAY DEVICE [0002]

1 is a view showing a general large-area liquid crystal display device.

2 shows a general data line segmentation configuration;

3 is a view showing a liquid crystal display device according to the present invention;

*** Description of the symbols for the main parts of the drawings ***

GL1n + 1 to GL1n + 4: Gate line DL1m + 1 to DL1m + 5: Data line

R, G, B: Pixel T10: Thin Film Transistor

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device for preventing color degradation of all colors due to color distortion of a specific color.

The flat panel display is a medium that converts and transmits information in the form of an electric signal into visual information, and its importance is further emphasized. Among them, the liquid crystal display is widely used due to its excellent visibility, low power consumption, and clear image quality. It is used.

Recently, as the demand for large-area liquid crystal display devices increases not only in the industrial field but also in homes, liquid crystal display devices are gradually developed in large sizes.

The liquid crystal display as described above will be described with reference to the accompanying drawings.

1 is a view showing a general large area liquid crystal display device.

Referring to FIG. 1, a liquid crystal display device includes a liquid crystal panel 100, a plurality of data lines 12 arranged vertically on the liquid crystal panel 100, and horizontally arranged on the liquid crystal panel 100. A plurality of first and second gate lines 21a and 21b, a data driver 10 for applying a data signal DATA to the liquid crystal panel 100 through the data line 12, and the first gate line A first gate driver 20a for applying the first scan signal SS1 to the liquid crystal panel 100 through the second gate line 21b, and a second to the liquid crystal panel 100 through the second gate line 21b. And a second gate driver 20b for applying the scan signal SS2.

In the large-area liquid crystal display device, when a signal is applied from one side, a problem of deterioration of image quality due to signal delay may occur. As described above, the first and second gate drivers 20a outputting scan signals to both sides of the liquid crystal panel 100. And 20b).

The first and second gate lines 21a and 21b and the data line 12 vertically intersect the plurality of pixels in the liquid crystal panel 100.

The pixel is electrically connected to the first and second gate lines 21a and 21b and the data line 12 to output the first and second scan signals SS1 and S1, which are output from the first and second gate drivers 20a and 20b. SS2 is applied through the first and second gate lines 21a and 21b, and a data signal DATA output from the data driver 10 is applied through the data line 12.

Since the liquid crystal display has a large area, gate drivers 20a and 20b are separately provided on both sides of the liquid crystal panel 100, and the first gate driver 20a and the second gate driver 20b are respectively divided into first and second gate drivers. The two scan signals SS1 and SS2 are alternately output.

In general, in a liquid crystal display device having only a single gate driver, a scan signal output from the gate driver is transmitted to the end of the liquid crystal panel, thereby deteriorating the image quality toward the right region of the liquid crystal panel 100. However, the first gate The first and second scan signals 21a and 21b are applied to the left and right sides of the liquid crystal panel 100 through the driver 20a and the second gate driver 20b, respectively. By alternately setting the liquid crystal panel 100 to prevent unidirectional deterioration.

On the other hand, in the large-area liquid crystal display device, the number of the first and second gate lines 21a and 21b and the data line 12 which are formed by the wider area increases. Since this leads to an increase in cost, many methods for reducing the number of lines in a large area liquid crystal display have been sought. In particular, the data line 12 is an object to be reduced first because a much larger number than the first and second gate lines 21a and 21b should be formed.

Therefore, a data line division scheme has been proposed as a method for reducing the number of data lines 12, which will be described with reference to the accompanying drawings.

2 is a diagram illustrating a general data line division configuration.

Referring to FIG. 2, a plurality of gate lines GLn + 1 to GLn + 4 and a plurality of data lines DLm + 1 to DLm + 5 are arranged in the liquid crystal panel, and the gate lines GLn + 1 to GLn + are arranged in the liquid crystal panel. Pixels R, G, and B are defined in two regions in which 4) and the data lines DLm + 1 to DLm + 5 cross each other.

The data line division scheme reduces the number of data lines DLm + 1 to DLm + 5 compared to the existing one, and doubles the number of pixels R, G through one data line DLm + 1 to DLm + 5. It is characterized by applying a data signal to, B).

As shown in the figure, the pixels R, G, and B are repeatedly arranged, and the pixels R, G, and B belonging to the same row are adjacent to each other through the thin film transistor T. 1 to GLn + 4) are alternately connected.

That is, the pixels R, G, and B arranged between the first gate line GLn + 1 and the second gate line GLn + 2 are each of the first gate line GLn + 1 and the second gate line GLn + 1. It is alternately connected to the first gate line GLn + 2. Therefore, even the pixels R, G, and B in the same row are driven in half according to the timing.

Similarly, the pixels R, G, and B arranged between the third gate line GLn + 3 and the fourth gate line GLn + 4 may also be formed through the thin film transistor T. GLn + 3) and the fourth gate line GLn + 4 are alternately connected.

As described above, when the data lines are divided in the liquid crystal display, the cost can be reduced by reducing the number of data lines. However, the following problems may occur due to the division of the data lines.

Problems in the segmentation configuration can be particularly problematic for images having a specific pattern. As shown in FIG. An example of displaying the display is as follows.

First, the pixels R, G, and B in the same row are driven in half in accordance with a scan signal applied through two electrically connected gate lines GLn + 1 to GLn + 4. That is, even in the same row of pixels R, G, and B, the data signal is applied through the data lines DLm + 1 to DLm + 5 in half every one-half horizontal period.

However, even when the data signal is applied through the same data lines DLm + 1 to DLm + 5, the pixels R, G and B and the second 1/2 horizontal period to which the data signal is applied during the first 1/2 horizontal period are provided. The voltage charged in the pixels R, G, and B to which the data signal is applied may vary.

That is, even when the same polarity data signal is applied in the first 1/2 horizontal period and the second 1/2 horizontal period through the data lines DLm + 1 to DLm + 5, the data signal applied in the first 1/2 horizontal period is Since it takes a predetermined time to rise to a desired voltage level, sufficient voltage is not charged in the pixels R, G, and B. On the other hand, the data signal applied in the second half horizontal period reaches the desired voltage level quickly because the voltage has already reached the predetermined level in the first half horizontal period. Therefore, the pixels R, G, and B that receive the data signal during the second half horizontal period are charged with sufficient voltage. This difference in voltage charge will be more severe in the inversion driving method in which the positive data signal and the negative data signal are repeated every frame.

When such a difference in charge amount occurs, the difference is severe in the specific pattern of FIG. 2.

Since only the green pixel G is repeatedly connected to the third gate line GLn + 3, and only the red pixel R and the blue pixel B are repeatedly connected to the fourth gate line GLn + 4. Only a small voltage is always charged to the green pixel (G). In this case, if the liquid crystal display applies the normally white mode, an image of green color brighter than the desired luminance will be displayed through the green pixel G, and if the normally black mode is applied, the green pixel G will be displayed. An image of green that is darker than the desired luminance will be displayed. When all pixels R, G, and B are combined, an image of a color in which the green color is distorted will be displayed.

That is, in the conventional arrangement of the pixels R, G, and B, in which the pixels R, G, and B are regularly repeated, serious image degradation may occur when displaying an image of a specific pattern.

Second, in particular, it is a problem in a liquid crystal display device using two gate drivers, which is caused by the fact that the output deviation of the gate drivers provided on both sides of the liquid crystal panel actually exists.

As described above, in the large-area liquid crystal display device, two gate drivers are provided on both sides of the liquid crystal panel to alternately apply scan signals to the liquid crystal panel. However, even when the gate driver is formed at the same time in the same process, it is practically difficult to produce the same voltage output, so the output of the scan signal applied to the liquid crystal panel during actual driving is somewhat different.

If the output of one gate driver is lower than the output of another gate driver, the pixels R, G, and B that receive the data signal through the thin film transistor turned on by the low output scan signal have sufficient voltage. Does not charge. At this time, only the pixels R, G, and B of a specific color are charged insufficiently in the pixels R, G, and B repeatedly arranged so that the color of the image displayed on the entire pixels R, G, and B may be reduced. Different.

The present invention is derived to solve the conventional problems as described above, an object of the present invention is to uniformly distribute the color of the driving pixel according to each scan signal in the liquid crystal panel configured data division to prevent distortion of a specific color To provide a liquid crystal display device.

Liquid crystal display device according to the present invention for achieving the above object is a liquid crystal panel; A plurality of data lines and gate lines arranged to vertically cross the liquid crystal panel to divide a plurality of unit regions; Two in the unit region, each including a plurality of pixels including transistors, and the pixels are repeatedly connected to two adjacent gate lines through the transistor in a predetermined order, the order of which is at least It is characterized by one change.

A feature of the present invention is not to reduce the attenuation of signals inevitably generated in the data partitioned LCD, but to cause color distortion to be uniformly generated in red, green, and blue pixels. Is to prevent the reduction of color.

3 is a view showing a liquid crystal display device according to the present invention.

Referring to FIG. 3, a liquid crystal display device includes a liquid crystal panel (not shown), a plurality of data lines DL1m + 1 to DL1m + 5 arranged in a first direction on the liquid crystal panel, and a second direction on the liquid crystal panel. A plurality of gate lines GL1n + 1 to GL1n + 5, and the data lines DL1m + 1 to DL1m + 5 and the gate lines GL1n + 1 to GL1n + 5, which are arranged to cross each other. A plurality of pixels (R, G, B) provided by two is configured to include.

The data lines DL1m + 1 to DL1m + 5 are 1/2 reduced compared to the number of data lines DL1m + 1 to DL1m + 5 arranged in the liquid crystal panel having the same resolution. Data signals can be applied to the two pixels R, G, and B connected left and right at +1 to DL1m + 5.

In the liquid crystal panel, red, green, and blue pixels R, G, and B are repeatedly arranged in a matrix form, and data lines DL1m + 1 to DL1m + 5 and a second array arranged in the first direction on the liquid crystal panel. The gate lines GL1n + 1 to GL1n + 4 arranged in the direction cross vertically.

Two pixels R, G, and B are provided in the unit region partitioned by the data lines DL1m + 1 to DL1m + 5 and the gate lines GL1n + 1 to GL1n + 4 that cross each other in this way. This is because the number of data lines DL1m + 1 to DL1m + 5 has been reduced to 1/2 compared with the prior art.

Each of the pixels R, G, and B is provided with a thin film transistor T10. The pixels R, G, and B each have a gate line GL1n + 1 to GL1n through a gate electrode of the thin film transistor T10. It is electrically connected to +4) and electrically connected to the data lines DL1m + 1 to DL1m + 5 through a source electrode.

The connection position of the thin film transistor T10 is changed in a predetermined order in the pixels of the same row arranged in one direction.

That is, as shown in the drawing, when the pixels R, G, and B are arranged in the same row arranged between the first gate line GL1n + 1 and the second gate line GL1n + 2, they are sequentially arranged. The thin film transistors T10 of the red, green, and blue pixels R, G, and B are alternately connected to the first gate line GL1n + 1 and the second gate line GL1n + 2.

However, the connection order is changed based on the specific unit area of the same row, and the connection position of the transistor is symmetrically based on the unit area.

More specifically, the two pixels R, G, and B provided in the unit region are arranged in order of the second gate line GL1n + 2 and the first gate line GL1n + 1 through the thin film transistor T10. From the unit region BP, which is repeatedly connected to the reference, the connection position of the thin film transistor T10 is changed in the order of the first gate line GL1n + 1 and the second gate line GL1n + 2.

Two pixels B and R provided in the reference unit region BP are connected to the same gate line, that is, the second gate line GL1n + 2, through the thin film transistor T10.

The above configuration is equally applied to the pixels R, G, and B in each row.

In the liquid crystal panel, when the thin film transistor T10 positions of the pixels R, G, and B in each row are configured to be symmetrical with respect to a specific unit area BP, each gate line (even in an image displaying a specific pattern) may be formed. The pixels R, G, and B connected to the GL1n + 1 to GL1n + 4 can be uniformly arranged for each color.

Reference is again made to FIG. 3 to illustrate this.

Here, the shaded pixels R, G, and B are pixels R, G, and B that actually display an image, and the liquid crystal panel shown in FIG. 3 displays an image of a checkered pattern.

In the pixels R, G, and B connected to the third gate line GL1n + 3, not only the pixels R, G, and B of the same color are connected, but the pixels R, G, and B of all colors are uniform. Is placed. In addition, pixels R, G, and B of all colors are also uniformly arranged in the pixels R, G, and B connected to the fourth gate line GL1n + 4.

Therefore, in an image displaying a specific pattern, when such a pixel arrangement is applied to a large-area liquid crystal display device that applies a scan signal through two gate drivers, the output of the two gate drivers is different even if the output of the two gate drivers is different. The phenomenon that only the colors of R, G, and B) are distorted does not occur.

That is, since the colors of all the color pixels R, G, and B are uniformly distorted, the color reduction as a whole is prevented.

The pixels R, G, and B arranged in the same row are also connected to the pixels R, G, and B connected to the third gate line GL1n + 3 and the fourth gate line GL1n + 4. The pixels R, G, and B receive data signals in different 1/2 horizontal periods, but the pixels R, G, and B that are not charged by a desired voltage in the first 1/2 horizontal period are pixels of a specific color. It is not limited to (R, G, B), and the pixels R, G, and B of all colors are uniformly applied with the data signal in the first 1/2 horizontal period, thereby preventing the overall color degradation.

As described above, the liquid crystal display according to the present invention electrically connects the red, green, and blue pixels R, G, and B arranged between the Nth gate line and the N + 1th gate line through the thin film transistor. In the connection, the connection positions of the thin film transistors are alternately repeatedly connected, the order of connection is changed based on the positions of the specific pixels R, G, and B, and then repeatedly connected, whereby the output difference between the plurality of gate drivers of the liquid crystal panel is different. As a result, color degradation due to the difference in the amount of charge between the horizontal periods can be overcome.

As described above, the liquid crystal display according to the present invention changes the connection position of the thin film transistors of the pixels alternately connected to two adjacent gate lines in the liquid crystal panel configured with data lines, thereby causing various color distortions in driving the liquid crystal display. By applying the factor uniformly to the pixels of all colors, it is possible to prevent the color deterioration of the entire color due to the color distortion of the specific color.

Claims (6)

A liquid crystal panel; A plurality of red, green, and blue pixels repeatedly arranged in a matrix on the liquid crystal panel; A plurality of data lines arranged in the liquid crystal panel in a first direction and dividing the red, green, and blue pixels by two; A plurality of gate lines arranged in a second direction on the liquid crystal panel; And And a plurality of transistors respectively provided in the red, green, and blue pixels and electrically connected to the gate line and the data line. The red, green, and blue pixels are alternately connected to the Nth (N is a natural number) gate line and the N + 1th gate line through the transistor. The N + 1th gate line and the Nth gate line are connected to the plurality of thin film transistors from the unit region so that the plurality of transistors connected to the pixels of the same row are symmetrical with respect to one unit region. A liquid crystal display device which is alternately connected in order. A liquid crystal panel; A plurality of data lines and gate lines arranged perpendicularly to the liquid crystal panel to divide a plurality of unit regions; And Two in each of the plurality of unit regions, each of which includes a plurality of pixels including a transistor; The plurality of pixels are alternately connected in order of an Nth (N is a natural number) gate line and an N + 1th gate line through the transistor. From the unit region, the connection positions of the plurality of thin film transistors are changed in the order of the N + 1 th gate line and the N th gate line from the unit region so that the transistors connected to the pixels of the same row are symmetrical with respect to the unit region. Liquid crystal display, characterized in that connected to. The liquid crystal display device of claim 2, wherein the pixel comprises red, green, and blue pixels. 3. The liquid crystal display device according to claim 2, wherein the pixels are alternately connected to two adjacent gate lines. delete The liquid crystal display of claim 2, wherein the pixels constituting the unit region are connected to the same gate line.

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