KR100961182B1 - Transparent electronic device and manufacturing method thereof - Google Patents

Abstract

The present invention relates to a transparent electronic device and a method for manufacturing the same, in the case of manufacturing a transparent electronic device having a p-type channel, after forming a buffer layer of a material that is easy to form a crystalline thin film at a low temperature copper oxide-based Alternatively, by forming the channel layer with a ZnO-based material, it is possible to manufacture a p-type transparent electronic device having excellent stability by improving the film quality of the p-type channel layer only by a low temperature process. In addition, since the p-type channel and the n-type channel can be formed at the same time, the manufacturing process and manufacturing cost can be reduced, and since the source and drain can be formed by one patterning using the hard mask layer, it is implemented in CMOS. This enables the design margin and performance of the display driving device to be significantly improved.

Transparent electronic device, TTFT, n-type, p-type, channel, buffer layer, low temperature, stability

Description

Transparent electronic device and manufacturing method thereof

The present invention relates to a transparent electronic device and a method for manufacturing the same, and more particularly, to a transparent electronic device and a method for manufacturing the same, which can be implemented as a complementary metal oxide semiconductor (CMOS) while reducing the manufacturing process and manufacturing cost with excellent stability. It is about.

The present invention is derived from a study conducted as part of the IT source technology development project of the Ministry of Information and Communication and the Ministry of Information and Communication Research and Development. [Task Management No .: 2006-S-079-02, Title: Smart window using transparent electronic device] .

Transparent electronic devices have a wide range of applications, such as displays, advertisements using transparent glass plates, and various instrument panels.

The transparent electronic device is based on a transparent thin film transistor (TTFT), and in general, a channel of the transparent thin film transistor is formed of a zinc oxide (ZnO) based material or a non-ZnO based material.

However, when the channel is formed of a ZnO-based material, there is a problem of stability because the ZnO-based material has a property that is easily changed in atmospheric humidity, heat treatment, and manufacturing process.

In addition, when a channel is formed of a non-ZnO-based material (eg, In-Ga-Zn-O or In ₂ O ₃ , SnO _2, etc.), a p-type channel and an n-type channel cannot be simultaneously implemented. For this reason, since the n-type channel and the p-type channel must be implemented with different materials, there is a problem in that it is very disadvantageous in terms of manufacturing process and cost.

First of all, there are no materials and processes showing excellent characteristics and stability for p-type channels. Recently, a method of forming a p-type channel by p-type doping in copper oxide series (SrCuOx, CuAlOx, CuInOx, CuGaOx, CuBOx) and ZnO has been proposed, but this method also does not have excellent characteristics and stability. . In addition, in the case of the p-type channel, there is a problem that usually requires a high temperature process of 350 ℃ or more in order to obtain excellent film quality. Therefore, due to these problems, it is difficult to apply a complementary metal oxide semiconductor (CMOS) in the manufacture of a transparent electronic device, and thus there is a problem that mass production is difficult.

Accordingly, an object of the present invention is to provide a transparent electronic device having excellent stability and a method of manufacturing the same.

Another object of the present invention is to provide a transparent electronic device and a method of manufacturing the same that can simultaneously form a p-type channel and an n-type channel, thereby reducing a manufacturing process and a manufacturing cost.

Another object of the present invention is to provide a transparent electronic device and a method of manufacturing the same that can be implemented in CMOS.

In order to achieve the above object, a transparent electronic device according to the present invention comprises: a buffer layer formed on an upper surface of a substrate and formed of an oxide film or a nitride film which is easy to form a crystalline thin film; A source and a drain formed on the buffer layer; A channel layer formed between the source and the drain and having a p-type copper oxide-based material or a ZnO-based material; A hard mask layer formed on the channel layer; A transparent electrode formed on the source and the drain; And a gate formed on the transparent electrode.

Here, the channel layer may be an n-type channel or a p-type channel, and the hard mask layer may be formed of a nitride film or an oxide film to be used as an etching mask in an etching process while protecting the channel layer.

On the other hand, in order to achieve the above object, a method of manufacturing a transparent electronic device according to the present invention, (a) a buffer layer made of an oxide film or a nitride film on the substrate, easy to form a crystalline thin film, and a copper oxide in the case of p-type channels Sequentially forming a channel layer and a hard mask layer formed of a material including a series or a ZnO based material; (b) forming a photoresist pattern corresponding to the channel region on the hard mask layer, and then patterning the hard mask layer using the photoresist pattern; (c) etching the channel layer and the buffer layer by ion milling using the patterned hard mask layer; (d) doping both ends of the channel layer exposed by ion milling to form a source and a drain; (e) forming a transparent electrode on the substrate on which the source and drain are formed; And (f) forming a gate over the transparent electrode.

Here, in step (a), a buffer layer having a thickness of 10 to 100 nm is formed by using an oxide film or a nitride film that is easy to form a crystalline thin film, and in the case of a p-type channel, a material containing ZnO or a copper oxide series It is preferable to form a channel layer having a thickness of 10 to 150 nm using a series of materials. In addition, it is preferable to form a hard mask layer having a thickness of 100 to 200 nm using a nitride film or an oxide film.

In the step (d), it is preferable to form the source and the drain at both ends of the channel layer having the slope pattern by the ion milling.

According to the present invention, when manufacturing a transparent electronic device having a p-type channel, by forming a buffer layer of a material that is easy to form a crystalline thin film and then forming a channel layer of a copper oxide-based or ZnO-based material thereon Since the film quality of a channel layer can be improved only by a low temperature process, the transparent electronic device which has the outstanding stability can be manufactured by this.

In addition, according to the present invention, since the p-type channel and the n-type channel can be formed at the same time, it is possible to reduce the manufacturing process and manufacturing cost.

In addition, according to the present invention, since the source and the drain may be formed by one patterning using the hard mask layer, the source and drain may be implemented in CMOS, thereby greatly improving the design margin and performance of the display driving device.

In addition, according to the present invention, not only can the channel layer be protected by a hard mask layer made of a nitride film or an oxide film during etching, but the hard mask layer for protecting the channel layer can also be used as an etching mask in an ion milling process. Therefore, the manufacturing process can be simplified more.

Hereinafter, the most preferred embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art can easily implement the technical idea of the present invention. . In addition, in the figures, the thicknesses of layers and regions are exaggerated for clarity and may be formed directly on other layers or substrates when referred to as being on another layer or substrate. Or a third layer may be interposed therebetween. In addition, parts denoted by the same reference numerals throughout the specification represent the same element.

1A and 1B are diagrams illustrating transparent electronic devices 100 and 100 ′ according to the present invention. FIG. 1A illustrates a top gate transistor structure in which a gate is located above, and FIG. 1B illustrates a bottom gate transistor structure in which a gate is located below, and for convenience of description, FIG. A description will be given of the structure of the upper gate transistor shown.

Referring to FIG. 1A, the transparent electronic device 100 according to the present invention may include a buffer layer 120, a channel layer 130, a hard mask layer 140, and the channel layer formed sequentially on the substrate 110. The source 150 and the drain 160 formed at both ends of the 130, the transparent electrode 170 formed on the source 150 and the drain 160, and the gate insulating layer formed on the transparent electrode 170. 180 and a gate 190 formed on the gate insulating layer 180.

When a voltage is applied to the gate 190, the current path of the channel layer 130 is turned on to operate the transparent electronic device 100, or the current path of the channel layer 130 remains off.

The buffer layer 120 is formed of an oxide film or a nitride film that easily forms a crystalline thin film at low temperatures such as AlOx, SiOx, SiNx, HfOx, TiOx so that the channel layer 130 may have excellent film quality. have.

The channel layer 130 is made of silicon in the case of the n-type channel, strontium (Sr), aluminum (Al), indium (In), gallium (Ga), boron (B) in the case of the p-type channel It is made of a material containing a copper oxide series, such as, or made of a ZnO-based material such as ZnNx thin film.

That is, when manufacturing a transparent electronic device having a p-type channel, since the buffer layer 120 is made of a material that is easy to form a crystalline thin film at a low temperature, a p-type channel layer of a copper oxide-based material or ZnO-based material If the 130 is formed, the p-type channel layer 130 having excellent film quality may be obtained by only a low temperature process.

Meanwhile, both ends of the channel layer 130 have a slope pattern, and a source 150 and a drain 160 are formed in the slope pattern, such that the channel layer 130, the source 150, and the drain 160 are formed. ), And the contact characteristic is improved.

Here, the slope pattern is formed by etching both ends of the channel layer 130 by an ion milling process using the hard mask layer 140 as an etch mask. The channel layer 130 and the buffer layer 120 are etched at the same time.

The hard mask layer 140 protects the channel layer 130 and serves as an etching mask during the ion milling process as described above.

That is, the transparent electronic device 100 according to the present invention has a structure capable of implementing both an n-type channel and a p-type channel, particularly when manufacturing a transparent electronic device having a p-type channel. As a result, there is an advantage of having an excellent film quality p-type channel layer 130.

In addition, since the source 150 and the drain 160 may be formed by one patterning using the hard mask layer 140, the manufacturing process and the manufacturing cost may be reduced.

In addition, it is possible to implement a complementary metal oxide semiconductor (CMOS) by changing the order of the process, which can greatly improve the design margin and performance of the display driving device.

Hereinafter, a method of manufacturing a transparent electronic device according to the present invention will be described in detail with reference to the accompanying drawings.

2 is a flowchart illustrating a method of manufacturing a transparent electronic device according to the present invention, and FIGS. 3A to 3E are cross-sectional views illustrating a method of manufacturing a transparent electronic device according to the present invention.

The manufacturing process of FIGS. 3A to 3E will be described below based on the flowchart of FIG. 2.

First, referring to FIG. 3A, the buffer layer 120, the channel layer 130, and the hard mask layer 140 are sequentially formed on the prepared substrate 110 (S210).

Here, the buffer layer 120 is preferably made of an oxide film or a nitride film (nitride) that is easy to form a crystalline thin film at low temperatures, such as AlOx, SiOx, SiNx, HfOx, TiOx, CVD (chemical vapor deposition) or It is preferable to form about 10-100 nm in thickness using ALD (atomic layer deposition).

In the case of the n-type channel, the channel layer 130 is preferably formed to a thickness of 10 ~ 150nm using silicon.

In the case of the p-type channel, a material containing copper oxide such as strontium (Sr), aluminum (Al), indium (In), gallium (Ga), and boron (B) is deposited to a thickness of 10 to 150 nm. Preferably, the deposition method is sputtering, molecular beam epitaxy (MBE), pulsed laser deposition (PLD), atomic layer deposition (ALD), plasma enhanced chemical vapor deposition (PECVD), and metal organic chemical (MOCVD). It is preferable to use a vapor deposition method in which crystal formation such as Vapor Deposition) is easy.

In addition, in the case of the p-type channel, the channel layer 130 deposits a ZnO-based material (eg, ZnNx thin film) by sputtering and then oxidizes the p-type by a post-annealing process. Channels may also be formed.

The hard mask layer 140 protects the channel layer 130 and serves as an etching mask in a subsequent ion milling etching process. The hard mask layer 140 has a thickness of 100 to 200 nm by sputtering or PECVD with a nitride film or a hard oxide film. desirable.

Next, referring to FIG. 3B, a photoresist (PR) is coated on the hard mask layer 140, and then the photoresist is patterned through an exposure process and a patterning process to correspond to a channel region. A pattern PR ₁ is formed (S220).

Next, referring to Figure 3c, after using the PR pattern (PR _1), patterning the hard mask layer 140 is removed to the PR pattern (PR ₁₎ (S230). Here, the PR pattern PR ₁ may be used as a hard mask by baking at 200 to 300 ° C. without removing the PR pattern PR ₁ .

Subsequently, the channel layer 130 and the buffer layer 120 are etched using the patterned hard mask layer 140 by ion milling (S240). At this time, the etching of the buffer layer 120 is not important because it does not significantly affect device characteristics.

Next, referring to FIG. 3D, both ends of the channel layer 130 exposed by the ion milling process, that is, the source and drain regions, are doped by a method such as heat or laser radiation between 300 ° C and 700 ° C. 150 and the drain 160 is formed (S250).

Next, referring to FIG. 3E, the transparent electrode 170 is formed on the substrate 110 on which the source 150 and the drain 160 are formed (S260). Herein, the transparent electrode 170 is formed by sputtering ITO (Indium-Tin-Oxide) such as In-Sn-O and Al-Zn-O by sputtering, and then patterning the same by an exposure process and an etching process using a mask. It is preferable.

Subsequently, the gate insulating layer 180 is formed on the transparent electrode 170 (S270). Here, the gate insulating layer 180 is preferably made of an oxide film or a nitride film.

Finally, the gate 190 is formed on the gate insulating layer 180 (S280). Here, the gate 180 is preferably made of metal, silicide or doped silicon.

As described above, according to the method of manufacturing a transparent electronic device of the present invention, the film quality of the p-type channel layer 130 is improved by the buffer layer 120, thereby manufacturing a p-type transparent electronic device having excellent stability. In addition, since the n-type channel and the p-type channel can be implemented, the manufacturing process and the manufacturing cost can be reduced.

In addition, since the source 150 and the drain 160 may be formed by patterning the p-type channel layer 130 and the buffer layer 120 at one time by using the hard mask layer 140, the present invention may be implemented in CMOS accordingly. Therefore, the design margin and performance of the display driving device can be greatly improved.

In addition, according to the present invention, not only the channel layer 130 may be protected by the hard mask layer 140 formed of a nitride film or an oxide film in the manufacturing process, but the hard mask layer 140 for protecting the channel layer 130. ) Can also be used as an etch mask in an ion milling process, thus simplifying the manufacturing process.

So far, the present invention has been described with reference to the preferred embodiments, and those skilled in the art to which the present invention belongs may be embodied in a modified form without departing from the essential characteristics of the present invention. You will understand. Therefore, the disclosed embodiments should be considered in descriptive sense only and not for purposes of limitation. The scope of the present invention is shown in the claims rather than the foregoing description, and all differences within the scope will be construed as being included in the present invention.

1A and 1B illustrate a transparent electronic device according to the present invention.

2 is a flowchart illustrating a method of manufacturing a transparent electronic device according to the present invention.

3A to 3E are cross-sectional views illustrating a method of manufacturing a transparent electronic device according to the present invention.

Explanation of symbols on the main parts of the drawings

100: transparent electronic device 110: substrate

120: buffer layer 130: channel layer

140: hard mask layer 150: source

160: drain 170: transparent electrode

180: gate insulating layer 190: gate

Claims (16)

A buffer layer formed on the substrate and formed of an oxide film or a nitride film to easily form a crystalline thin film; A source and a drain formed on the buffer layer; A channel layer formed between the source and the drain and having a p-type copper oxide-based material or a ZnO-based material; A hard mask layer formed on the channel layer; A transparent electrode formed on the source and the drain; And And a gate formed on the transparent electrode. The method of claim 1, The channel layer is a transparent electronic device, characterized in that made of silicon in the case of n-type. The method of claim 1, The channel layer is a transparent electronic device, characterized in that the n-type channel or p-type channel. The method of claim 1, The hard mask layer is a transparent electronic device, characterized in that consisting of a nitride film or an oxide film. The method of claim 1, The hard mask layer is a transparent electronic device, characterized in that used as an etching mask in the etching process while protecting the channel layer. The method of claim 1, And the source and drain have a slope pattern. The transparent electronic device of claim 1, wherein the transparent electrode is made of indium-tin-oxide (ITO). The method of claim 1, And a gate insulating layer formed of an oxide film or a nitride film between the transparent electrode and the gate. (a) a buffer layer made of an oxide film or a nitride film easily forming a crystalline thin film on the substrate, a channel layer made of a material containing copper oxide or a ZnO-based material in the case of a p-type channel, and a hard mask layer Sequentially forming; (b) forming a photoresist pattern corresponding to the channel region on the hard mask layer, and then patterning the hard mask layer using the photoresist pattern; (c) etching the channel layer and the buffer layer by ion milling using the patterned hard mask layer; (d) doping both ends of the channel layer exposed by ion milling to form a source and a drain; (e) forming a transparent electrode on the substrate on which the source and drain are formed; And (f) forming a gate over the transparent electrode. The method of claim 9, wherein in step (a), A method for manufacturing a transparent electronic device, further comprising forming a buffer layer having a thickness of 10 to 100 nm using an oxide film or a nitride film with which a crystalline thin film is easily formed. The method of claim 9, wherein in step (a), In the case of the n-type channel using silicon to form a channel layer having a thickness of 10 to 150nm further comprising the step of manufacturing a transparent electronic device. The method of claim 9, wherein in step (a), For the p-type channel further comprises the step of forming a channel layer having a thickness of 10 to 150nm using a material containing a copper oxide series or ZnO-based material. The method of claim 9, wherein in step (a), Forming a hard mask layer having a thickness of 100 to 200nm by using a nitride film or an oxide film. The method of claim 9, wherein in step (d), And forming a source and a drain at both ends of the channel layer having a slope pattern by the ion milling. The method of claim 9, wherein in step (e), And forming a transparent electrode on the substrate on which the source and the drain are formed by using indium-tin-oxide (ITO). The method of claim 9, wherein in step (f), Forming a gate insulating layer formed of an oxide film or a nitride film on the transparent electrode; And And forming a gate made of metal, silicide, or doped silicon on the gate insulating layer.

Images