KR100942512B1 - Array substrate for improving image quality, manufacturing method thereof and liquid crystal display including the same - Google Patents

Abstract

An array substrate, a method of manufacturing the array substrate, and a liquid crystal display including the array substrate are disclosed. According to an embodiment of the present invention, a method of manufacturing an array substrate includes forming a floating gate, removing an inside of the floating gate to form an opening having a width of a first length, and then spaced apart from the floating gate by a first distance. A data line having a width of a second length is formed on the pixel, and a pixel electrode is formed on the floating gate and spaced apart by a second distance greater than a first distance. The present invention improves image quality by blocking cross-talk between floating gates for blocking an interface between a data line applying a pixel voltage to a thin film transistor disposed in each pixel of a substrate and a color filter. In addition, the parasitic capacitor generated between the data line and the floating gate may be reduced to reduce power consumption of the liquid crystal display.

Liquid Crystal Display, Crosstalk, Data Line, Floating Gate, Opening

Description

ARRAY SUBSTRATE FOR ENHANCING DISPLAY QUALITY, METHOD FOR MANUFACTURING THE SAME AND LIQUID CRYSTAL DISPLAY DEVICE HAVING THE SAME}             

1 is a schematic cross-sectional view of a conventional array substrate.

2 is a schematic diagram illustrating a driving principle of a liquid crystal display device.

3A is a schematic cross-sectional view of an array substrate according to an embodiment of the present invention.

3B is a plan view illustrating one embodiment of an opening formed on a floating gate.

3C is a plan view illustrating another embodiment of an opening formed on a floating gate.

4 is a layout illustrating an array substrate of a liquid crystal display according to an exemplary embodiment of the present invention.

5 is a cross-sectional view taken along line AA ′ of FIG. 4.

FIG. 6 is a cross-sectional view taken along line BB ′ of FIG. 4.

<Brief description of the main parts of the drawing>

101, 301: floating gate 102: data line                 

103: pixel electrode 201: thin film transistor

202: storage capacitor 203: gate line

302: opening 501: color filter substrate

502: array substrate 503: first glass substrate

504: color filter 505: planarization film

506 liquid crystal layer 507 third insulating layer

508: second insulating layer 509: first insulating layer

510: insulating film 511: second glass substrate

512: common electrode 513: contact

The present invention relates to an array substrate, a method of manufacturing the same, and a liquid crystal display including the same. More specifically, the present invention relates to blocking an interface between a data line and a color filter applying a pixel voltage to a thin film transistor disposed in each pixel of the array substrate. The present invention relates to an array substrate having improved image quality by blocking cross-talk between floating gates, a method of manufacturing the same, and a liquid crystal display including the same.

A liquid crystal display device is a device that displays an image using a liquid crystal. Liquid crystal displays are light and thin, and their range of use is gradually expanding.                         

The liquid crystal display largely includes a liquid crystal display panel and a backlight assembly. The backlight assembly is disposed under the liquid crystal display panel to supply light to the liquid crystal display panel.

The liquid crystal display panel includes a color filter substrate, an array substrate, and a liquid crystal layer interposed between the color filter substrate and the array substrate. The color filter substrate includes a color filter including a red color filter, a green color filter, and a blue color filter in a matrix form.

The array substrate includes a thin film transistor, a storage capacitor and a pixel electrode. The thin film transistor, the storage capacitor, and the pixel electrode face the color filter of the color filter substrate.

The array substrate also includes data lines and gate lines. The data line and the gate line face the interface of the color filter.

The data line is electrically connected to a source of the thin film transistor, and the gate line is electrically connected to a gate of the thin film transistor. The drain of the thin film transistor is electrically connected to the pixel electrode.

When a voltage is applied to the gate line, the thin film transistor electrically connected to the gate line is turned on, and the voltage of the data line is applied to the pixel electrode. When the pixel voltage is applied to the pixel electrode, an electric field is formed between the pixel electrode of the array substrate and the common electrode of the color filter substrate, and the liquid crystal molecular arrangement of the liquid crystal layer positioned between the array substrate and the color filter substrate is changed by the electric field. The optical properties of the liquid crystal molecules change.                         

The image is displayed by the light passing through the changed liquid crystal.

The array substrate also includes a floating gate. The floating gate is formed simultaneously with the gate of the thin film transistor, but unlike the gate of the thin film transistor, it is not electrically connected. This is because the floating gate only serves to prevent light passing through the backlight assembly from leaking between the color filters.

1 is a schematic cross-sectional view of a conventional array substrate.

Referring to FIG. 1, the floating gate 101, like the data line 102, faces an interface of a color filter (not shown) and is located below the data line 102.

The floating gate 101 is formed at an interface of each color filter to block light leaking between each color filter and to improve a vertical contrast ratio. In order to block light leaking between the color filters, the pixel electrode 103 overlaps the floating gate 101 by a first distance d ₁ .

However, since the floating gate and the data line face each other, parasitic capacitance is generated between the floating gate and the data line by overlapping by the second distance d _2, and thus cross-talk occurs, thereby degrading the image quality of the liquid crystal display. There was a problem letting. In addition, there is a problem of increasing power consumption of the liquid crystal display due to parasitic capacitance.

It is therefore a first object of the present invention to provide an array substrate which improves image quality by reducing crosstalk between data lines and floating gates.

It is also a second object of the present invention to provide a method of manufacturing such an array substrate.

In addition, a third object of the present invention is to provide a liquid crystal display device having an improved image quality including the array substrate.

In order to achieve this object, a method of manufacturing an array substrate according to an exemplary embodiment of the present invention includes forming a floating gate, removing a width of a first length along a length direction of the floating gate, and A data line having a width of a second length is formed at an upper portion spaced apart from the floating gate by a first distance, and a pixel electrode is formed at an upper portion spaced apart from the floating gate by a second distance greater than the first distance.

In addition, in the method of manufacturing an array substrate according to an embodiment of the present invention, a metal layer is deposited on a glass substrate, and the metal layer is etched to form a gate and a floating gate etched with a width of a first length. After forming a data line having a width of a second length on an upper portion spaced by one distance, a pixel electrode is formed on the upper portion spaced by a second distance greater than a first distance from the floating gate.                     

In addition, the array substrate according to the embodiment of the present invention includes a pixel electrode, a switching element, a gate line, a data line, and a floating gate. The pixel voltage is applied to the pixel electrode. The switching element includes a gate electrode, a drain electrode, and a source electrode, and the drain electrode is electrically connected to the pixel electrode. The gate line is electrically connected to the gate electrode of the switching device to turn on / off the switching device. The data line is electrically connected to the source electrode to apply the pixel voltage to the pixel electrode. The floating gate is disposed under the data line, and an area facing the data line is removed.

In addition, the array substrate according to the embodiment of the present invention comprises: i) a plurality of pixel electrodes formed on the first plane, and ii) a second plane positioned between the pixel electrodes and spaced apart from the first plane by a first vertical distance. A data line formed to have a width of a first length, and iii) an area formed under the data line and formed on a third plane spaced apart from the first plane and spaced apart from the first plane by a second vertical distance, wherein the region having a width of the second length is removed. Formed floating gates.

In addition, the liquid crystal display device according to an embodiment of the present invention for achieving the above object is a) a first color glass substrate, a plurality of color filters formed on the glass substrate, a color filter substrate comprising a common electrode formed on the color filter, b) i) a pixel electrode to which a pixel voltage disposed opposite the color filter is applied, ii) a switching element comprising a gate electrode, a drain electrode and a source electrode, wherein the drain electrode is electrically connected to the pixel electrode, iii) A gate line electrically connected to the gate electrode of the switching element to turn on / off the switching element, iv) a data line electrically connected to the source electrode to apply the pixel voltage to the pixel electrode, and v An array substrate disposed below the data line and including a floating gate having an opening facing the data line; c) a liquid crystal layer separated between the color filter substrate and the array substrate.

In addition, the liquid crystal display device according to an embodiment of the present invention for achieving the above object is a) a first color glass substrate, a plurality of color filters formed on the glass substrate, a color filter substrate comprising a common electrode formed on the color filter, b) i) a plurality of pixel electrodes formed on a first plane facing the color filter, ii) a width of a first length on a second plane located between the pixel electrodes and spaced apart from the first plane by a first vertical distance Iii) a floating gate formed under the data line, formed on a third plane spaced apart from the first plane, and spaced apart from the first plane by a second vertical distance, and having a region having a width of a second length. An array substrate, and c) a liquid crystal layer interposed between the color filter substrate and the array substrate.

Hereinafter, the present invention will be described in detail with reference to the drawings.

2 is a schematic diagram illustrating a driving principle of a liquid crystal display device.

Referring to FIG. 2, a plurality of data lines 102 are formed on the array substrate to be spaced apart by a predetermined distance in a first direction, and the plurality of gate lines 203 are a predetermined distance in a second direction perpendicular to the first direction. It is formed by spaced apart. The data line 102 and the gate line 203 are formed at different heights from the array substrate.                     

One pixel is defined by an area surrounded by each data line 102 and each gate line 203. One pixel includes a thin film transistor 201, a storage capacitor 202, and a liquid crystal capacitor (a capacitor formed between a pixel electrode and a common electrode).

The thin film transistor 201 includes a gate electrode G, a source electrode S, and a drain electrode D. FIG. The gate electrode D of the thin film transistor 201 is electrically connected to the gate line 203. The source electrode S of the thin film transistor 201 is electrically connected to the data line 102. In addition, the drain electrode D of the thin film transistor 201 is electrically connected to the storage capacitor 202 and the pixel electrode 102.

When a gate voltage is applied to the gate electrode G, the thin film transistor 201 is turned on. When the thin film transistor 201 is turned on, the pixel voltage of the data line 102 is applied to the storage capacitor 202 and the pixel electrode 103 through the thin film transistor 201.

The storage capacitor 202 prevents the pixel voltage applied to the pixel electrode from changing after the data input is finished.

The pixel electrode 103 includes indium tin oxide (ITO) or indium zinc oxide. Indium tin oxide and indium zinc oxide have good conductivity as transparent materials.

3A is a schematic cross-sectional view of an array substrate according to an embodiment of the present invention.

Referring to FIG. 3, an array substrate according to an embodiment of the present invention includes a pixel electrode 103, a data line 102, and a floating gate 301.

The data line 102 is positioned on the floating gate 301.

An opening 302 is formed in the floating gate 301. The width of the opening 302 is smaller than the width d ₂ of the data line. If the width of the opening 302 is greater than the width d ₂ of the data line 102, light passing through the backlight assembly leaks into the space between the opening 302 and the data line 102, thereby weakening the contrast ratio. This is because the image quality is bad.

Naturally, the opening 302 may be extended in the longitudinal direction (upper or lower surface) of the data line 102 or a plurality of openings may be formed and arranged in the longitudinal direction of the data line 102.

3B is a plan view showing one embodiment of an opening formed on a floating gate, and FIG. 3C is a plan view showing a different embodiment of an opening formed on a floating gate.

3B and 3C, the shape of the opening 302 formed in the floating gate 301 may extend in the longitudinal direction of the floating gate 301, and the plurality of openings 302 may include a floating gate ( 301 may be arranged in the longitudinal direction. It is well known that the shape of the opening 302 can be modified in any form as long as the area of overlap with the data line is reduced.

4 is a layout illustrating an array substrate of a liquid crystal display according to an exemplary embodiment of the present invention.

Referring to FIG. 4, a plurality of pixel electrodes 103 are formed, and a floating gate 301 is formed in a space between each pixel electrode 103. An opening 302 is formed in the floating gate 301. In FIG. 4, the opening 302 is elongated in the longitudinal direction of the floating gate 301, but a plurality of openings are formed, and the plurality of openings may be arranged in the longitudinal direction of the floating gate 301. . A data line 102 is formed on the floating gate 301. A portion of the data line 102 protrudes to form a source electrode S of the transistor 201. A portion of the gate line 203 protrudes to form the gate electrode G of the transistor 201. The drain D of the transistor 201 is electrically connected to the pixel electrode 103.

5 is a cross-sectional view taken along line AA ′ of FIG. 4, and FIG. 6 is a cross-sectional view taken along line BB ′ of FIG. 4.

5 and 6, a gate electrode G and a floating gate 301 are formed on the second glass substrate 511. The gate electrode G and the floating gate 301 may be formed of the same material and may be simultaneously formed. That is, the metal film including aluminum or the like is coated on the second glass substrate 511 and then etched to form the gate electrode G and the floating gate 301. The opening 302 of the floating gate 301 may be simultaneously formed in the process of forming the gate electrode G and the floating gate 301 by such etching, or may be formed by etching after forming the floating gate 301. May be

An insulating layer 510 is formed on the gate electrode G and the floating gate 301. An amorphous silicon film (a-Si: H) is formed on the insulating layer 510 and the gate electrode G forming portion, and a source electrode S and a drain electrode D are formed thereon.

The first insulating layer 509 is formed on the upper portion again. The data line 102 is formed on the first insulating layer 509.

As described above, the data line 102 covers the opening 302 of the floating gate 301 on the floating gate 301. Light generated in the backlight assembly (not shown) under the array substrate 502 and passed through the opening 302 is blocked by the floating gate 301, and forms the opening 302 in the floating gate 301 to form the floating gate. By overlapping the overlapped portion of the 301 and the data line 102, parasitic capacitances of the floating gate 301 and the data line 102 are reduced, thereby reducing power loss. In addition, cross-talk between the floating gate 301 and the data line 102 is reduced, so that a liquid crystal display device having better image quality can be realized.

The second insulating layer 508 is formed on the data line 102, and the pixel electrode 103 is formed on the second insulating layer 508. The connection between the data line 102 and the source electrode S is via a contact, but is omitted in this drawing.

The pixel electrode 103 includes indium tin oxide (ITO) or indium zinc oxide (IZO), and indium tin oxide and indium zinc oxide have excellent conductivity, are transparent, and thermally stable. The workability of the electrode pattern is excellent. The pixel electrode 103 is electrically connected to the drain electrode of the transistor 201 by a contact 513.

The third insulating layer 507 is formed on the pixel electrode 103. The array substrate 502 has been described above. Next, the color filter substrate 501 will be described.

In addition, a plurality of color filters are formed on the first glass substrate 503. The color filter includes a red color filter (R), a green color filter (G), and a blue color filter (B).

Each of the color filters R, G, and B is formed to face one pixel electrode 103, respectively.

The arrangement of the color filter includes a stripe type, a mosaic type, and a triangle type 4 pixel arrangement type. In the present invention, the stripe type is exemplarily illustrated, but the present invention is not limited thereto.

The flattening film 505 covers such color filters, thereby protecting these color filters R, B, and B, and reducing the level to improve flatness. The planarization layer 505 includes an acrylic resin or a polyimide resin.

The common electrode 512 is formed on the planarization layer 505.

The common electrode 512 includes indium tin oxide (ITO) or indium zinc oxide (IZO). The common electrode 512 is applied with a common voltage (generally, a ground voltage). An electric field is formed between the common electrode 512 and the pixel electrode 103 to which the pixel voltage is applied during driving. The color filter substrate 501 has been described above.

The liquid crystal layer 506 is interposed between the color filter substrate 501 and the array substrate 502. Liquid crystal refers to a liquid substance having properties such as crystal or solid. The arrangement of the liquid crystals varies according to the magnitude of the electric field applied to the liquid crystals, and thus the amount of light transmitted varies.

According to the change in the electric field formed between the pixel electrode 103 and the common electrode 512, the arrangement of the liquid crystal positioned between the pixel electrode 103 and the common electrode 512 is changed, and accordingly, the color filter substrate 501, The amount of light emitted to the upper portion of the liquid crystal display panel including the liquid crystal layer 506 and the array substrate 502 is changed.

When the gate driving signal voltage is applied to one of the plurality of thin film transistors 201 in which the gate driving circuit (not shown) is arranged in a matrix form, the thin film transistor 201 is turned on and the thin film is turned on in the data driving circuit (not shown). When the pixel voltage is applied to the source electrode of the transistor 201, the applied pixel voltage is applied to the pixel electrode 103 through the drain electrode. Therefore, the arrangement of the liquid crystal positioned between the pixel electrode 103 and the common electrode 512 is changed. Therefore, the image is displayed.

The present invention improves image quality by blocking cross-talk between floating gates for blocking an interface between a data line and a color filter applying a pixel voltage to thin film transistors disposed in each pixel of a substrate.

In addition, the parasitic capacitor generated between the data line and the color filter reduces the power consumption of the liquid crystal display.

While the above has been described with reference to the preferred embodiments of the present invention, those skilled in the art will be variously modified and modified within the scope of the present invention without departing from the spirit and scope of the present invention described in the claims below. It will be appreciated that it can be changed.

Claims (24)

Forming a floating gate; Removing a width of a first length in a longitudinal direction of the floating gate; Forming a data line having a width of a second length in an upper portion of the floating gate in a lengthwise direction from the floating gate by a first distance; And Forming a pixel electrode at an upper portion spaced apart from the floating gate by a second distance greater than a first distance, wherein the width of the removed first length forms an opening, and the opening is in a length direction of the data line. Method of manufacturing an array substrate characterized in that it is extended or arranged along the length. The method of claim 1, wherein the first length is formed to be smaller than the second length such that the data line passes through the width of the removed first length by covering the width of the removed first length of the floating gate. Wherein light is blocked by said data line. The method of claim 1, wherein the width of the removed first length extends along a length direction of the data line. The method of claim 1, wherein the width of the removed first length forms a plurality of openings, and the plurality of openings are arranged along a length direction of the data line. A pixel electrode to which a pixel voltage is applied; A switching element including a gate electrode, a drain electrode, and a source electrode, wherein the drain electrode is electrically connected to the pixel electrode; A gate line electrically connected to the gate electrode of the switching device to turn on / off the switching device; A data line electrically connected to the source electrode to apply the pixel voltage to the pixel electrode; And A floating gate disposed below the data line in an extension direction of the data line, the floating gate having an area facing the data line removed, wherein the width of the removed first length defines an opening, the opening of the data line An array substrate, characterized in that it is elongated or arranged along the longitudinal direction. The method of claim 5, And the width of the removed opposite area of the floating gate is less than the width of the data line. 6. The array substrate of claim 5, wherein the removed facing area of the floating gate extends along the length of the data line. 6. The array substrate of claim 5, wherein the width of the removed first length forms a plurality of openings, the plurality of openings arranged along a length direction of the data line. A plurality of pixel electrodes formed on the first plane; A data line disposed between the pixel electrodes and formed to have a width of a first length on a second plane spaced apart from the first plane by a first vertical distance; And A floating gate positioned below the data line in the data line extension direction and formed on a third plane spaced apart from the first plane by a second vertical distance, and having a region having a width of a second length; Wherein the width of the first length removed forms an opening, wherein the opening extends or is arranged long along the length of the data line. 10. The array substrate of claim 9, wherein the first vertical distance is less than the second vertical distance. 10. The array substrate of claim 9, wherein said first length is greater than said second length. 10. The array substrate of claim 9, wherein a portion of the floating gate overlaps the pixel electrode. A color filter substrate including a first glass substrate, a plurality of color filters formed on the first glass substrate, and a common electrode formed on the color filter; i) a pixel electrode to which the pixel voltage disposed opposite the color filter is applied, ii) a switching element including a gate electrode, a drain electrode, and a source electrode, wherein the drain electrode is electrically connected to the pixel electrode, iii) the switching A gate line electrically connected to a gate electrode of an element to turn on / off the switching element, iv) a data line electrically connected to the source electrode to apply the pixel voltage to the pixel electrode, and v) the An array substrate disposed below the data line in an extension direction of the data line and including a floating gate from which an area facing the data line is removed; And And a liquid crystal layer separated between the color filter substrate and the array substrate, wherein the width of the removed first length forms an opening, and the opening extends or is arranged long along the length direction of the data line. Liquid crystal display device. The method of claim 13, And a width of an area of the removed floating gate is smaller than a width of the data line. The liquid crystal display of claim 13, wherein the removed floating gate region extends along a length direction of the data line. The liquid crystal display of claim 13, wherein the removed floating gate region defines a plurality of openings, and the plurality of openings are arranged along a length direction of the data line. A color filter substrate including a first glass substrate, a plurality of color filters formed on the first glass substrate, and a common electrode formed on the color filter; i) a plurality of pixel electrodes formed on a first plane so as to face the color filter; ii) a width of a first length on a second plane located between the pixel electrodes and spaced apart from the first plane by a first vertical distance. A data line formed below the data line, and iii) a region having a width of a second length formed on the third plane below the data line and spaced apart from the first plane and spaced apart from the first plane by a second vertical distance. An array substrate comprising a floating gate; And And a liquid crystal layer separated between the color filter substrate and the array substrate, wherein the width of the second length defines an opening, and the opening extends or is arranged in a length direction of the data line. Liquid crystal display. 18. The liquid crystal display of claim 17, wherein the first vertical distance is smaller than the second vertical distance. 18. The liquid crystal display device according to claim 17, wherein the first length is larger than the second length. 18. The liquid crystal display of claim 17, wherein a portion of the floating gate overlaps the pixel electrode. Depositing a metal layer on the glass substrate; Etching the metal layer to form a floating gate from which a gate and a region of a first length are removed; Forming a data line having a width of a second length in an upper portion of the floating gate in a lengthwise direction from the floating gate by a first distance; And Forming a pixel electrode at an upper portion spaced apart from the floating gate by a second distance greater than a first distance, wherein the width of the removed first length forms an opening, and the opening is in a length direction of the data line. Method of manufacturing an array substrate characterized in that it is extended or arranged along the length. 22. The method of claim 21, wherein the first length is formed to be less than the second length such that the data line covers the removed region of the floating gate such that light passing through the opening is blocked by the floating gate. The manufacturing method of the array substrate characterized by the above-mentioned. 22. The method of claim 21, wherein the region of the removed floating gate extends along the length of the data line. 22. The method of claim 21, wherein the metal layer comprises aluminum.

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