KR100884038B1 - 전자부품의 실장구조 - Google Patents
전자부품의 실장구조 Download PDFInfo
- Publication number
- KR100884038B1 KR100884038B1 KR1020070060900A KR20070060900A KR100884038B1 KR 100884038 B1 KR100884038 B1 KR 100884038B1 KR 1020070060900 A KR1020070060900 A KR 1020070060900A KR 20070060900 A KR20070060900 A KR 20070060900A KR 100884038 B1 KR100884038 B1 KR 100884038B1
- Authority
- KR
- South Korea
- Prior art keywords
- underfill
- film
- electronic component
- insulating film
- insulating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000009792 diffusion process Methods 0.000 claims abstract description 15
- 238000000034 method Methods 0.000 claims description 34
- 239000000758 substrate Substances 0.000 claims description 26
- 239000011248 coating agent Substances 0.000 claims description 9
- 238000000576 coating method Methods 0.000 claims description 9
- 239000003822 epoxy resin Substances 0.000 claims description 4
- 229920000647 polyepoxide Polymers 0.000 claims description 4
- 239000004065 semiconductor Substances 0.000 claims description 4
- 229920005989 resin Polymers 0.000 claims description 3
- 239000011347 resin Substances 0.000 claims description 3
- 239000007791 liquid phase Substances 0.000 claims description 2
- 239000010408 film Substances 0.000 description 114
- 239000007788 liquid Substances 0.000 description 18
- 230000015572 biosynthetic process Effects 0.000 description 6
- 238000012217 deletion Methods 0.000 description 6
- 230000037430 deletion Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 230000005540 biological transmission Effects 0.000 description 4
- 238000000149 argon plasma sintering Methods 0.000 description 3
- 230000001154 acute effect Effects 0.000 description 2
- 238000009434 installation Methods 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 239000012528 membrane Substances 0.000 description 2
- 238000005192 partition Methods 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 230000002349 favourable effect Effects 0.000 description 1
- 230000002787 reinforcement Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
- H05K13/04—Mounting of components, e.g. of leadless components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
- H01L2224/26152—Auxiliary members for layer connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
- H01L2224/26175—Flow barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
Claims (6)
- 복수의 단자가 설치된 절연기판과, 상기 단자를 피한 상태에서 상기 절연기판 위에 설치된 절연피막과, 본체부의 하면에 설치된 전극이 상기 단자에 접속된 전자부품과, 상기 절연피막과 상기 전자부품과의 사이, 및 상기 절연기판과 상기 전자부품과의 사이에 설치된 수지로 이루어지는 언더필을 구비하고, 상기 절연피막은 상기 절연피막이 제거되어 절연기판이 노출된 피막 제거부를 가지고, 상기 절연피막 위에 설치된 상기 언더필이 상기 피막 제거부에 의하여 확산이 억제된 것을 특징으로 하는 전자부품의 실장구조.
- 제 1항에 있어서,상기 피막 제거부는, 상기 본체부를 둘러싸도록 설치되고, 상기 언더필이 상기 피막 제거부의 가장자리부에서 멈추어 상기 피막 제거부 내에 유입되지 않는 것을 특징으로 하는 전자부품의 실장구조.
- 제 1항 또는 제 2항에 있어서,상기 전자부품이 반도체칩으로 형성된 것을 특징으로 하는 전자부품의 실장구조.
- 제 1항 또는 제 2항에 있어서,상기 피막 제거부에 위치하는 상기 절연피막의 측면과 상기 절연기판의 표면과의 사이의 각도가 80도∼90도의 범위로 형성된 것을 특징으로 하는 전자부품의 실장구조.
- 제 1항 또는 제 2항에 있어서,상기 언더필이 액상일 때, 상기 절연피막과 상기 언더필로 만들어지는 접촉각이 90도∼135도로 한 것을 특징으로 하는 전자부품의 실장구조.
- 제 5항에 있어서,상기 절연피막과 상기 언더필이 에폭시계의 수지로 형성된 것을 특징으로 하는 전자부품의 실장구조.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JPJP-P-2006-00172746 | 2006-06-22 | ||
JP2006172746A JP4203513B2 (ja) | 2005-11-16 | 2006-06-22 | 電子部品の実装構造 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20070121562A KR20070121562A (ko) | 2007-12-27 |
KR100884038B1 true KR100884038B1 (ko) | 2009-02-17 |
Family
ID=38991959
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020070060900A Expired - Fee Related KR100884038B1 (ko) | 2006-06-22 | 2007-06-21 | 전자부품의 실장구조 |
Country Status (3)
Country | Link |
---|---|
KR (1) | KR100884038B1 (ko) |
CN (1) | CN100511663C (ko) |
TW (1) | TW200805613A (ko) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8426959B2 (en) | 2009-08-19 | 2013-04-23 | Samsung Electronics Co., Ltd. | Semiconductor package and method of manufacturing the same |
US8451620B2 (en) | 2009-11-30 | 2013-05-28 | Micron Technology, Inc. | Package including an underfill material in a portion of an area between the package and a substrate or another package |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5218234A (en) * | 1991-12-23 | 1993-06-08 | Motorola, Inc. | Semiconductor device with controlled spread polymeric underfill |
JPH11150206A (ja) * | 1997-11-17 | 1999-06-02 | Oki Electric Ind Co Ltd | 半導体素子の実装基板 |
JPH11214586A (ja) | 1998-01-20 | 1999-08-06 | Murata Mfg Co Ltd | 電子回路装置 |
US20060108673A1 (en) | 2003-06-27 | 2006-05-25 | Germain Stephen S | Method for forming an encapsulated device and structure |
-
2007
- 2007-05-17 TW TW096117637A patent/TW200805613A/zh not_active IP Right Cessation
- 2007-06-19 CN CNB2007101121287A patent/CN100511663C/zh not_active Expired - Fee Related
- 2007-06-21 KR KR1020070060900A patent/KR100884038B1/ko not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5218234A (en) * | 1991-12-23 | 1993-06-08 | Motorola, Inc. | Semiconductor device with controlled spread polymeric underfill |
JPH11150206A (ja) * | 1997-11-17 | 1999-06-02 | Oki Electric Ind Co Ltd | 半導体素子の実装基板 |
JPH11214586A (ja) | 1998-01-20 | 1999-08-06 | Murata Mfg Co Ltd | 電子回路装置 |
US20060108673A1 (en) | 2003-06-27 | 2006-05-25 | Germain Stephen S | Method for forming an encapsulated device and structure |
Also Published As
Publication number | Publication date |
---|---|
KR20070121562A (ko) | 2007-12-27 |
TW200805613A (en) | 2008-01-16 |
CN101093821A (zh) | 2007-12-26 |
CN100511663C (zh) | 2009-07-08 |
TWI340448B (ko) | 2011-04-11 |
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