KR100859520B1 - Liquid crystal display and data driver thereof - Google Patents

Abstract

The present invention discloses a data driver and a liquid crystal display including the same, which can generate a gamma reference voltage and generate the internal or external data driver to solve a problem in image quality of the liquid crystal display and reduce the number of external input pins. do.

According to the present invention, the digital gamma storage unit is based on a predetermined gamma load signal, and receives and stores digital gamma data for each RGB through a predetermined data bus from the outside, and the gamma reference voltage generator is based on the stored digital gamma data for each RGB. The gamma reference voltage for gradation display, which is used when converting the display data into an analog form, is independently generated for each RGB, and the digital-to-analog converter converts each RGB image data into an analog voltage based on the generated gamma reference voltage. To print.

As a result, by controlling each RGB to have an independent gamma curve without receiving a gamma reference voltage from the outside, each RGB can have an independent gamma curve. Can be reduced.

LCD, Gamma, Voltage Reference, Independent, Picture Quality Improvement, RGB, LCD

Description

LCD and its data driver {LIQUID CRYSTAL DISPLAY AND DATA DRIVER THEREOF}

1 is a diagram illustrating a general data driver.

2 is a diagram illustrating gamma curves of respective general RGB signals.

3 is a diagram illustrating a data driver having a gamma reference voltage generation function according to the present invention.

FIG. 4 is a diagram illustrating an internal structure of the gamma reference voltage generator of FIG. 3.

5 and 6 are diagrams illustrating a gamma reference voltage generator according to first and second embodiments of the present invention, respectively.

FIG. 7 is a diagram illustrating the first sample / hold circuit unit shown in FIG. 6.

8 and 9 are diagrams illustrating a gamma reference voltage generator according to third and fourth embodiments of the present invention, respectively.

FIG. 10 is a diagram illustrating a second sample / hold circuit unit shown in FIG. 9.

11 to 13 are diagrams illustrating a gamma reference voltage generator according to fifth to seventh exemplary embodiments of the present invention, respectively.

14 is a diagram illustrating a third sample / hold circuit unit.

15 to 20 are diagrams illustrating gamma reference voltage generators according to the eighth to thirteenth embodiments of the present invention, respectively.

<Description of the symbols for the main parts of the drawings>

10: shift register 20: data register

30: data latch 40: D / A converter

50: output buffer 100: gamma register

200: gamma reference voltage generator 210: first polarity gamma voltage output unit

220: second polarity gamma voltage output unit 250: R reference voltage generator

260: G reference voltage generator 270: B reference voltage generator

300: gamma voltage generator 310: positive gamma voltage generator

320: negative gamma voltage generator

S / H I, S / H II, S / H III; Sample / Hold Circuit Section

The present invention relates to a data driver and a liquid crystal display including the same, and more particularly, to a data driver for solving a problem in image quality of a liquid crystal display by generating a gamma reference voltage independent for each RGB inside or outside thereof. It relates to a liquid crystal display device.

In general, a liquid crystal display device includes a data driver for outputting an image signal, a gate driver for outputting a scan signal, and a liquid crystal panel, and applies an electric field to a liquid crystal material having an anisotropic dielectric constant injected between two substrates provided in the liquid crystal panel. The display device obtains a desired image signal by controlling the amount of light transmitted through the substrate by adjusting the intensity of the electric field.

1 is a diagram for explaining an internal block of a general data driver.

Referring to FIG. 1, a general data driver includes a shift register 10, a data register 20, a data latch 30, a D / A converter 40, and an output buffer 50, and a timing controller (not shown). Each of the RGB data which is sequentially input in accordance with the dot clock is latched to change the timing system of the dot sequence method to the line sequence method to output the data voltage to the data line side of the liquid crystal panel.

In operation, the shift register 10 stores the R, G, and B data transmitted from the timing controller (not shown) while sequentially shifting in synchronization with the shift clock. At this time, if all data is stored in the shift register of the data driver, the data driver sends a carry out signal to the next data driver, and the next data driver operates like the previous data driver.

The D / A converter 40 receives the data signal stored in the shift register 10 via the data register 20 and the data latch 30 and converts the data signal into an analog gray voltage value corresponding thereto. That is, the D / A converter 40 receives a gray voltage output from the gray voltage generator (not shown) and a data signal output from the shift register 10 to correspond to the data signal stored in the shift register 10. Outputs the analog gradation voltage value. In particular, the D / A converter 40 converts RGB data input from the data latch 30 into an analog voltage based on a plurality of external gamma reference voltages VGMA1,..., VGMA18.

The output buffer 50 stores the analog gray voltage output from the D / A converter 40. When the predetermined load signal is applied, the output buffer 50 applies the analog gray voltage to the data line electrically connected to the data driver, line by line. .

The current liquid crystal display uses the same electrical signal under the assumption that the above electro-optical characteristics are the same, although the electro-optical characteristics of each of the R, G, and B pixels are clearly different.

Therefore, when actually measuring the gamma characteristics of R, G, B independently, it can be seen that they do not coincide in one curve as shown in FIG.

FIG. 2 illustrates gamma curves for R, G, and B of a general liquid crystal panel, and of course, luminance levels for grays of gamma curves for R, G, and B are different, but normalized to one diagram. Illustrated.

In addition, in contrast to FIG. 2, the color representation may be improved only when blue is below green and red is above green. As a result of this, the color per gray is not constant or may be severely oriented to one side.

The current data driver receives a gamma reference voltage from an external source and internally divides the gamma reference voltage into a resistor string to use digital-to-analog conversion. To do this, the data driver must accept reference voltages from 18 (or less) input pins.                         

In order to solve the above-mentioned problem in FIG. 2, an independent gamma reference voltage for each of R, G, and B may be provided to the data driver. However, this method increases the number of pins of the data driver by 36, which causes a problem of increasing the size of the data driver.

In addition, to generate a gamma reference voltage independently for each of R, G, and B, a portion of generating a gamma reference voltage increases to three blocks, thereby increasing an external circuit and increasing an area of a PCB on which a data driver is mounted. There is a problem that the manufacturing unit cost rises.

In order to solve such a conventional problem, the present invention is to solve the problem of the image quality of the liquid crystal display device by generating a gamma reference voltage independent for each R, G, B, reducing the number of external input pins will be.

The liquid crystal display according to the first aspect of the present invention includes a timing controller and a data driver for outputting digital gamma data for R, G, and B data. The data driver includes a digital gamma storage, a gamma reference voltage generator, and a digital-analog converter. The digital gamma storage unit stores digital gamma data from the timing controller, and the gamma reference voltage generator separates the gamma reference voltage used for converting image data into an analog voltage based on the stored digital gamma data for each of R, G, and B. To create. The digital-to-analog converter converts image data of each of R, G, and B into analog voltages based on the generated gamma reference voltage and outputs them.

In this case, the gamma reference voltage generation unit preferably includes a plurality of DACs for receiving analog gamma data for each of R, G, and B and performing analog conversion.

The liquid crystal display according to the second aspect of the present invention includes a timing controller, a gamma reference voltage generator, and a data driver. The timing controller outputs digital gamma data for each of R, G, and B, and the gamma reference voltage generator generates a gamma reference voltage by converting the digital gamma data from the timing controller into analog. The data driver samples / holds the gamma reference voltage from the gamma reference voltage generator and outputs sampled gamma reference voltages, and images of R, G, and B images based on the sampled gamma reference voltages. It includes a digital-to-analog converter that converts the data into an analog voltage for output.

Next, a liquid crystal display and a data driver according to an exemplary embodiment of the present invention will be described in detail with reference to the drawings.

First, a data driver and a gamma reference voltage generator according to the present invention will be described with reference to FIGS. 3 and 4.

3 is a diagram illustrating a data driver having a gamma reference voltage generation function according to the present invention, and FIG. 4 is a diagram illustrating a structure of the gamma reference voltage generator of FIG. 3.

As shown in FIG. 3, the data driver according to the present invention is based on the values stored in the gamma register 100 and the gamma register 100 capable of storing digital gamma data for R, G, and B. The apparatus further includes a gamma reference voltage generator 200 generating each gamma reference voltage and outputting the gamma reference voltage to the digital-analog converter 40.

As shown in FIG. 4, the gamma reference voltage generator 200 is supplied with two power sources AVDD and GND from the outside, and the digital gamma value D0 [color by polarity D0 [which is input through the gamma register 100. 7: 0], D1 [7: 0], ..., D5 [7: 0]) to the data driver, preferably the digital-to-analog converter 40, converting the positive / negative gamma reference voltage To feed.

The timing controller (not shown) generates digital gamma data and transmits the digital gamma data to the gamma register 100 through a data bus. The digital gamma data is stored in the gamma register 100 according to the gamma load signal GMA_load which is a control signal. That is, when the gamma load signal GMA_load signal is “HIGH,” digital gamma data capable of generating a desired gamma voltage through the data bus is received and stored from the timing controller.

Next, a gamma reference voltage generator according to a preferred embodiment of the present invention will be described.

First, the gamma reference voltage generator according to the first exemplary embodiment of the present invention will be described with reference to FIG. 5.

5 is a diagram for describing a gamma reference voltage generator according to a first exemplary embodiment of the present invention.

As shown in FIG. 5, the gamma reference voltage generator 200 according to the first exemplary embodiment of the present invention includes a positive gamma voltage output unit 210 and a negative gamma voltage output for the positive gamma voltage output. And a negative gamma voltage output unit 220.

The positive gamma voltage output unit 210 includes n digital-to-analog converters (DACs) for digitally converting digital gamma data for red (R) and digital for green (G). N DACs for analog conversion of gamma data, and n DACs for analog conversion of digital gamma data for blue (B).

Like the negative gamma voltage output unit 210, the negative gamma voltage output unit 220 includes n DACs for R, G, and B, respectively.

The gamma reference voltage generator 200 simultaneously receives digital gamma data of R, G, and B from the gamma register 100, and a plurality of DACs generate corresponding gamma reference voltages, respectively. In the first embodiment of the present invention, the gamma reference voltage generator 200 uses 9 × 2 × 3 digital gamma data, that is, positive R, G, and B digital gamma data (D _V1R to D _V9R , D _V1G to D _V9G). , D _V1B ~ D _V9B) and the sub-receiving provide R, G, B, digital gamma data _{(D V10R ~ D V18R, D} V10G ~ D V18G, D V10B ~ D V18B) of the polarity assumed to generate a gamma reference voltage Will be explained.

The gamma reference voltage generator 200 according to the first embodiment of the present invention should have a DAC in a one-to-one manner in order to generate all the R, G, and B gamma reference voltages. As in the first embodiment of the present invention, in order to generate 9x2x3 gamma reference voltages, DACs should be provided as 9x2x3. However, such a large number of DACs increases the area of the data driver.

Next, various examples for reducing the area of the data driver by reducing the number of DACs provided in the gamma reference voltage generator 200 will be described.

First, a gamma reference voltage generator according to a second exemplary embodiment of the present invention will be described with reference to FIGS. 6 and 7.

FIG. 6 is a diagram illustrating a gamma reference voltage generator according to a second exemplary embodiment of the present invention. In particular, FIG. 5 illustrates a case in which a DAC is separately used for each polarity of FIG. 5.

As shown in FIG. 6, the gamma reference voltage generator 200 according to the second exemplary embodiment of the present invention may provide a positive gamma voltage output unit 210 and a negative gamma voltage output for a positive gamma voltage output. And a negative gamma voltage output unit 220.

The positive gamma voltage output unit 210 includes a DAC unit 212 including a plurality of DACs and three first samples for sampling and holding the gamma reference voltages of R, G, and B, respectively. And a sample / holding unit 214 consisting of a holding circuit unit S / HI, and each of the digital gamma data D _V1R to D _V9R , D _V1G to D _V9G , D of positively inputted R, G, and B _portions . _V1B to D _V9B ) are output to the digital-analog converter 40 for converting the digital image data into analog via the sample / holding unit 214.

In more detail, the DAC unit 212 is a time- _divided R, G, B digital gamma data (D _V1R to D _V9R , D _V1G to D _V9G , D _V1B to D _V9B ) that are time- _divided into R, G, and B sequentially. ), And converts the gamma reference voltages (V _1R to V _9R , V _1G to V _9B , V _1B to V _9B ) of the analog converted positive polarity R, G, and B into the first sample / holding unit ( 214).

In addition, the first sample / holding unit 214 outputs to the digital-to-analog converter 40 which converts the red image data into an analog voltage by sampling the positive R gamma reference voltages V _1R to V _9R that are analog-converted and input. And sampling the positive G gamma reference voltages (V _1G to V _9G ) and outputting them to the digital-to-analog converter 40 that converts the green image data into an analog voltage, and the positive B gamma reference voltages (V _1B to V _9B). ) Is output to the digital-to-analog converter 40 which converts the blue image data into an analog voltage.

Meanwhile, the negative gamma voltage output unit 220 includes a DAC unit 222 including a plurality of DACs and three first sample / hold circuit units S / HI for sampling and outputting gamma reference voltages of R, G, and B, respectively. ) sample / hold includes a part 224, the negative polarity is sequentially inputted to R, G, each of the digital gamma data B (D _V10R ~ D _V18R, D _V10G ~ D _V18G, D _V10B ~ D _V18B), consisting of Is provided to the DAC via the sample / holding unit 224, which is similar to the operation of the first polarity gamma voltage output unit 210, and thus a detailed description thereof will be omitted.

Next, the first sample / hold circuit unit S / H I provided in the first or second sample / holding units 214 and 224 will be described with reference to FIG. 7.

FIG. 7 is a diagram illustrating the first sample / hold circuit unit S / H I illustrated in FIG. 6.

6 and 7, the first sample / hold circuit unit S / HI samples a gamma reference voltage inputted by being time-divided from a DAC of a previous stage based on a sample start signal, and samples the sampled gamma reference voltage. A plurality of sample / hold circuits are transmitted to the driving integrated circuit through the analog buffer, and the plurality of sample / hold circuits are connected to the plurality of DACs in the DAC units 212 and 222, respectively.

Here, each sample / hold circuit includes a switch for switching the on / off output of the gamma voltage input from the DAC of the previous stage based on the sample start signal, and a capacitor for storing the gamma voltage as it is input through the switch. And an analog buffer for outputting the gamma voltage charged in the capacitor to the digital-to-analog converter 40.

The first sample / hold circuit units S / H I are respectively included in the positive gamma voltage output unit 210 and the negative gamma voltage output unit 220 for R, G, and B, respectively. The sample start signal of the first sample / hold circuit S / HI for R, G, and B is a sequence of digital R, G, and B gamma data input to the positive and negative gamma voltage output units 210 and 220. They are generated with time differences to fit the corresponding R, G, and B gamma voltages.

As described above, according to the second embodiment of the present invention, the number of DACs provided in the gamma reference voltage generator 200 is, for example, 18, and as shown in FIG. 5, the number of DACs may be reduced to 1/3. have.

FIG. 8 is a diagram illustrating a gamma reference voltage generator according to a third embodiment of the present invention. In particular, FIG. 5 illustrates a case in which a DAC supporting both positive and negative polarities is used.

Referring to FIG. 8, the gamma reference voltage generator 200 according to the third exemplary embodiment of the present invention includes a gamma voltage output unit 232 for outputting a positive / negative gamma voltage and a sample for outputting a positive gamma reference voltage. / Holding unit 214 and sample / holding unit 224 for the negative gamma reference voltage output.

The gamma voltage output unit 232 is composed of a plurality of DACs, and the digital gamma data (D _V1R to D _V9R , D _V1G to D _{V9G) of} each of R, G, and B _polarities sequentially inputted after being _{divided by} R, G, and B. , D _V1B ~ D _V9B) and the negative polarity of the R, G, B respectively of the digital gamma data _{(D V10R ~ D V18R, D} V10G ~ D V18G, D V10B ~ D V18B) to analog conversion by the first sampling / holding unit And outputs to 214 and the second sample / holding unit 224.

The first sample / holding unit 214 includes three first sample / hold circuits S / HI shown in FIG. 7 for sampling and outputting gamma reference voltages of R, G, and B, respectively, and are analog-converted to sequentially The gamma reference voltages V _1R to V _9R , V _1G to V _9B , and V _1B to V _{9B of} the positive polarity R, G, and B input to the digital-analog converter 40 are output.

The second sample / holding unit 224 includes three first sample / hold circuits S / HI shown in FIG. 7 for sampling and outputting gamma reference voltages of R, G, and B, respectively, and are analog-converted and sequentially. The gamma reference voltages V _10R to V _18R , V _10G to V _18B , and V _10B to V _18B of the negative polarities R, G, and B input to the digital-analog converter 40 are output.

As described above, according to the third exemplary embodiment of the present invention, the number of DACs provided in the gamma reference voltage generator 200 is 9, for example, and the number of DACs is 54 in FIG.

In the second and third embodiments of the present invention, the gamma reference voltage generator which can reduce the number of DACs shown in FIG. 5 to 1/3 and 1/6, respectively, has been described.

That is, the digital gamma data are time-divided into R, G, and B sequentially and the gamma reference voltage converted into analog is stored in the first sample / hold circuit unit S / HI to store the reference voltages of R, G, and B. The converter 40 supplies image data to an analog converter.

Next, a gamma reference voltage generator according to a fourth exemplary embodiment of the present invention will be described with reference to FIGS. 9 and 10.

FIG. 9 is a diagram illustrating a gamma reference voltage generator according to a fourth exemplary embodiment of the present invention. In particular, FIG. 9 illustrates a case in which a DAC for generating a gamma reference voltage for each R, G, and B is separately used for each polarity.

As shown in FIG. 9, the gamma reference voltage generator 200 according to the fourth exemplary embodiment of the present invention may provide a positive gamma voltage output unit 210 and a negative gamma voltage output for the positive gamma voltage output. And a negative gamma voltage output unit 220. Since the positive and negative gamma voltage output units 210 and 220 use six DACs by using one DAC for each of R, G, and B polarities, the area of the data driver is 1/1 than that of FIG. 6. Can be reduced to three.

In this case, when one DAC is used for each of R, G, and B polarities, positive / negative R, G, and B digital gamma data (D _V1R to D _V9R , D _V1G to D _V9G , D _V1B ~ D _V9B, D ~ D _{V10R V18R, V10G} D ~ D _{V18G, V10B} D ~ D _V18B) is input to each DAC, respectively in series. Each DAC converts this analog and the analog-converted positive / negative gamma reference voltages (V _1R to V _9R , V _1G to V _9B , V _1B to V _9B , V _10R to V _18R , V _10G to V _18B , and V _10B to V _18B ) are sequentially output to the second sample / hold circuit unit (S / H II) connected to each DAC. Therefore, the second sample / hold circuit unit S / H II to implement this should be different from the first sample / hold circuit unit S / HI.

FIG. 10 is a diagram for describing a second sample / hold circuit unit described with reference to FIG. 9.

Referring to FIGS. 7 and 10, the first sample / hold circuit unit S / HI has a structure in which nine analog inputs are simultaneously sampled and output, while the second sample / hold circuit unit S / H II has an analog input. This is one and has a structure for sequentially sampling and outputting this.

As shown in FIG. 10, the second sample / hold circuit unit S / H II includes a plurality of sample / hold circuits connected to an output of the DAC, and the sample / hold circuit is configured to output an output of a gamma voltage input from the DAC. A switch for switching on / off, a capacitor for storing the gamma voltage input via the switch, an analog buffer for outputting the gamma voltage stored in the capacitor to the digital-to-analog converter 40, and a sample start for controlling the on / off of the switch. It consists of a shift register (S / R) that delivers the signal to the next sample / hold circuit.

In the second sample / hold circuit unit S / H II, as the sample start signal is shifted through the shift register S / R, a gamma voltage input from one terminal is sequentially output.                     

FIG. 11 is a diagram illustrating a gamma reference voltage generator according to a fifth embodiment of the present invention. In particular, FIG. 11 illustrates a case in which a DAC for generating gamma reference voltages for R, G, and B is used regardless of polarity.

Referring to FIG. 11, the gamma reference voltage generator according to the fifth exemplary embodiment of the present invention includes an R gamma reference voltage generator 250 for outputting a positive / negative R gamma reference voltage, and a G / gamma of positive / negative polarity. A G gamma reference voltage generator 260 for outputting a reference voltage and a B gamma reference voltage generator 270 for outputting a positive / negative B gamma reference voltage are included.

R, G, and B gamma reference voltage generators 250, 260 with positive and negative R, G, and B digital gamma data (D _V1R to D _V18R , D _V1G to D _V18G , D _V1B to D _V18B ), respectively, in series , 270).

More specifically, the R gamma reference voltage generator 250 includes two modified second samples for sampling and outputting a DAC for analog-converting each of the red digital gamma data and a positive / negative R gamma reference voltage. And hold circuit section (S / H II ').

The modified second sample / hold circuit portion S / H II 'indicates that the final output of the internal shift register S / R becomes a sample start signal of another second sample / hold circuit portion S / H II'. Except for the second sample / hold circuit unit S / H II shown in FIG. That is, the sample start signal is input to one of the two second sample / hold circuit portions S / H II 'and the shift register S / R inside the second sample / hold circuit portions S / H II'. The final output of is the sample start signal of the other second sample / hold circuit portion S / H II ', thereby sequentially sampling the input positive and negative analog signals.

The G gamma reference voltage generator 260 performs the two modified second samples / holds described above for sampling and outputting a DAC for analog-converting each of the green digital gamma data and a positive / negative G gamma reference voltage. And a circuit section (S / H II '). Since the operation is the same as the modified second sample / hold circuit unit S / H II ′ of the R gamma reference voltage generator 250 described above, the description thereof is omitted.

The B gamma reference voltage generator 270 performs the two modified second samples / holds described above for sampling and outputting a DAC for analog-converting each of the blue digital gamma data and a positive / negative B gamma reference voltage. And a circuit section (S / H II '). Since the operation is the same as the modified second sample / hold circuit unit S / H II ′ of the R gamma reference voltage generator 250 described above, the description thereof is omitted.

12 is a diagram illustrating a gamma reference voltage generator according to a sixth embodiment of the present invention. In particular, FIG. 12 illustrates a case in which one DAC for generating a gamma reference voltage for each R, G, and B is used for each polarity.

As shown in FIG. 12, the gamma reference voltage generator according to the sixth exemplary embodiment of the present invention includes a positive gamma voltage output unit 210 for outputting a positive gamma reference voltage and a negative gamma voltage output for a negative gamma voltage output. It comprises a gamma voltage output unit 220.

The positive gamma voltage output section 210 is composed of one DAC and three modified second sample / hold circuit sections (S / H II ') as described in the fifth embodiment, so that the positive polarity input in series is made. The digital gamma data of each of R, G, and B is received and output to the digital-to-analog converter 40 which converts the digital image data into analog via the second sample / hold circuit unit S / H II '.

In this case, the DAC receives analog R, G, and B digital gamma data in series and performs analog conversion, and the second sample / hold circuit unit in which the analog R, G, and B gamma reference voltages are collectively modified. Output to H II ').

The first second sample / hold circuit unit S / H II 'selects and outputs a gamma reference voltage for red based on the sample start signal to the digital-to-analog converter 40, and the second second sample / hold circuit unit ( S / H II ') selects the gamma reference voltage for green as the sample start signal from the final output of the shift register (S / R) inside the first second sample / hold circuit section (S / H II'). Output to the converter 40, the last of the shift register (S / R) in the second second sample / hold circuit portion (S / H II ') on the third second sample / hold circuit portion (S / H II') side. The output is selected to a blue gamma reference voltage as a sample start signal and output to the digital-to-analog converter 40.

In addition, since the configuration and operation of the negative gamma voltage output unit 220 are similar to those of the positive gamma voltage output unit 210, detailed description thereof will be omitted.

According to the gamma reference voltage generator according to the sixth embodiment described above, since only two DACs can be used to generate the gamma reference voltage, the area of the data driver can be reduced by 2/3 as compared to FIG. 11.

Meanwhile, only one DAC may be used to generate gamma reference voltages for R, G, and B regardless of the polarity of the gamma reference voltage. This will be described with reference to FIG. 13.

FIG. 13 is a diagram illustrating a gamma reference voltage generator according to a seventh embodiment of the present invention. In particular, FIG. 13 illustrates a case in which only one DAC is used.

As shown in FIG. 13, the gamma reference voltage generator according to the seventh embodiment of the present invention includes three modified second samples / s as described in the sixth embodiment of processing one DAC and positive digital gamma data. Hold circuit portion S / H II 'and three modified second sample / hold circuit portions S / H II' as described in the sixth embodiment for processing negative digital gamma data.

The DAC receives analog and positive R, G, and B digital gamma data in series and converts the analog, positive, and negative R, G, and B gamma reference voltages in six batches. To the second sample / hold circuit section S / H II '.

First, the three modified second sample / hold circuit parts S / H II ′ may generate the positive R, G, and B gamma reference voltages among the positive and negative R, G, and B gamma reference voltages in the sixth embodiment. After sampling as follows, the final output of the shift register S / R inside the third second sample / hold circuit portion S / H II 'is followed by three modified second sample / hold circuit portions S / H II. ') To pass.

The next three modified second sample / hold circuits (S / H II ') use the final output of the received shift register (S / R) as the sample start signal for the positive and negative R, G, and B gamma reference voltages. The negative R, G, and B gamma reference voltages are sampled and output to the digital-analog converter 40 as in the sixth embodiment.

The detailed description of the seventh embodiment will be omitted since it can be easily understood by those skilled in the art with reference to the above embodiments and drawings.

As described above, according to the seventh exemplary embodiment of the present invention, since only one DAC can be used to generate the gamma reference voltage, the area of the data driver can be reduced by 1/2 compared to FIG. 12.

Meanwhile, as shown in FIGS. 5, 6, 8, 9, 11, 12, and 13, the time taken to change to the new gamma reference voltage is three times longer than the method of FIG. 5, and FIGS. 9 and 11. Is 9 times longer than the case of FIG. 5. In addition, the case of FIG. 13 takes 54 times as long as that of FIG.

When one DAC takes about 1 ms to generate a gamma reference voltage, FIG. 5 takes 1 ms to convert, while FIG. 13 takes 54 ms. This time is shorter than the blank period in which there is no inter-frame data of the video signal, so there will be no problem in displaying the screen.

However, if the time is also a problem, the time can be reduced by using the third sample-hold circuit unit S / H III shown in FIG. 14.

FIG. 14 is a diagram illustrating a third sample / hold circuit unit S / H III.

As shown in FIG. 14, the third sample / hold circuit unit S / H III includes a plurality of sample / hold circuits connected to an output terminal of the DAC, and the sample / hold circuit outputs a gamma voltage input from the DAC. A switch for switching on / off, a shift register (S / R) for transferring a sample start signal for controlling the on / off of the switch to the next sample / hold circuit, and capacitors (C1, C2) for charging a gamma reference voltage. The branch has an analog buffer for outputting the gamma voltage charged in the capacitors C1 and C2 of the first and second paths and the first and second paths to the digital-to-analog converter 40, between the switch and the first and second paths. An input switch connected between the first and second paths according to the selection signal, and an output switch connected between the first and second paths and the analog buffer to switch between the first and second paths according to the selection signal. Is made of.

In the third sample / hold circuit unit S / H III, as the sample start signal is shifted through the shift register S / R, a gamma voltage input from one terminal is sequentially output.

The operation of the third sample / hold circuit unit S / H III is as follows.

When the current gamma voltage is stored in the second capacitor C2, the changed gamma reference voltage is stored in the first capacitor C1 so that all of the changed gamma reference voltages correspond to the first capacitor C1. After being stored in, the changed gamma is changed in a very short time by changing the selection signal so that the modified gamma reference voltage of the first capacitor C1 is used in the driving integrated circuit.

If the gamma data is changed while maintaining this state, the new gamma voltage may be stored in the second capacitor C2 and then switched to the second capacitor C2 after the storing is completed.

The third sample / hold circuit S / H III may be used in place of the second sample / hold circuits S / H II and S / H II 'in the above-described embodiments and the embodiments to be described below. have.

In the above, various embodiments for generating a gamma reference voltage inside the data driver and reducing an area occupied by the DAC for generating the gamma reference voltage have been described.

Meanwhile, a DAC for generating a gamma reference voltage may be implemented to be spaced apart from the data driver, which will be briefly described with reference to FIGS. 15 to 20.

15 is a diagram for describing a gamma reference voltage generator according to an eighth exemplary embodiment of the present invention.

Referring to FIG. 15, the data driver includes sample / holding units 410 and 420 for sample / holding the positive and negative gamma voltages, respectively, and the sample / holding units 410 and 420 respectively. It consists of the three first sample / hold circuit portions S / HI described above. In addition, between the timing controller (not shown) and the data driver 400, a negative gamma voltage generator 310 and a negative electrode for converting digital gamma data from the timing controller into analog to generate positive and negative gamma reference voltages are provided. Polar gamma voltage generator 320 is formed.

In the eighth embodiment of the present invention, as in the conventional method, the gamma reference voltage is externally provided to the driving integrated circuit, but the positive and negative gamma voltage generators 310 and 320 are respectively positively connected through the digital interface with the timing controller. Gamma reference voltages for R, G, and B polarities are generated and transmitted to the data driver 400 sequentially.

Here, each of the positive gamma voltage generator 310 and the negative gamma voltage generator 320 consists of a multi-channel digital-to-analog converter.

In the eighth embodiment, a gamma voltage for each of R, G, and B sequentially transmitted is stored in an internal first sample / hold circuit unit S / H I to provide a modified gamma reference voltage in the data driver. The detailed operation in the eighth embodiment will be easily understood with reference to the description in the second embodiment of the present invention and with reference to FIG.

In addition, in the eighth embodiment of the present invention, each of the positive / negative gamma reference voltages generated by the positive gamma voltage generator 310 and the negative gamma voltage generator 320 is applied to all data drivers in common. The voltage difference between the data drivers can be eliminated when there is a DAC inside.

In the above description, two external multi-channel digital-to-analog converters, each polarized to output a positive gamma voltage and a negative gamma voltage, have been described.

However, the two digital-to-analog converters described above may be implemented as one regardless of polarity.

FIG. 16 is a diagram illustrating a gamma reference voltage generator according to a ninth embodiment of the present invention. In particular, FIG. 16 illustrates a case in which a multi-channel gamma reference voltage generator capable of generating a gamma reference voltage regardless of polarity is used.                     

As shown in FIG. 16, the gamma voltage generator 300 generates R, G, and B gamma reference voltages having positive and negative polarities and sequentially applies them to the data drive 400. Detailed operations of the ninth embodiment will be easily understood with reference to the description of the third embodiment of the present invention and with reference to FIG.

This reduces the number of multi-channel gamma voltage generators external to the data driver by one half, and the number of connections to the data driver by one-half, thereby reducing the area of the data driver and the data drive PCB on which the data driver is mounted. Can reduce the area.

17 is a diagram illustrating a gamma reference voltage generator according to a tenth embodiment of the present invention.

As shown in FIG. 17, the positive gamma voltage generator 310 and the negative gamma voltage generator 320 are respectively connected through a timing controller and a digital interface, respectively, from the positive and negative gamma data from the timing controller. Generate R, G, and B gamma reference voltages for polarity. The positive and negative gamma voltage generators 310 and 320 serialize the generated gamma reference voltages for each of R, G, and B and provide them to the data driver through one output, and provide a sample / holding unit included in the data driver ( 410 and 420 output the sampled gamma reference voltage to digital-to-analog converter 400. The sample / holding portions 410 and 420 each consist of three second sample / hold circuit portions S / H II.

Detailed operations of the tenth embodiment will be easily understood with reference to the description of the fourth embodiment of the present invention and with reference to FIG. 17, and thus detailed descriptions thereof will be omitted.                     

In the tenth embodiment of the present invention, the number of gamma voltage generators is increased compared to the ninth embodiment, but the number of connections with the data driver can be reduced.

18 is a diagram illustrating a gamma reference voltage generator according to an eleventh embodiment of the present invention.

As shown in FIG. 18, the gamma voltage generator 300 serializes the positive and negative gamma reference voltages for each of R, G, and B, and applies them to the data driver 400 through one output, respectively. The three sample / holding units 430, 440, and 450 provided in the driver output each of the sampled gamma reference voltages to the digital-analog converter 40.

Here, the three sample / holding units sample / hold the R sample / holding unit 430 to sample / hold the positive / negative R gamma reference voltage and output the sample / holding of the positive / negative G gamma reference voltage. And a G sample / holding unit 440, and a B sample / holding unit 450 for sample / holding and outputting a positive / negative B gamma reference voltage.

Each of the R, G, and B sample / holding portions 430, 440, and 450 includes two modified second sample / hold circuit portions S / H II ', as described above.

The detailed operation in this eleventh embodiment is easily understood with reference to the description in the fifth embodiment of the present invention and FIG. 18, and thus detailed description thereof will be omitted.

In the eleventh exemplary embodiment of the present invention, the number of gamma voltage generators can be reduced to 1/2 compared to the tenth exemplary embodiment, and the number of connected players with the data driver can be reduced to 1/2 to reduce the total to three. Of course, the gamma voltage generator must support both positive and negative polarities.

19 is a diagram illustrating a gamma reference voltage generator according to a twelfth embodiment of the present invention.

As shown in FIG. 19, the positive gamma voltage generator 310 and the negative gamma voltage generator 320 are connected through a timing controller and a digital interface, respectively, and the positive and negative signals are respectively derived from digital gamma data from the timing controller. Generate R, G, and B gamma reference voltages for polarity. Each of the positive and negative gamma voltage generators 310 and 320 serializes the generated R, G, and B gamma reference voltages and provides them to the data driver through one output. The sample / holding unit 410 provided in the data driver is provided. 420 outputs the sampled gamma reference voltage to the digital-to-analog converter 400.

These sample / holding portions 410 and 420 are each comprised of three modified second sample / hold circuit portions S / H II as described above.

Detailed operations in the twelfth embodiment will be readily apparent with reference to the description in the sixth embodiment of the present invention and FIG. 19, and thus detailed descriptions thereof will be omitted.

20 is a diagram illustrating a gamma reference voltage generator according to a thirteenth embodiment of the present invention.

As shown in FIG. 20, the gamma voltage generator 300 is connected to a timing controller through a digital interface, and generates positive and negative R, G, and B gamma reference voltages from digital gamma data from the timing controller. The gamma voltage generator 300 serializes the generated positive and negative R, G, and B gamma reference voltages and provides them to the data driver through one output. The sample / holding units 410 and 420 included in the data driver are provided. ) Outputs the sampled gamma reference voltage to the digital-to-analog converter 40.

Each of the sample / holding parts 410 and 420 is composed of three modified second sample / hold circuit parts (S / H II ′). First, the sample / holding part 410 has a positive polarity and a negative polarity R, After sampling the positive R, G, and B gamma reference voltages among the G and B gamma reference voltages, the final output of the shift register S / R in the third second sample / hold circuit part S / H II 'is measured. The sample / holding unit 420 transfers the sample / holding unit 420 to sample the negative R, G, and B gamma reference voltages.

The detailed operation of the thirteenth embodiment will be easily understood with reference to the description of the seventh embodiment of the present invention and with reference to FIG.

While the above has been described with reference to preferred embodiments of the present invention, those skilled in the art will be able to variously modify and change the present invention without departing from the spirit and scope of the invention as set forth in the claims below. It will be appreciated.

As described above, according to the present invention, since the data driver may have gamma voltages of R, G, and B using gamma reference voltages of R, G, and B, color temperatures, color coordinates, and the like may be adjusted as desired.

In addition, by adjusting the color temperature or the color coordinates, it is possible to implement a variety of colors represented by the characteristics of the liquid crystal or the color filter.                     

In addition, since the digital gamma value is received from the timing controller, a new gamma can be applied for each frame, so that a dynamic screen can be obtained by increasing the dynamic luminance ratio in the video. Of course, when the driving integrated circuit is applied, the timing controller may also be changed. In other words, it is preferable to transmit the gamma values of R, G, and B in digital form to the data driver when the power is turned on.In addition, if the user wants to see a dynamic screen, the gamma value is analyzed by analyzing the data of the input screen. It is desirable to send a gamma value so that it can

Claims (27)

A timing controller for outputting digital gamma data for each of R, G, and B, and A digital gamma storage unit for storing the digital gamma data from the timing controller, and independently generating gamma reference voltages used for converting image data into analog voltages for each of R, G, and B based on the stored digital gamma data A data driver including a gamma reference voltage generator and a digital-analog converter for converting image data of R, G, and B into analog voltages based on the generated gamma reference voltage Liquid crystal display comprising a. The method of claim 1, The gamma reference voltage generator includes a plurality of DACs each receiving the digital gamma data for each of the R, G, and B signals and performing analog conversion. The method of claim 1, The gamma reference voltage generator A first polarity gamma reference voltage output unit configured to analog convert digital gamma data of a first polarity sequentially input for each of R, G, and B to generate gamma reference voltages of R, G, and B of the first polarity; and A second polarity gamma reference voltage output unit configured to generate digital gamma reference voltages of R, G, and B of the second polarity by analog-converting digital gamma data of the second polarity sequentially inputted for each of R, G, and B. Liquid crystal display comprising a. The method of claim 3, The first polarity gamma reference voltage output unit A plurality of DACs for generating and outputting a gamma reference voltage by analog-converting the digital gamma data of the first polarity sequentially input for each of R, G, and B, and A sample / holding unit having a first polarity that outputs the sampled R, G, and B gamma reference voltages by sample / holding each of the analog-converted R, G, and B gamma reference voltages. Including; The second polarity gamma reference voltage output unit A plurality of DACs for generating and outputting a gamma reference voltage by analog-converting the digital gamma data of the second polarity sequentially input for each of R, G, and B, and A sample / holding unit having a second polarity that outputs the sampled R, G, and B gamma reference voltages by sample / holding each of the analog-converted R, G, and B gamma reference voltages. Liquid crystal display comprising a. The method of claim 1, The gamma reference voltage generator A plurality of DACs sequentially receiving the digital gamma voltage data of the first and second polarities for each of R, G, and B, and converting the digital gamma voltage data into analog voltages and outputting the analog voltages; A sample / holding unit having a first polarity that outputs the sampled R, G, and B gamma reference voltages by sample / holding the gamma reference voltages of the analog polarity-converted first polarities of the R, G, and B polarities. , And A sample / holding unit having a second polarity that outputs the sampled R, G and B gamma reference voltages by sample / holding the gamma reference voltages of the analog polarity-converted second polarities R, G, and B respectively. Liquid crystal display comprising a. The method according to claim 4 or 5, Each of the first and second polarity sample / holding portions includes three sample / hold circuit portions provided for each of R, G, and B. The sample / hold circuit unit includes a plurality of sample / hold circuits respectively connected to output terminals of the plurality of DACs. The sample / hold circuit A switch for controlling the output of the gamma reference voltage on / off in response to a predetermined sample start signal, A capacitor for storing the gamma reference voltage input via the switch, and A buffer for outputting a sampled gamma reference voltage stored in the capacitor Liquid crystal display comprising a. The method of claim 1, The gamma reference voltage generator It receives serialized digital gamma data of the first and second polarity for each of R, G, and B, and sequentially outputs the gamma reference voltage generated by analog conversion through one output line, respectively, wherein R, Multiple DACs of many-to-one method which are provided for each G and B, and Each sample corresponds to the plurality of DACs, and samples / holds the gamma reference voltages sequentially output from the DAC, and then outputs sampled gamma reference voltages of R, G, and B, respectively. Circuit Liquid crystal display comprising a. The method of claim 1, The gamma reference voltage generator, R gamma that sequentially receives the serialized R gamma data of the first polarity and the serialized R gamma data of the second polarity and samples / holds the gamma reference voltage generated by analog conversion, and then outputs the sampled R gamma reference voltage. Reference voltage output, G-gamma reference voltage outputting sampled G-gamma reference voltage after sample / holding the gamma reference voltage generated by analog conversion by receiving serial G-gamma data of first polarity and serial G-gamma data of second polarity sequentially Output, and B gamma reference voltage that sequentially receives the series B gamma data of the first polarity and the series B gamma data of the second polarity and samples / holds the gamma reference voltage generated by analog conversion, and then outputs the sampled B gamma reference voltage. Output Liquid crystal display comprising a. The method of claim 8, Each of the R, G, and B gamma reference voltage output units A multi-to-one DAC that sequentially receives serial digital gamma data of the first and second polarities corresponding to each other and performs analog conversion and outputs the serial digital gamma data; A sample / hold circuit unit having a first polarity which sequentially samples / holds the gamma reference voltage of the first polarity output from the DAC, and outputs the result; After the sample / hold processing is completed in the sample / hold circuit of the first polarity, the sample start signal is received from the sample / hold circuit of the first polarity, and the gamma reference voltage of the second polarity output from the DAC is sequentially sampled. Sample / hold circuit section of second polarity Liquid crystal display comprising a. The method of claim 1, The gamma reference voltage generator A first polarity gamma reference that sequentially receives serialized gamma data of a first polarity and samples / holds a gamma reference voltage generated by analog conversion, and then outputs R, G, and B gamma reference voltages of the sampled first polarity. Voltage output, and The second polarity gamma reference voltage which sequentially receives the series gamma data of the second polarity and samples / holds the gamma reference voltage generated by analog conversion and outputs the R, G, and B gamma reference voltages of the sampled second polarity. Output Liquid crystal display comprising a. The method of claim 10, Each of the first and second polar gamma reference voltage output units A multi-to-one DAC that sequentially receives the serialized digital gamma data and outputs a gamma reference voltage generated by analog conversion through one line, and A sample / holding unit configured to sequentially sample / hold the gamma reference voltage output from the DAC for each of R, G, and B; Including; The sample / holding unit includes three sample / hold circuits corresponding to each of R, G, and B, and any one sample / hold circuit starts a sample / holding process by a sample start signal and the one sample / holding unit After the sample / hold processing of the hold circuit part is completed, the sample start signal is transferred to another sample / hold circuit part. Liquid crystal display. The method of claim 1, The gamma reference voltage generator A multi-to-one DAC that sequentially receives serialized digital gamma data and outputs the gamma reference voltage generated by analog conversion through one line. A sample / holding unit having a first polarity which sequentially samples / holds an analog gamma reference voltage having a first polarity among the analog gamma reference voltages output from the DAC and outputs the R, G, and B signals for each of R, G, and B; After the sample / hold processing is completed in the sample / hold circuit of the first polarity, the sample start signal is received from the sample / hold circuit of the first polarity, and the analog gamma reference of the second polarity among the analog gamma reference voltages output from the DAC. Sample / holding unit having a second polarity to sequentially sample / hold the voltage and output each of R, G, and B Liquid crystal display comprising a. The method of claim 12, Each of the first and second polarity sample / holding portions includes three sample / hold circuit portions corresponding to each of R, G, and B, and any one sample / hold circuit is added to the sample start signal by a sample start signal. And starting the sample / holding circuit part after the sample / holding process is completed, transferring the sample start signal to another sample / hold circuit part. The method according to any one of claims 7, 9, 11 and 13, The sample / hold circuit portion includes a plurality of sample / hold circuits connected in parallel to the output of the DAC, The sample / hold circuit A shift register for transferring a sample start signal to adjacent sample / hold circuits, A switch for controlling on / off an output of a gamma reference voltage in response to the sample start signal; A capacitor for storing a gamma reference voltage input via the switch, and A buffer for outputting a sampled gamma reference voltage stored in the capacitor Liquid crystal display comprising a. The method according to any one of claims 7, 9, 11 and 13, The sample / hold circuit portion includes a plurality of sample / hold circuits connected in parallel to the output of the DAC, The sample / hold circuit A shift register for transferring a sample start signal to adjacent sample / hold circuits, A switch for controlling on / off an output of a gamma reference voltage in response to the sample start signal; First and second capacitors storing the gamma reference voltage; An input switch connected to the switch and transferring the gamma reference voltage passed through the switch to the first or second capacitor in response to a selection signal from an external device; A buffer for outputting a gamma reference voltage stored in the first or second capacitor, and An output switch connected to the first and second capacitors and transferring a gamma reference voltage stored in the first or second capacitor to the buffer in response to the selection signal Liquid crystal display comprising a. A timing controller for outputting digital gamma data for R, G, and B, A gamma reference voltage generator configured to convert the digital gamma data from the timing controller into an analog to generate a gamma reference voltage; and A sample / holding unit which outputs a sampled gamma reference voltage after sample / holding the gamma reference voltage from the gamma reference voltage generator, and images of R, G, and B based on the sampled gamma reference voltage Data driver includes a digital-to-analog converter that converts data into analog voltages for output Liquid crystal display comprising a. The method of claim 16, The gamma reference voltage generator includes a gamma reference voltage generator of first and second polarities sequentially outputting gamma reference voltages of the first and second polarities for each of R, G, and B through a plurality of output terminals. The sample / holding part A sample / holding unit having a first polarity which outputs the gamma reference voltages of R, G, and B sampled first polarities to the digital-to-analog converter by sample / holding the gamma reference voltage of the first polarity; A sample / holding unit of a second polarity that outputs the gamma reference voltages of R, G, and B samples of the second polarity sampled to the digital-analog converter by sample / holding the gamma reference voltage of the second polarity. Liquid crystal display comprising a. The method of claim 16, The gamma reference voltage generator sequentially outputs a gamma reference voltage of a first polarity and a gamma reference voltage of a second polarity for each of R, G, and B through a plurality of output terminals. The sample / holding part A first polarity for sampling / holding the gamma reference voltage of the first polarity from the gamma reference voltage generator and outputting the sampled gamma reference voltage of the first polarity to the digital-to-analog converter; Sample / holding part, and The gamma reference voltage of the second polarity from the gamma reference voltage generator is sampled / holded to output the R, G and B sampled gamma reference voltages of the second polarity to the digital-to-analog converter. Sample / Holding Part Liquid crystal display comprising a. The method of claim 17 or 18, Each of the first and second polarity sample / holding portions includes three sample / hold circuit portions provided for each of R, G, and B. The sample / hold circuit part includes a plurality of sample / hold circuits respectively connected to a plurality of output terminals of the gamma reference generator. The sample / hold circuit A switch for controlling the output of the gamma reference voltage on / off in response to a predetermined sample start signal, A capacitor for storing the gamma reference voltage input via the switch, and A buffer for outputting a sampled gamma reference voltage stored in the capacitor Liquid crystal display comprising a. The method of claim 16, The gamma reference voltage generator A gamma reference voltage generator of a first polarity which serializes a gamma reference voltage of a first polarity for each of R, G, and B and outputs one output terminal through each of R, G, and B, and A gamma reference voltage generator of a second polarity, which serializes the gamma reference voltage of the second polarity for each of R, G, and B, and outputs one output terminal through each of R, G, and B output terminals. Including; The sample / holding part A first polarity that samples / holds each of the serialized R, G, and B gamma reference voltages to output the R, G, and B gamma reference voltages of the sampled first polarity to the digital-analog converter; Sample / holding part, and A second polarity configured to sample / hold each of the serialized R, G, and B gamma reference voltages to output the R, G, and B gamma reference voltages of the sampled second polarity to the digital-analog converter; Sample / holding part Including; And each of the sample / holding units having the first and second polarities includes three sample / hold circuits that sample / hold the R, G, and B gamma reference voltages, respectively. The method of claim 16, The gamma reference voltage generator serializes gamma reference voltages of the first and second polarities for each of R, G, and B, and outputs them through one output terminal of R, G, and B. The sample / holding unit samples / holds each of the serialized R, G, and B gamma reference voltages, and transmits the R, G, and B gamma reference voltages of each of the sampled first and second polarities to the digital-analog converter. R, G, B sample / holding unit to output, Each of the R, G, and B sample / holding portions A sample / hold circuit unit of a first polarity which sequentially samples / holds the gamma reference voltage of the first polarity and outputs the result; After the sample / holding process is completed in the sample / hold circuit of the first polarity, the sample start signal is received from the sample / hold circuit of the first polarity, and the sample / holding process of the second polarity is sequentially performed. Sample / Hold Circuit Part of Second Polarity Liquid crystal display comprising a. The method of claim 16, The gamma reference voltage generator A gamma reference voltage generator of a first polarity for serializing and outputting the R, G, and B gamma reference voltages of a first polarity through one output terminal, and A gamma reference voltage generator of a second polarity which serializes the R, G, and B gamma reference voltages of the second polarity and outputs them through one output terminal Including; The sample / holding part The first polarity of the R, G, and B gamma reference voltages of the serialized first polarity is sampled and held to output the R, G, and B gamma reference voltages of the sampled first polarity to the digital-analog converter. Sample / holding section, and A second polarity outputting the gamma reference voltages of the R, G, and B samples of the second polarized sample to the digital-to-analog converter by sample / holding the R, G, and B gamma reference voltages of the serialized second polarity Sample / Holding Part Including; Each of the first and second polarity sample / holding portions includes three sample / hold circuit portions corresponding to R, G, and B, respectively, and any one sample / hold circuit portion is subjected to a sample / holding process by a sample start signal. And starting the sample / holding circuit part after the sample / holding process is completed, transferring the sample start signal to another sample / hold circuit part. The method of claim 16, The gamma reference voltage generator serializes the R, G, and B gamma reference voltages of the first and second polarities, and outputs them through one output terminal. The sample / holding part The R, G, and B gamma reference voltages of the first polarity are sequentially sampled and held, and the gamma reference voltages of the R, G, and B sampled first polarities are sequentially sampled. A sample / holding portion of an output first polarity, and A sample start signal is received from the sample / holding unit of the first polarity after the sample / holding process is completed in the sample / holding unit of the first polarity, and a second polarity of the gamma reference voltages of the serialized first and second polarities is received. A sample / holding unit having a second polarity which sequentially outputs the gamma reference voltages of the sampled second polarities by sequentially sample / holding the R, G, and B gamma reference voltages Including; Each of the first and second polarity sample / holding portions includes three sample / hold circuit portions corresponding to R, G, and B, respectively, and any one sample / hold circuit portion is subjected to a sample / holding process by a sample start signal. And starting the sample / holding circuit part after the sample / holding process is completed, transferring the sample start signal to another sample / hold circuit part. The method according to any one of claims 20 to 23, wherein The sample / hold circuit unit includes a plurality of sample / hold circuits connected in parallel to one output terminal to the gamma reference voltage generator, The sample / hold circuit A shift register for transferring a sample start signal to adjacent sample / hold circuits, A switch for controlling on / off an output of a gamma reference voltage in response to the sample start signal; A capacitor for storing a gamma reference voltage input via said switch, and A buffer for outputting a sampled gamma reference voltage stored in the capacitor Liquid crystal display comprising a. The method according to any one of claims 20 to 23, wherein The sample / hold circuit unit includes a plurality of sample / hold circuits connected in parallel to one output terminal to the gamma reference voltage generator, The sample / hold circuit A shift register for transferring a sample start signal to adjacent sample / hold circuits, A switch for controlling on / off an output of a gamma reference voltage in response to the sample start signal; First and second capacitors storing the gamma reference voltage; An input switch connected to the switch and transferring the gamma reference voltage passed through the switch to the first or second capacitor in response to a selection signal from an external device; A buffer for outputting a gamma reference voltage stored in the first or second capacitor, and An output switch connected to the first and second capacitors and transferring a gamma reference voltage stored in the first or second capacitor to the buffer in response to the selection signal Liquid crystal display comprising a. A data drive for outputting a data voltage for displaying an image of a liquid crystal display device, Digital gamma storage unit for storing digital gamma data from the outside, A gamma reference voltage generator for independently generating a gamma reference voltage for each of R, G, and B based on the stored digital gamma data, and converting the image data into an analog voltage; and A digital-to-analog converter for converting image data of R, G, and B into analog voltages based on the generated gamma reference voltage Data driver including. A data drive for outputting a data voltage for displaying an image of a liquid crystal display device, A sample / holding unit which outputs a sampled gamma reference voltage after sample / holding an externally generated gamma reference voltage; and And a digital-to-analog converter configured to convert image data of each of R, G, and B into analog voltages based on the sampled gamma reference voltage.

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