KR100842904B1 - Device Separating Method of Semiconductor Device - Google Patents

Abstract

The present invention discloses a method for forming a device isolation film of a semiconductor device. The disclosed method includes forming a hard mask film on a semiconductor substrate, sequentially etching the hard mask film and the semiconductor substrate to form a trench, forming a sidewall oxide film on the trench surface, Performing a high density plasma process for generating a plasma with a gas selected from the group consisting of He, O2, NF3, Ar, and N2 to the semiconductor substrate on which the sidewall oxide film is formed; and the sidewall on which the high density plasma process is performed Forming an O3-TEOS film to fill the trench including an oxide film; CMP the O3-TEOS film until the hard mask film is exposed; and removing the hard mask film.

Description

Method for forming isolation layer of semiconductor device

1A and 1B are cross-sectional views illustrating processes of forming a device isolation film of a conventional semiconductor device.

2A to 2E are cross-sectional views of processes for describing a method of forming a device isolation film of a semiconductor device according to the present invention.

Explanation of symbols on the main parts of the drawings

21: semiconductor substrate 22: pad oxide film

23: pad nitride film 24: trench

25: sidewall oxide film 26: linear nitride film

27: linear oxide film 28: O3-TEOS film

28a: device isolation film

The present invention relates to a method of forming a device isolation film of a semiconductor device, and more particularly, to a method of forming a device isolation film using a shallow trench isolation (STI) process.

With the advance of semiconductor technology, the speed and the high integration of a semiconductor element are progressing rapidly, and with this, the demand for refinement | miniaturization of a pattern and high precision of a pattern dimension is increasing. This requirement also applies to device isolation films. This is because the width of the device region must be relatively reduced in the trend that the width of the device region is decreasing.

Here, a conventional device isolation film has been formed by a LOCOS process, and the device isolation film by the LOCOS process, as is well known, has a bird's-beak having a beak shape at its edge portion. Since it is generated, there is a disadvantage in that a leakage current is generated while increasing the area of the device isolation layer.

Therefore, a device isolation film formation method using an STI process having a small width and excellent device isolation characteristics has been proposed in place of the device isolation film by the LOCOS process. Currently, most semiconductor devices form a device isolation film by applying an STI process. have.

Here, a method of forming a device isolation film that is currently performed will be briefly described with reference to FIGS. 1A and 1B.

Referring to FIG. 1A, after a semiconductor substrate having a cell region and a peripheral region is provided, a pad oxide film 2 and a pad nitride film 3 are sequentially formed on the silicon substrate 1 in the cell region of the substrate. The pad nitride film 3 is etched to expose the substrate portion corresponding to the device isolation region, and then the pad oxide film 2 and the exposed silicon substrate portion are etched to form a trench 4 in the cell region. .

Referring to FIG. 1B, a sacrificial oxidation process is performed on the resultant to recover etch damage during etching for forming the trench, thereby forming a thermal oxide film 5 on the surface of the trench. . Subsequently, an O3-TEOS film 6 is thickly deposited on the substrate resultant through CVD (Chemical Vapor Deposition) process to completely fill the trench 4.

Thereafter, although not shown, the O3-TEOS film 6 is planarized by CMP (Chemical Mechanical Polishing) so that the pad nitride film 3 is exposed, and then the pad nitride film and the pad oxide film are sequentially removed by wet etching to form an element isolation film. (6a) is formed.

As described above, according to the conventional method of forming an isolation layer using the STI process, the trench filling process is performed by the O3-TEOS process. However, the O3-TEOS process shows a severe deviation depending on the properties of the lower layer. In particular, since the growth rate is very slow on the thermal oxide film, voids are generated in the trench due to the difference in growth rate from the fast growing pad nitride film, thereby reducing the buried characteristics of the trench.

On the other hand, in order to solve this problem, a low concentration of O3-TEOS and a high concentration of O3-TEOS in the trench is proceeding in a method of depositing in two steps. By depositing the low concentration of O3-TEOS in the trench first, it can have a uniform growth rate regardless of the properties of the underlying film.

However, as the high integration gradually increases, the width of the trench is further reduced. Accordingly, in the trend of increasing the aspect ratio, there is a limit to the filling of fine trenches. There is already a problem that the inlet of the trench is clogged, there is a lot of difficulties when depositing a high concentration of O3-TEOS film. Therefore, the two-step O3-TEOS process also has a slight improvement in landfill capability.

Accordingly, an object of the present invention is to provide a method for forming a device isolation layer of a semiconductor device capable of improving trench embedding characteristics during an O3-TEOS process.

In order to achieve the above object, the present invention, forming a hard mask film on a semiconductor substrate; Sequentially etching the hard mask layer and the semiconductor substrate to form a trench; Forming a sidewall oxide film on the trench surface; Performing a high density plasma process on the semiconductor substrate on which the sidewall oxide film is formed, generating plasma with a gas selected from the group consisting of He, O 2, NF 3, Ar, and N 2; Forming an O3-TEOS film to fill the trench including the sidewall oxide film subjected to the high density plasma process; CMPing the O3-TEOS film until the hard mask film is exposed; And removing the hard mask layer.

Here, the hard mask film is characterized in that the pad oxide film and the pad nitride film.

After forming the sidewall oxide film, and before performing the high density plasma process,

And sequentially forming a linear nitride film and a linear oxide film on the entire surface of the substrate.

The high density plasma process may be performed by exposing the generated plasma to the semiconductor substrate for 5 to 200 seconds.
The high density plasma process is characterized in that the RF power is set to 100 ~ 10000kHz, the bias power is carried out under the conditions of 100 ~ 10000kHz.

The O3-TEOS film is characterized in that the flow rate of TEOS is set to 100 to 5000 mgm, and the flow rate of O3 having a volume concentration of 10 to 30% is set to 1 to 20 slm.

(Example)

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2A to 2E are cross-sectional views of processes for describing a method of forming a device isolation film of a semiconductor device according to the present invention.

Referring to FIG. 2A, a hard mask layer is formed on the semiconductor substrate 21 as an etch barrier for forming a trench for device isolation. The hard mask layer may include a pad oxide layer 22 and a pad nitride layer 23. Thereafter, the pad nitride layer 23 is etched to expose a portion corresponding to the device isolation region of the semiconductor substrate, and then the pad oxide layer 22 and the exposed portion of the semiconductor substrate are subsequently etched to form the trench 24. do.

Referring to FIG. 2B, a sidewall oxide layer 25 is formed on the surface of the trench 24 to recover etch damage during etching for forming the trench. Then, a linear nitride film 26 having a thickness of 20 to 100 GPa and a linear oxide film 27 having a thickness of 20 to 200 GPa are sequentially deposited on the entire surface of the substrate through a low pressure chemical vapor deposition (LPCVD) process.

Referring to FIG. 2C, a lower film (linear oxide film, linear nitride film, sidewall oxide film: 27, 26, 25) formed in the trench by performing a high density plasma process on the semiconductor substrate on which the linear oxide film 27 is formed. ) Is exposed to a high density plasma. Here, the high-density plasma process is performed by generating a plasma with a gas of any one of He, O2, NF3, Ar, and N2, and then exposing the semiconductor substrate for 5 to 200 seconds. In addition, the high-density plasma process may be performed under the condition that the RF power is set to 100 to 10000 kHz and the bias power is set to 100 to 10000 kHz.

Here, the present invention performs a high-density plasma process using a gas of any one of He, O2, NF3, Ar, and N2 as a pretreatment before the process of depositing the O3-TEOS film, thereby depositing the O3-TEOS film in the trench without generation of voids. It can be done easily.

That is, by performing a high-density plasma process using any one of He, O2, NF3, Ar, and N2, the lower layer formed on the trench, that is, the lower layer formed of the sidewall oxide film, the linear nitride film, and the linear oxide film, is exposed. The potential of the film surface becomes the same. In other words, high density plasma is a very suitable way to reach the narrow trench bottom to match the surface because the movement of ions is oriented perpendicular to the substrate. Therefore, the growth rate variation may be reduced when the O3-TEOS film is deposited in the trench for subsequent device isolation film formation, and thus may be easily performed without voids.

Referring to FIG. 2D, a high concentration of O3-TEOS film 28 is deposited on the high density plasma-treated linear oxide film 27 to fill the trench 24 including the lower films 25, 26, and 27. Here, the O3-TEOS film 28 is carried out at a flow rate of TEOS of 100 to 5000 mgm (miligram per min) and at a flow rate of O3 having a volume concentration of 10 to 30% at 1 to 20 slm.

Referring to FIG. 2E, after the CMP process is performed on the O3-TEOS layer 28 until the pad nitride layer 23 is exposed, the pad nitride layer and the pad oxide layer are removed to remove the device isolation layer of the semiconductor device according to the present invention. Complete (28a).

As described above, the present invention is a high density using a gas of any one of He, O2, NF3, Ar, and N2 in the lower layer formed of the sidewall oxide film 25, the linear nitride film 26, and the linear oxide film 27 formed in the trench. By performing the plasma process, the potential of the exposed lower layer surface is the same to achieve uniformity of the film, and the deposition rate is accelerated on the lower layers 25, 26, and 27 during the subsequent deposition of the O3-TEOS film 28 to form a trench. The O3-TEOS film can be easily deposited on.

Therefore, the present invention can be expected to improve the yield of the device by having the improved trench filling characteristics required for the gradually increasing aspect ratio of the trench.

As described above, according to the present invention, by performing a high-density plasma process on the lower layer formed on the trench surface, the growth rate is uniform on the lower layer when the O3-TEOS film is deposited, and the deposition rate is fast, so that the filling of the trench can be easily performed. have. As a result, the effect of improving the buried characteristics of the trenches is generated, which can be expected to improve the yield of the device.

Hereinbefore, the present invention has been illustrated and described with reference to specific embodiments, but the present invention is not limited thereto, and the scope of the following claims is not limited to the spirit and scope of the present invention. It will be readily apparent to those skilled in the art that various modifications and variations can be made.

Claims (6)

Forming a hard mask film on the semiconductor substrate; Sequentially etching the hard mask layer and the semiconductor substrate to form a trench; Forming a sidewall oxide film on the trench surface; Performing a high density plasma process on the semiconductor substrate on which the sidewall oxide film is formed, generating plasma with a gas selected from the group consisting of He, O 2, NF 3, Ar, and N 2; Forming an O3-TEOS film to fill the trench including the sidewall oxide film subjected to the high density plasma process; CMPing the O3-TEOS film until the hard mask film is exposed; And Removing the hard mask film; and forming a device isolation film for the semiconductor device. The method of claim 1, wherein the hard mask layer comprises a pad oxide layer and a pad nitride layer. The method of claim 1, after the forming of the sidewall oxide layer and before the performing of the high density plasma process, And sequentially forming a linear nitride film and a linear oxide film on the entire surface of the substrate. The method of claim 1, wherein the high density plasma process is performed by exposing the generated plasma to the semiconductor substrate for 5 to 200 seconds. The method of claim 1, wherein the high-density plasma process is performed under conditions in which RF power is set to 100 to 10000 kHz and bias power is set to 100 to 10000 kHz. The device isolation film according to claim 1, wherein the O3-TEOS film is formed at a flow rate of TEOS of 100 to 5000 mgm and a flow rate of O3 having a volume concentration of 10 to 30% at 1 to 20 slm. Formation method.

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