KR100623232B1 - 평판표시장치 및 그의 제조방법 - Google Patents
평판표시장치 및 그의 제조방법 Download PDFInfo
- Publication number
- KR100623232B1 KR100623232B1 KR1020030087793A KR20030087793A KR100623232B1 KR 100623232 B1 KR100623232 B1 KR 100623232B1 KR 1020030087793 A KR1020030087793 A KR 1020030087793A KR 20030087793 A KR20030087793 A KR 20030087793A KR 100623232 B1 KR100623232 B1 KR 100623232B1
- Authority
- KR
- South Korea
- Prior art keywords
- gate line
- gate
- ions
- gate electrode
- photoresist pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- 238000004519 manufacturing process Methods 0.000 title description 7
- 150000002500 ions Chemical class 0.000 claims abstract description 55
- 238000000034 method Methods 0.000 claims abstract description 15
- 239000000758 substrate Substances 0.000 claims abstract description 14
- 229920002120 photoresistant polymer Polymers 0.000 claims description 31
- 229910000838 Al alloy Inorganic materials 0.000 claims description 6
- 229910001182 Mo alloy Inorganic materials 0.000 claims description 6
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 3
- 229910001080 W alloy Inorganic materials 0.000 claims description 3
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- 238000005530 etching Methods 0.000 claims description 3
- 229910052750 molybdenum Inorganic materials 0.000 claims description 3
- 239000011733 molybdenum Substances 0.000 claims description 3
- MGRWKWACZDFZJT-UHFFFAOYSA-N molybdenum tungsten Chemical compound [Mo].[W] MGRWKWACZDFZJT-UHFFFAOYSA-N 0.000 claims description 3
- 229910052751 metal Inorganic materials 0.000 claims description 2
- 239000002184 metal Substances 0.000 claims description 2
- 239000010410 layer Substances 0.000 description 52
- 239000010409 thin film Substances 0.000 description 18
- 239000011159 matrix material Substances 0.000 description 9
- 239000010408 film Substances 0.000 description 8
- 239000004065 semiconductor Substances 0.000 description 8
- 239000011229 interlayer Substances 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000003491 array Methods 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- -1 hydrogen ions Chemical class 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/441—Interconnections, e.g. scanning lines
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Electroluminescent Light Sources (AREA)
- Thin Film Transistor (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
Description
Claims (10)
- 기판;상기 기판 상에 일방향으로 위치하며, 게이트 전극과 면저항의 차이를 갖도록 이온이 도핑된 게이트라인; 및상기 게이트라인과 전기적으로 연결되는 게이트 전극을 포함하는 것을 특징으로 하는 평판표시장치.
- 제 1 항에 있어서,상기 게이트라인은 상기 게이트 전극의 면저항 대비 85 내지 91%의 면저항을 갖는 것을 특징으로 하는 평판표시장치.
- 삭제
- 제 1 항에 있어서,상기 게이트라인 및 상기 게이트전극은 알루미늄(Al), 알루미늄 합금(Al alloy), 몰리브덴(Mo) 및 몰리브덴 합금(Mo alloy)으로 이루어진 군에서 선택되는 하나의 금속으로 이루어진 것을 특징으로 하는 평판표시장치.
- 제 4 항에 있어서,상기 게이트라인 및 상기 게이트전극은 몰리브덴-텅스텐 합금(MoW)으로 이루어진 것을 특징으로 하는 평판표시장치.
- 제 1 항에 있어서,상기 게이트라인 및 상기 게이트전극은 150 내지 400 nm의 두께를 갖는 것을 특징으로 하는 평판표시장치.
- 배선 영역 및 제 1 영역을 갖는 기판을 제공하고;상기 제 1 영역 상에 제 1 활성층을 형성하고;상기 제 1 활성층을 포함한 기판 전면에 게이트 절연막 및 전도성막을 차례로 적층하고;상기 전도성막 상에 상기 배선영역을 덮고, 상기 1 활성층의 양측 단부를 제외한 부분을 덮는 제 1 포토레지스트 패턴을 형성하고;상기 제 1 포토레지스트 패턴을 마스크로 하여 상기 전도성막을 식각함으로써, 상기 배선영역에 게이트라인을 형성함과 동시에 상기 제 1 영역에 제 1 게이트전극을 형성하고;상기 제 1 포토레지스트 패턴 및 상기 제 1 게이트 전극을 마스크로 하여 상기 제 1 활성층의 양측 단부에 이온 샤워링을 사용하여 제 1 이온을 도핑하고;상기 제 1 포토레지스트 패턴을 제거하고;상기 제 1 이온이 도핑된 제 1 활성층 전체를 덮고, 상기 게이트라인을 노출 시키는 제 2 포토레지스트 패턴을 형성하고;상기 제 2 포토레지스트 패턴을 마스크로 하여 상기 게이트라인에 제 2 이온을 도핑하는 것을 포함하는 것을 특징으로 하는 평판표시장치의 제조방법.
- 제 7 항에 있어서,상기 제 1 이온과 상기 제 2 이온은 서로 다른 형(type)인 것을 특징으로 하는 평판표시장치의 제조방법.
- 제 7 항에 있어서,상기 제 1 및 제 2 포토레지스트 패턴은 5000Å이상의 두께를 갖도록 형성하는 것을 특징으로 하는 평판표시장치의 제조방법.
- 제 7 항에 있어서,상기 제 1 이온은 3.0E15 내지 5.0E15 ions/㎠으로 주입하는 것을 특징으로 하는 평판표시장치의 제조방법.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020030087793A KR100623232B1 (ko) | 2003-11-29 | 2003-11-29 | 평판표시장치 및 그의 제조방법 |
US10/995,147 US7268405B2 (en) | 2003-11-29 | 2004-11-24 | Flat panel display and method of fabricating the same |
CNB2004100471951A CN100365674C (zh) | 2003-11-29 | 2004-11-29 | 平板显示器和制造该平板显示器的方法 |
US11/832,099 US7402468B2 (en) | 2003-11-29 | 2007-08-01 | Flat panel display and method of fabricating the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020030087793A KR100623232B1 (ko) | 2003-11-29 | 2003-11-29 | 평판표시장치 및 그의 제조방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20050052305A KR20050052305A (ko) | 2005-06-02 |
KR100623232B1 true KR100623232B1 (ko) | 2006-09-18 |
Family
ID=34617437
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020030087793A Expired - Fee Related KR100623232B1 (ko) | 2003-11-29 | 2003-11-29 | 평판표시장치 및 그의 제조방법 |
Country Status (3)
Country | Link |
---|---|
US (2) | US7268405B2 (ko) |
KR (1) | KR100623232B1 (ko) |
CN (1) | CN100365674C (ko) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20030086166A (ko) * | 2002-05-03 | 2003-11-07 | 엘지.필립스 엘시디 주식회사 | 유기전계 발광소자와 그 제조방법 |
KR100623232B1 (ko) * | 2003-11-29 | 2006-09-18 | 삼성에스디아이 주식회사 | 평판표시장치 및 그의 제조방법 |
JP4746332B2 (ja) * | 2005-03-10 | 2011-08-10 | Okiセミコンダクタ株式会社 | 半導体装置の製造方法 |
KR100708687B1 (ko) * | 2005-06-04 | 2007-04-17 | 삼성에스디아이 주식회사 | 유기전계 발광소자 및 그의 제조방법 |
KR100708689B1 (ko) * | 2005-06-04 | 2007-04-17 | 삼성에스디아이 주식회사 | 유기전계 발광소자 |
TWI545652B (zh) | 2011-03-25 | 2016-08-11 | 半導體能源研究所股份有限公司 | 半導體裝置及其製造方法 |
US9219159B2 (en) | 2011-03-25 | 2015-12-22 | Semiconductor Energy Laboratory Co., Ltd. | Method for forming oxide semiconductor film and method for manufacturing semiconductor device |
US9012904B2 (en) * | 2011-03-25 | 2015-04-21 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
US8704232B2 (en) | 2012-06-12 | 2014-04-22 | Apple Inc. | Thin film transistor with increased doping regions |
US9065077B2 (en) | 2012-06-15 | 2015-06-23 | Apple, Inc. | Back channel etch metal-oxide thin film transistor and process |
US9685557B2 (en) | 2012-08-31 | 2017-06-20 | Apple Inc. | Different lightly doped drain length control for self-align light drain doping process |
US8987027B2 (en) | 2012-08-31 | 2015-03-24 | Apple Inc. | Two doping regions in lightly doped drain for thin film transistors and associated doping processes |
US8748320B2 (en) | 2012-09-27 | 2014-06-10 | Apple Inc. | Connection to first metal layer in thin film transistor process |
US8999771B2 (en) | 2012-09-28 | 2015-04-07 | Apple Inc. | Protection layer for halftone process of third metal |
US9201276B2 (en) | 2012-10-17 | 2015-12-01 | Apple Inc. | Process architecture for color filter array in active matrix liquid crystal display |
US9001297B2 (en) | 2013-01-29 | 2015-04-07 | Apple Inc. | Third metal layer for thin film transistor with reduced defects in liquid crystal display |
US9088003B2 (en) | 2013-03-06 | 2015-07-21 | Apple Inc. | Reducing sheet resistance for common electrode in top emission organic light emitting diode display |
CN107818948B (zh) * | 2017-10-31 | 2020-04-17 | 京东方科技集团股份有限公司 | 一种阵列基板的制备方法 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0658965B2 (ja) * | 1983-08-30 | 1994-08-03 | 株式会社東芝 | 半導体装置の製造方法 |
KR100209620B1 (ko) | 1996-08-31 | 1999-07-15 | 구자홍 | 액정 표시 장치 및 그 제조방법 |
JP3762002B2 (ja) | 1996-11-29 | 2006-03-29 | 株式会社東芝 | 薄膜トランジスタ、及び液晶表示装置 |
US6469317B1 (en) * | 1998-12-18 | 2002-10-22 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method of fabricating the same |
EP1041641B1 (en) | 1999-03-26 | 2015-11-04 | Semiconductor Energy Laboratory Co., Ltd. | A method for manufacturing an electrooptical device |
JP2001177103A (ja) | 1999-12-20 | 2001-06-29 | Sony Corp | 薄膜半導体装置及び表示装置とその製造方法 |
KR100366768B1 (ko) | 2000-04-19 | 2003-01-09 | 삼성전자 주식회사 | 배선의 접촉부 및 그의 제조 방법과 이를 포함하는 박막 트랜지스터 기판 및 그 제조 방법 |
US6749809B2 (en) * | 2000-09-21 | 2004-06-15 | Karasawa Fine, Ltd. | Clustered creature exterminating method |
KR100623232B1 (ko) * | 2003-11-29 | 2006-09-18 | 삼성에스디아이 주식회사 | 평판표시장치 및 그의 제조방법 |
-
2003
- 2003-11-29 KR KR1020030087793A patent/KR100623232B1/ko not_active Expired - Fee Related
-
2004
- 2004-11-24 US US10/995,147 patent/US7268405B2/en not_active Expired - Lifetime
- 2004-11-29 CN CNB2004100471951A patent/CN100365674C/zh not_active Expired - Lifetime
-
2007
- 2007-08-01 US US11/832,099 patent/US7402468B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US7268405B2 (en) | 2007-09-11 |
CN100365674C (zh) | 2008-01-30 |
KR20050052305A (ko) | 2005-06-02 |
US7402468B2 (en) | 2008-07-22 |
US20070269939A1 (en) | 2007-11-22 |
US20050116233A1 (en) | 2005-06-02 |
CN1629907A (zh) | 2005-06-22 |
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