KR100542690B1 - Silicon oxide film formation method of semiconductor device - Google Patents
Silicon oxide film formation method of semiconductor device Download PDFInfo
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- KR100542690B1 KR100542690B1 KR1019980061449A KR19980061449A KR100542690B1 KR 100542690 B1 KR100542690 B1 KR 100542690B1 KR 1019980061449 A KR1019980061449 A KR 1019980061449A KR 19980061449 A KR19980061449 A KR 19980061449A KR 100542690 B1 KR100542690 B1 KR 100542690B1
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- 238000000034 method Methods 0.000 title claims abstract description 30
- 239000004065 semiconductor Substances 0.000 title claims abstract description 14
- 230000015572 biosynthetic process Effects 0.000 title claims description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 title 1
- 229910052814 silicon oxide Inorganic materials 0.000 title 1
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 20
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 19
- 239000010703 silicon Substances 0.000 claims abstract description 19
- 239000000758 substrate Substances 0.000 claims abstract description 16
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 7
- 238000009832 plasma treatment Methods 0.000 claims abstract description 6
- 229910001873 dinitrogen Inorganic materials 0.000 claims abstract description 5
- 239000011261 inert gas Substances 0.000 claims abstract description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 7
- 239000001301 oxygen Substances 0.000 claims description 7
- 229910052760 oxygen Inorganic materials 0.000 claims description 7
- 235000012431 wafers Nutrition 0.000 abstract description 20
- 238000004381 surface treatment Methods 0.000 abstract description 2
- 230000015556 catabolic process Effects 0.000 description 6
- 230000003647 oxidation Effects 0.000 description 6
- 238000007254 oxidation reaction Methods 0.000 description 6
- 239000007789 gas Substances 0.000 description 5
- 230000000694 effects Effects 0.000 description 3
- 238000010849 ion bombardment Methods 0.000 description 3
- 238000000151 deposition Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 description 1
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 239000011856 silicon-based particle Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
- H01L21/02312—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour
- H01L21/02315—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Formation Of Insulating Films (AREA)
Abstract
본 발명은 반도체 소자의 산화막 형성 방법에 관한 것으로, 웨이퍼를 챔버 내에 로딩하고 산화막이 형성될 하부층이 실리콘 기판인 경우, 질소 가스를 포함하는 불활성 기체를 이용하여 플라즈마 전처리 공정을 실시하는 단계와, 산소 플라즈마 처리를 실시하는 단계를 통하여 산화막을 형성하므로써, 소수의 웨이퍼 또는 대구경 웨이퍼의 표면처리 및 얇은 산화막을 용이하게 형성할 수 있고, 웨이퍼 가공에 대한 단가를 줄이고 스루우풋(throughput)을 높일 수 있으며, 산화막의 신뢰성을 향상시킬 수 있는 반도체 소자의 산화막 형성 방법이 개시된다.The present invention relates to a method of forming an oxide film of a semiconductor device, wherein when the wafer is loaded into a chamber and the lower layer on which the oxide film is to be formed is a silicon substrate, performing a plasma pretreatment process using an inert gas containing nitrogen gas; By forming the oxide film through the step of plasma treatment, it is possible to easily form a thin oxide film and the surface treatment of a small number of wafers or large-diameter wafer, reduce the unit cost for wafer processing and increase the throughput, A method of forming an oxide film of a semiconductor device that can improve the reliability of an oxide film is disclosed.
Description
본 발명은 반도체 소자의 얇은 산화막(thin oxide) 형성 방법에 관한 것으로, 특히 실리콘 기판이나 산화막 하부층을 전처리하므로써 산화막의 성장 특성을 향상시킬 수 있는 반도체 소자의 산화막 형성 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a thin oxide film of a semiconductor device, and more particularly, to a method of forming an oxide film of a semiconductor device capable of improving growth characteristics of an oxide film by pretreatment of a silicon substrate or an oxide layer below.
일반적으로, 얇은 산화막 형성 시에는 튜브 내에서 슬롯(slot)별 가스 플로우와 온도조절이 균일하게 유지되어야 한다. 또한, 웨이퍼 삽입 위치에 따라 산화막의 증착 두께가 불균일해지는 문제가 있고, 산화막 형성시의 파티클로 인한 오염 가능성을 배제하는 것이 공정의 큰 문제로 부각되어 왔다. 뿐만 아니라, 웨이퍼 내의 산화막 증착 균일성을 확보하는 것이 중요하다. 이러한 문제는 저전력에서 동작하는 소자의 산화막(예를 들어, 게이트 산화막) 두께가 낮아짐에 따라 산화막의 신뢰성(예를 들어, 브레이크다운 전압, 상수 전류 스트레스 테스트 등)을 결정하는 새로운 문제로 부각되고 있다. 또한, 소규모 웨이퍼나 특이한 조건을 개별 웨이퍼에 적용할 때 프로세스 병목 현상이 발생하며, 산화막 형성시 필요한 가스량, 소비전력, 더미(dummy) 웨이퍼의 사용에 따른 비용이 증가되는 문제점이 있다.In general, when forming a thin oxide film, the gas flow and temperature control for each slot should be maintained uniformly in the tube. In addition, there is a problem that the deposition thickness of the oxide film is uneven depending on the wafer insertion position, and it has been highlighted as a big problem of the process to exclude the possibility of contamination due to particles during the oxide film formation. In addition, it is important to ensure uniform deposition of oxide film in the wafer. This problem is emerging as a new problem of determining the reliability (eg, breakdown voltage, constant current stress test, etc.) of the oxide film as the thickness of the oxide film (eg, gate oxide) of the device operating at low power becomes low. . In addition, a process bottleneck occurs when small wafers or unusual conditions are applied to individual wafers, and there is a problem in that an amount of gas, power consumption, and cost of using a dummy wafer are increased when an oxide film is formed.
따라서, 본 발명은 실리콘 기판 표면이나 산화막 하부층을 플라즈마를 이용하여 전처리하여 표면 상태를 개선한 후 산화막을 형성하므로써 산화막의 신뢰성을 향상시킬 수 있는 반도체 소자의 산화막 형성 방법을 제공하는 데 그 목적이 있다.Accordingly, an object of the present invention is to provide a method for forming an oxide film of a semiconductor device capable of improving the reliability of the oxide film by forming an oxide film after pretreating the surface of the silicon substrate or the oxide layer under plasma using plasma. .
상술한 목적을 달성하기 위한 본 발명에 따른 반도체 소자의 산화막 형성 방법은 반도체 소자의 산화막 형성 방법에 있어서, 웨이퍼를 챔버 내에 로딩하고 산화막이 형성될 하부층이 실리콘 기판인 경우, 질소 가스를 포함하는 불활성 기체를 이용하여 플라즈마 전처리 공정을 실시하는 단계와, 산소 플라즈마 처리를 실시하는 단계를 포함하여 이루어지는 것을 특징으로 한다.In the oxide film forming method of a semiconductor device according to the present invention for achieving the above object, in the oxide film formation method of a semiconductor device, inert nitrogen containing, when the wafer is loaded in the chamber and the lower layer to be formed oxide film is a silicon substrate And performing a plasma pretreatment process using a gas, and performing an oxygen plasma treatment.
본 발명에서 산화막을 형성하는 방법은 얇은 산화막을 실리콘 기판 상에 형성하는 경우와 실리콘 기판이 아닌 하부층 상에 형성하는 경우로 나누어 설명될 수 있다.The method of forming the oxide film in the present invention can be described by dividing it into a case where a thin oxide film is formed on a silicon substrate and a case where the oxide film is formed on a lower layer rather than a silicon substrate.
첫째, 실리콘 기판 상에 얇은 산화막을 형성하는 경우에 대하여 설명한다. 먼저, 챔버 내에 웨이퍼를 로딩하고 N2, NH3 등 질소 가스를 포함하는 불활성 기체를 500W 이하의 고주파 소오스 전력을 이용하여 플라즈마로 만들고, 웨이퍼 표면에 이온 충돌이 일어나지 않도록 바이어스 전력을 인가하지 않은 상태에서 플라즈마 전처리를 실시하여 실리콘 기판 표면을 중화시킨다. 이때, 실리콘 기판 전처리의 균일성을 향상시키기 위하여 고밀도 플라즈마 챔버의 압력은 10 ～ 80mT로 유지시킨다. 그리고, 웨이퍼가 장착되는 페디스틀(pedestal)이나 일렉트로드(electrode)의 온도를 100℃ 이상으로 유지시켜 이온 충격이 억제되도록 한다.First, a case of forming a thin oxide film on a silicon substrate will be described. First, a wafer is loaded into a chamber and an inert gas containing nitrogen gas such as N 2 or NH 3 is made into plasma using a high frequency source power of 500W or less, and a bias power is not applied to prevent ion collision on the wafer surface. Plasma pretreatment is performed to neutralize the silicon substrate surface. At this time, in order to improve the uniformity of the silicon substrate pretreatment, the pressure of the high density plasma chamber is maintained at 10 to 80 mT. Then, the temperature of the pedestal or the electrode on which the wafer is mounted is maintained at 100 ° C. or higher to suppress the ion bombardment.
이후, 산소 플라즈마에 이하여 산화 공정을 실시하여 얇은 산화막을 형성한다. 산소 플라즈마 생성시 소오스 전력은 2500W 이하로 하고, 바이어스 전력은 50W 이하로 하며, 고밀도 플라즈마 챔버의 압력은 500 내지 1000mT로 유지시킨다. 이 경우, 질소를 포함하는 가스를 이용하여 전처리를 실시하므로써 브레이크다운(breakdown) 전압이 향상되는 효과를 얻을 수 있다.Thereafter, an oxidation process is performed following the oxygen plasma to form a thin oxide film. When generating oxygen plasma, the source power is 2500W or less, the bias power is 50W or less, and the pressure of the high density plasma chamber is maintained at 500 to 1000 mT. In this case, the effect of improving the breakdown voltage can be obtained by performing pretreatment using a gas containing nitrogen.
둘째, 실리콘 기판이 아닌 하부층(예를 들어, 산화막) 상에 얇은 산화막을 형성하는 경우에 대하여 설명한다. 먼저, 웨이퍼를 챔버 내에 로딩하고, Ar, XeF2, NF3 또는 CF4+O2 중 어느 하나를 500W 이하의 고주파 소오스 전력을 이용하여 플라즈마로 만들고, 약간의 이온 충격이 수반되도록 하여, 실리콘과 산소와의 본드를 끊어 하부층 표면의 실리콘을 돌출시킨다. 이 경우, 바이어스전력을 50W 이하로 유지하므로써 하부층 표면의 실리콘 고용도를 높일 수 있다. 또한, 챔버 내의 압력을 10mT 이내에서 변화시켜 이온의 평균 자유 경로(Mean Free Path)를 확보한다. 그리고, 웨이퍼가 장착되는 캐소드(cathode)의 온도가 10℃ 이하로 유지되도록 하여 이온 충격 효과를 얻을 수 있도록 한다.Second, a case where a thin oxide film is formed on a lower layer (for example, an oxide film) rather than a silicon substrate will be described. First, the wafer is loaded into the chamber, and any one of Ar, XeF 2 , NF 3 or CF 4 + O 2 is made into a plasma using a high frequency source power of 500 W or less, accompanied by some ion bombardment, so that the silicon and The bond with oxygen is broken to protrude the silicon on the lower layer surface. In this case, by maintaining the bias power at 50 W or less, the silicon solubility of the lower layer surface can be increased. In addition, the pressure in the chamber is changed within 10 mT to secure an average free path of ions. In addition, the temperature of the cathode on which the wafer is mounted is maintained at 10 ° C. or lower to obtain an ion bombardment effect.
이후, 산소 플라즈마에 이하여 산화 공정을 실시하여 얇은 산화막을 형성한다. 산소 플라즈마 생성시 소오스 전력은 2500W 이하로 하고, 바이어스 전력은 50W 이하로 하며, 고밀도 플라즈마 챔버의 압력은 500 내지 1000mT로 유지시킨다.Thereafter, an oxidation process is performed following the oxygen plasma to form a thin oxide film. When generating oxygen plasma, the source power is 2500W or less, the bias power is 50W or less, and the pressure of the high density plasma chamber is maintained at 500 to 1000 mT.
이상 설명한 두 가지 경우 모두에 있어서, 플라즈마 턴온시 챔버의 압력을 조절하여 해리된 가스 입자의 챔버 잔류시간을 증가시키므로써, 실리콘 기판이나 하부층의 플라즈마 처리 반응 확율이 균일하도록 한다. 또한, 플라즈마 처리에 의해 표면에 Si 또는 Si-X 등의 물질이 형성되도록 하여 실리콘의 고용도를 향상시킬 수 있으며, 표면에 발생된 Si에 의해 2차 산화가 가능하게 된다.In both cases described above, the chamber residence time of the dissociated gas particles is increased by adjusting the pressure of the chamber during plasma turn-on, so that the probability of plasma treatment reaction of the silicon substrate or the lower layer is uniform. In addition, by forming a material such as Si or Si-X on the surface by the plasma treatment, it is possible to improve the solid solubility of silicon, and secondary oxidation is possible by the Si generated on the surface.
이와 같이, 플라즈마를 이용하여 실리콘 기판 표면이나 산화막 하부층을 가공하므로써 댄글링 본드(dangling bond), 차지 트랩(charge trap), 불순물, 격자결함 등의 표면 상태를 제어하여 산화막의 신뢰성을 향상시킬 수 있고, 표면에 노출되는 실리콘 입자를 이용하여 얇은 산화막 성장률을 향상시킬 수 있다. 이 방법은 특히, 300mm 웨이퍼의 가공이나 소규모 웨이퍼에서 유용하게 사용될 수 있다.As such, by processing the surface of the silicon substrate or the oxide underlayer using plasma, surface conditions such as dangling bonds, charge traps, impurities, and lattice defects can be controlled to improve the reliability of the oxide film. By using the silicon particles exposed on the surface, the thin oxide film growth rate can be improved. This method can be especially useful for processing 300mm wafers or small wafers.
도 1(a) 및 1(b)는 본 발명에 따라 산화막을 형성한 경우 브레이크다운 전압의 향상을 나타내는 그래프이다.1 (a) and 1 (b) are graphs showing an improvement in breakdown voltage when an oxide film is formed according to the present invention.
도 1(a)는 산화 압력이 5mTorr인 경우를 나타내고, 도 1(b)는 산화 압력이 1mTorr인 경우를 나타낸다. 그래프에서 알 수 있듯이, 질소 가스를 이용한 플라즈마 처리로 실리콘 기판을 전처리하게 되면, 산화막의 브레이크다운 전압이 향상됨을 알 수 있다. 이러한 브레이크다운 전압의 향상은 산화 압력 변화되는 경우에도 같은 결과를 가져온다.FIG. 1 (a) shows a case where the oxidation pressure is 5 mTorr, and FIG. 1 (b) shows a case where the oxidation pressure is 1 mTorr. As can be seen from the graph, when the silicon substrate is pretreated by plasma treatment using nitrogen gas, it can be seen that the breakdown voltage of the oxide film is improved. This improvement in breakdown voltage has the same effect even when the oxidation pressure changes.
도 2는 본 발명에 따라 산화막을 형성한 경우 산화막 성장 시간에 따른 산화막의 두께 변화를 나타내는 그래프이다.2 is a graph showing the thickness change of the oxide film according to the oxide film growth time when the oxide film is formed according to the present invention.
그래프에서 알 수 있듯이, 질소 가스 등을 이용하여 전처리를 실시한 후 산화막을 형성하게 되면, 전처리를 하지 않은 경우에 비하여 산화막의 성장률 높아지게 된다.As can be seen from the graph, when the oxide film is formed after pretreatment using nitrogen gas or the like, the growth rate of the oxide film is increased as compared with the case where the pretreatment is not performed.
상술한 바와 같이 본 발명에 의하면 산화막 형성 전 실리콘 기판 등의 하부층을 플라즈마를 이용하여 전처리하므로써, 소수의 웨이퍼 또는 대구경 웨이퍼의 표면처리 및 얇은 산화막을 용이하게 할 수 있다. 또한, 웨이퍼 가공에 대한 단가를 줄이고 스루우풋(throughput)을 높일 수 있고, 산화막의 신뢰성을 향상시킬 수 있다.As described above, according to the present invention, by pretreating a lower layer such as a silicon substrate before forming an oxide film by using plasma, surface treatment of a small number of wafers or large diameter wafers and a thin oxide film can be facilitated. In addition, it is possible to reduce the unit cost for wafer processing, increase throughput, and improve the reliability of the oxide film.
도 1(a) 및 1(b)는 본 발명에 따라 산화막을 형성한 경우 브레이크다운 전압의 향상을 나타내는 그래프.1 (a) and 1 (b) are graphs showing an improvement in breakdown voltage when an oxide film is formed according to the present invention.
도 2는 본 발명에 따라 산화막을 형성한 경우 산화막 성장 시간에 따른 산화막의 두께 변화를 나타내는 그래프.Figure 2 is a graph showing the thickness change of the oxide film according to the oxide film growth time when the oxide film is formed in accordance with the present invention.
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| JPS62254433A (en) * | 1986-04-28 | 1987-11-06 | Sanyo Electric Co Ltd | Formation of oxide film on silicon substrate |
| KR0126892B1 (en) * | 1993-03-31 | 1998-04-02 | 세끼사와 다까시 | Apparatus for semiconductor device and manufacturing method therefor |
| KR19980046161A (en) * | 1996-12-11 | 1998-09-15 | 양승택 | Gate oxide film formation method of a semiconductor device |
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| JPS62254433A (en) * | 1986-04-28 | 1987-11-06 | Sanyo Electric Co Ltd | Formation of oxide film on silicon substrate |
| KR0126892B1 (en) * | 1993-03-31 | 1998-04-02 | 세끼사와 다까시 | Apparatus for semiconductor device and manufacturing method therefor |
| KR19980046161A (en) * | 1996-12-11 | 1998-09-15 | 양승택 | Gate oxide film formation method of a semiconductor device |
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