KR100508057B1 - 박막트랜지스터기판및박막트랜지스터액정표시장치제조방법 - Google Patents
박막트랜지스터기판및박막트랜지스터액정표시장치제조방법 Download PDFInfo
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- KR100508057B1 KR100508057B1 KR1019970061083A KR19970061083A KR100508057B1 KR 100508057 B1 KR100508057 B1 KR 100508057B1 KR 1019970061083 A KR1019970061083 A KR 1019970061083A KR 19970061083 A KR19970061083 A KR 19970061083A KR 100508057 B1 KR100508057 B1 KR 100508057B1
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- Prior art keywords
- electrode
- insulating film
- storage capacitor
- forming
- gate
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136213—Storage capacitors associated with the pixel electrode
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/481—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs integrated with passive devices, e.g. auxiliary capacitors
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Nonlinear Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Thin Film Transistor (AREA)
- Liquid Crystal (AREA)
Abstract
Description
Claims (3)
- 기판 위에 실리콘을 증착하고 결정화하여 다결정 실리콘을 형성한 후 다결정 실리콘 패턴을 형성하는 단계와;상기 기판 위에 게이트 절연막 증착후, 상기 게이트 절연막 위에 게이트 전극 및 게이트 패턴을 형성하는 단계와;상기 게이트 절연막 위에 층간 절연막을 증착한 후, 상기 층간 절연막 위에 소스 전극 및 드레인 전극을 형성하고, 보존용량을 이룰 보존용량 전극을 위한 패턴을 형성하는 단계와;상기 소스 전극 및 드레인 전극 위에 보호막을 증착하고, 상기 보호막 위에 상기 드레인 전극과 접속되는 화소 투명 전극을 형성하는 단계를 포함하며,상기 보존 용량 전극과 옆 화소의 상기 화소 투명 전극이 전기적으로 연결되어 있는 박막 트랜지스터 액정 표시 장치의 제조 방법.
- 제1항에 있어서,상기한 보존용량 전극은 상기 보호막을 사이에 두고 상기 화소 전극과 겹치도록 형성되어 보존 용량을 이루는 것을 특징으로 하는 박막 트랜지스터 액정 표시 장치의 제조 방법.
- 절연 기판,상기 기판 위에 형성되어 있는 다결정 규소층,상기 다결정 규소층을 덮고 있는 게이트 절연막,상기 게이트 절연막 위에 형성되어 있는 게이트선,상기 게이트선을 덮고 있는 제1 층간 절연막,상기 제1 층간 절연막에 형성되며 상기 다결정 규소층에 도핑되어 형성된 소스 영역과 드레인 영역의 일부를 각각 노출시키는 제1 접촉구와 제2 접촉구,상기 제1 접촉구를 통하여 상기 소스 영역과 연결되는 소스 전극을 포함하는 데이터선,상기 제2 접촉구를 통하여 상기 드레인 영역과 연결되는 드레인 전극,상기 데이터선 및 드레인 전극과 동일한 층에 형성되는 보존용량 전극,상기 데이터선, 드레인 전극 및 보존용량 전극을 덮으며 드레인 전극의 일부를 노출시키는 제3 접촉구와 상기 보존용량 전극을 노출시키는 제4 접촉구를 가지는 제2 층간 절연막,상기 제2 층간 절연막 위에 제3 접촉구를 통하여 드레인 전극과 연결되는 화소 전극을 포함하며,상기 보존용량 전극은 상기 제4 접촉구를 통하여 옆 화소의 화소 전극과 연결되는 박막 트랜지스터 기판.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019970061083A KR100508057B1 (ko) | 1997-11-19 | 1997-11-19 | 박막트랜지스터기판및박막트랜지스터액정표시장치제조방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019970061083A KR100508057B1 (ko) | 1997-11-19 | 1997-11-19 | 박막트랜지스터기판및박막트랜지스터액정표시장치제조방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR19990040629A KR19990040629A (ko) | 1999-06-05 |
KR100508057B1 true KR100508057B1 (ko) | 2005-12-01 |
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KR1019970061083A Expired - Fee Related KR100508057B1 (ko) | 1997-11-19 | 1997-11-19 | 박막트랜지스터기판및박막트랜지스터액정표시장치제조방법 |
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KR (1) | KR100508057B1 (ko) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006344849A (ja) | 2005-06-10 | 2006-12-21 | Casio Comput Co Ltd | 薄膜トランジスタ |
CN115274698A (zh) * | 2022-07-21 | 2022-11-01 | 苏州华星光电技术有限公司 | 阵列基板及显示面板 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05216067A (ja) * | 1992-02-04 | 1993-08-27 | Sony Corp | 薄膜トランジスタアレイ |
JPH0843859A (ja) * | 1994-07-30 | 1996-02-16 | Semiconductor Energy Lab Co Ltd | アクティブマトリクス回路 |
JPH08306926A (ja) * | 1995-05-07 | 1996-11-22 | Semiconductor Energy Lab Co Ltd | 液晶電気光学装置 |
JPH0926603A (ja) * | 1995-05-08 | 1997-01-28 | Semiconductor Energy Lab Co Ltd | 表示装置 |
-
1997
- 1997-11-19 KR KR1019970061083A patent/KR100508057B1/ko not_active Expired - Fee Related
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05216067A (ja) * | 1992-02-04 | 1993-08-27 | Sony Corp | 薄膜トランジスタアレイ |
JPH0843859A (ja) * | 1994-07-30 | 1996-02-16 | Semiconductor Energy Lab Co Ltd | アクティブマトリクス回路 |
JPH08306926A (ja) * | 1995-05-07 | 1996-11-22 | Semiconductor Energy Lab Co Ltd | 液晶電気光学装置 |
KR100305275B1 (ko) * | 1995-05-07 | 2002-11-04 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 액티브매트릭스형표시장치 |
JPH0926603A (ja) * | 1995-05-08 | 1997-01-28 | Semiconductor Energy Lab Co Ltd | 表示装置 |
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KR19990040629A (ko) | 1999-06-05 |
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