KR100495398B1 - transistor of low loss struscure - Google Patents

Abstract

The present invention relates to a transistor having a low loss structure, and more particularly, to improve the structure of the air bridge by reducing the width of the mesa region in the transistor having a plurality of gate structures to reduce the transistor loss at high frequency The present invention relates to a transistor having a low loss structure which improves the gain characteristics and the output characteristics of the transistor.

Description

Transistor of low loss struscure

The present invention relates to a transistor having a low loss structure, in particular, to improve the structure of the air bridge by increasing the width of the source electrode in the transistor having a plurality of unit gate structure, and to reduce the width of the mesa region to improve the performance of low loss at high The branch relates to a transistor.

The technique of connecting the source electrode and the GND electrode of the conventional ultrafast transistor has been made by connecting and forming an air bridge at a distance within 3 μm of the plurality of unit gate electrodes and the plurality of unit drain electrodes.

1 shows a conventional transistor, (a) is a plan view, (b) is a perspective view seen at a 45 degree tilted angle, and FIG. 2 is a vertical sectional view of the conventional transistor.

The transistor is provided with a mesa layer 5 on the substrate 6, and a source electrode 1, a drain electrode 2, and a gate electrode 3 are formed on the mesa layer 5 so that a signal is transmitted to the mesa layer. (5) is passed through.

When a plurality of the source electrode 1, the drain electrode 2, and the gate electrode 3 are arranged in parallel to form a unit electrode, the same electrodes must be connected to each other. Thus, an air bridge 4 is provided. Lose.

However, as the number of units of the gate electrode 3 increases, a large number of air bridges 4 are required, which requires a high precision of the process, and thus, the manufacturing time is long and the process is difficult.

In addition, since the air bridge 4 is formed on the plurality of unit gate electrodes 3, the signal loss is large due to the coupling effect between the source electrode 1 and the gate electrode 3.

SUMMARY OF THE INVENTION The present invention has been made to solve such a conventional problem, and an object thereof is to provide an easier process while improving a characteristic by reducing signal loss.

The transistor of the low loss structure according to the present invention is modified from the structure of a conventional air bridge passing through a plurality of unit gate electrodes and a plurality of unit drain electrodes, and thus, an air bridge for grounding the source electrode and the GND electrode from the end of the plurality of unit gate electrodes. Forming a portion where the gate electrode is not provided may remove the activation region so that the activation region is not provided, thereby greatly reducing the loss occurring in the existing air bridge.

In order to achieve the above object, a transistor having a low loss structure according to the present invention includes a plurality of unit units configured in a parallel repeating arrangement such that a plurality of unit gate electrodes are provided between a plurality of unit drain electrodes and a plurality of unit source electrodes. A transistor in which a source electrode is connected to an air bridge,

In order to reduce the transistor loss to improve the gain characteristics and the output characteristics of the transistor, an air bridge is provided at an end adjacent to the drain electrode of the source electrode without crossing the air bridge and the plurality of unit gate electrodes, and the lower portion of the air bridge The mesa region may be removed where the plurality of unit gate electrodes is not provided.

Hereinafter, described in detail with reference to the accompanying drawings, preferred embodiments of the present invention according to the technical spirit as described above.

Example 1

FIG. 3 is a first embodiment of the present invention, wherein (a) is a plan view of a transistor, and (b) is a perspective view of a state in which (a) is inclined at 45 degrees.

As shown in FIG. 3, each unit electrode is disposed on the mesa layer 50 in parallel so that a plurality of unit gate electrodes 30 are provided between the plurality of unit drain electrodes 20 and the plurality of unit source electrodes 10. The gate electrode 30 and the drain electrode 20 are connected by a connecting line, and the source electrode 10 is connected by an air bridge 40 so that each electrode is connected to each other.

The air bridge 40 is provided at the end of the source electrode 10 adjacent to the drain electrode 20, the length of the source electrode 10 so that the gate electrode 30 and the air bridge 40 does not cross each other In addition, the mesa region below the air bridge 40, in which the gate electrode 30 is not provided, is also removed.

4 is a procedure sectional view of an airbridge process in the first embodiment of the present invention.

The air bridge process method for interconnecting the isolated electrodes is applied to methods such as wire-bonding, flip-chip, via hole and dielectric cross-over. In contrast, the parasitic component in the ultra-high frequency band is greatly reduced to improve device characteristics.

Fig. 4 (a) shows that Ti / Au was deposited to a thickness of 200 Å / 6000 으로 as the source drain gate electrode as the primary metal layer forming process in the PHEMT process.

Figure 4 (b) shows the PR-Via pattern formation process using the positive light drawing process.

In the RF-Via pattern forming process, after applying PR (Photo Resist, 110) and projecting light, the PR 110 remains only in a desired portion.

Fig. 4 (c) shows the Au thin film 120 deposited on the wafer surface at an experimentally optimized thickness of about 280 Å. The Au thin film 120 prevents the development of the via pattern resist during the formation of the secondary metal pattern. do.

Figure 4 (d) shows the state after forming the secondary metal pattern using the image reversal process.

Figure 4 (e) shows that the air bridge 40 is fabricated by depositing Ti / Au to 300 Å / 9000 9000 thick and then lifting it off with acetone. Was etched with Au etching solution (Concentration N: KCN: H ₂ O = 10 mL: 500 mg: 100 mL) to facilitate lift-off. It was used after sufficient stirring to stabilize the solution.

5 is a numerical diagram illustrating a signal coupling in which a signal of a gate electrode of the present invention is transferred to a source electrode, and FIG. 6 is a numerical diagram showing a loss value of a signal going from a gate electrode of the present invention to a drain electrode.

As shown in FIG. 5, the transistor according to the present invention has the lowest coupling of the signal from which the signal of the gate electrode is transferred to the source electrode. The value of signal coupling is when one air bridge is provided with one air bridge in the center of the source electrode, two air bridges with two and three air bridges on both sides with respect to the center.

As shown in FIG. 6, the loss of the signal from the gate electrode to the drain electrode is the smallest in the transistor according to the present invention, followed by the loss dimension in the order of 1 air bridge, 2 air bridges, and 3 air bridges.

Accordingly, the transistor according to the present invention removes the active region (mesa layer) 50 at the lower end of the GaAs wafer in which the plurality of unit gate electrodes 30 do not intersect the air bridge 40 and the air bridge 40 is formed. It can be seen that the value of the signal of the electrode 30 coupled with the signal of the source electrode 10 can be minimized and the loss of the signal from the gate electrode 30 to the drain electrode 20 can be minimized.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, the embodiment is for the purpose of description and not of limitation, and a person of ordinary skill in the art of the present invention falls within the scope of the technical idea of the present invention. It will be appreciated that a variety of applications are possible.

According to the above-described "low-loss transistor" according to the present invention, the air bridge and the gate electrode are connected so as not to cross the air bridge and the gate electrode when the source electrode and the GND electrode of the transistor is connected to the air bridge By eliminating the mesa layer at the bottom of the transistor, the loss of transistor signal can be reduced, which improves the gain and output characteristics of the transistor in the high frequency band. Furthermore, the performance of the wireless communication system is improved to provide better quality wireless data communication service. Can be provided.

1 is a view showing the structure of a conventional transistor, (a) is a plan view of a conventional transistor, (b) is a perspective view of a state in which (a) is inclined 45 degrees,

2 is a vertical cross-sectional view of a conventional transistor;

3 is a first embodiment of the present invention, (a) is a plan view of a transistor, (b) is a perspective view of a state in which (a) is inclined at 45 degrees,

Figure 4 is a cross-sectional view of the air bridge manufacturing procedure of the first embodiment of the present invention,

5 is a numerical diagram for signal coupling in which a signal of a gate electrode of the present invention is transferred to a source electrode;

Figure 6 is a numerical diagram showing the loss value of the signal going from the gate electrode to the drain electrode of the present invention.

<Explanation of symbols for the main parts of the drawings>

10 source electrode 20 drain electrode

30: gate electrode 40: air bridge

50 mesa layer 60 substrate

110: PR 120: Au thin film

130: PR for forming the second metal pattern

Claims (3)

The plurality of unit source electrodes 10 are arranged in parallel repeating arrangements such that the plurality of unit gate electrodes 30 are provided between the plurality of unit drain electrodes 20 and the plurality of unit source electrodes 10. In order to reduce the transistor loss in the transistor connected to the transistor to improve the gain and output characteristics of the transistor, the airbridge 40 and the plurality of unit gate electrodes 30 are provided in a transistor having a low loss structure of the prior art. In The transistor having a low loss structure, characterized in that the mesa region (50) is removed where the plurality of unit gate electrodes (30) below the air bridge (40) is not provided. delete delete