KR100482471B1 - Method for manufacturing of active matrix liquid crystal display - Google Patents
Method for manufacturing of active matrix liquid crystal display Download PDFInfo
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- KR100482471B1 KR100482471B1 KR10-2001-0024640A KR20010024640A KR100482471B1 KR 100482471 B1 KR100482471 B1 KR 100482471B1 KR 20010024640 A KR20010024640 A KR 20010024640A KR 100482471 B1 KR100482471 B1 KR 100482471B1
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- 238000000034 method Methods 0.000 title claims abstract description 42
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 23
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 22
- 239000011159 matrix material Substances 0.000 title claims abstract description 15
- 239000002184 metal Substances 0.000 claims abstract description 66
- 229910052751 metal Inorganic materials 0.000 claims abstract description 66
- 238000005530 etching Methods 0.000 claims abstract description 28
- 238000004380 ashing Methods 0.000 claims abstract description 13
- 239000000758 substrate Substances 0.000 claims abstract description 13
- 238000000151 deposition Methods 0.000 claims abstract description 10
- 230000001681 protective effect Effects 0.000 claims abstract description 9
- 238000001312 dry etching Methods 0.000 claims description 13
- 229920002120 photoresistant polymer Polymers 0.000 claims description 9
- 238000002161 passivation Methods 0.000 claims description 7
- 241001239379 Calophysus macropterus Species 0.000 claims description 3
- 229910016024 MoTa Inorganic materials 0.000 claims description 3
- 239000010410 layer Substances 0.000 description 63
- 238000001020 plasma etching Methods 0.000 description 9
- 229910021417 amorphous silicon Inorganic materials 0.000 description 8
- 239000011521 glass Substances 0.000 description 4
- 238000007796 conventional method Methods 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 239000002210 silicon-based material Substances 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/13439—Electrodes characterised by their electrical, optical, physical properties; materials therefor; method of making
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136231—Active matrix addressed cells for reducing the number of lithographic steps
- G02F1/136236—Active matrix addressed cells for reducing the number of lithographic steps using a grey or half tone lithographic process
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
- G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
- G02F2201/123—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode pixel
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Liquid Crystal (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Thin Film Transistor (AREA)
Abstract
본 발명은 공정단계를 감소시키기 위한 액티브 매트릭스형 액정표시소자의 제조방법에 관해 개시한다.The present invention relates to a method of manufacturing an active matrix liquid crystal display device for reducing the process steps.
개시된 액티브 매트릭스형 액정표시소자의 제조방법은 절연 기판 상에 게이트용 금속층을 증착하는 단계와, 게이트용 금속층 상에 제 1 마스크를 형성하고,기 제 1마스크를 이용하여 게이트용 금속층을 식각하여 게이트 전극을 형성하는 단계와; 게이트 전극을 포함한 전면에 게이트 절연막, 활성층, 소오스/드레인 전극용 금속층을 차례로 증착하는 단계와, 소오스/드레인 전극용 금속층 상에 선택적으로 제 2마스크를 형성하는 단계와, 제 2마스크를 이용하여 게이트절연막이 노출되도록 소오스/드레인 전극용 금속층, 활성층을 1차 식각하는 단계와, 1차 식각 단계와 동일 장비 내에서 1차 식각된 소오스/드레인 전극용 금속층을 선택적으로 노출시키도록 제 2마스크를 에싱처리하는 단계와, 에싱된 제 2 마스크를 이용하여 활성층이 노출되도록 1차 식각된 소오스/드레인 전극용 금속층을 2차 식각하여 소오스/드레인 전극을 형성하는 단계와, 제 2마스크를 제거하는 단계와, 소오스/드레인 전극이 형성된 결과물 상에 보호막을 형성하는 단계와, 보호막 상에 소오스/드레인 전극 중 어느 한 부분과 대응되는 부위를 노출시키는 제 3 마스크를 형성하는 단계와, 제 3마스크를 이용하여 보호막을 식각하여 콘택홀을 형성하는 단계와, 제 3마스크를 제거하는 단계와, 잔류된 보호막 상에 화소전극용 금속막을 증착하는 단계와, 화소전극용 금속막 상에 제 4마스크를 형성하고, 제 4마스크를 이용하여 화소전극용 금속막을 식각하여 콘택홀을 통해 소오스/드레인 전극용 금속층과 연결되는 화소전극을 형성하는 단계와, 제 4마스크를 제거하는 단계를 포함한다.The disclosed method of manufacturing an active matrix liquid crystal display device includes depositing a gate metal layer on an insulating substrate, forming a first mask on the gate metal layer, and etching the gate metal layer using the first mask. Forming an electrode; Sequentially depositing a gate insulating film, an active layer, and a source / drain electrode metal layer on the entire surface including the gate electrode, selectively forming a second mask on the source / drain electrode metal layer, and using a second mask to gate First etching the metal layer for the source / drain electrodes and the active layer to expose the insulating layer, and ashing the second mask to selectively expose the metal layer for the first etched source / drain electrode in the same equipment as the first etching step Performing a second step of forming a source / drain electrode by secondly etching the metal layer for the source / drain electrode which is firstly etched to expose the active layer using the second mask which has been processed, and removing the second mask; Forming a protective film on the resultant source / drain electrode formed thereon, and any one of the source / drain electrodes on the protective film. Forming a third mask exposing a corresponding portion, etching a protective film using a third mask to form a contact hole, removing the third mask, and removing the third mask for the pixel electrode Depositing a metal film, forming a fourth mask on the pixel electrode metal film, and etching the pixel electrode metal film using the fourth mask to connect the pixel electrode connected to the source / drain electrode metal layer through a contact hole. Forming and removing the fourth mask.
Description
본 발명은 액티브 매트릭스형 액정표시소자(Active Matrix Liquid Crystal Display : AMLCD)의 제조방법에 관한 것으로, 특히 공정단계를 감소시키기 위한 액티브 매트릭스형 액정표시소자의 제조방법에 관한 것이다. The present invention relates to a method for manufacturing an active matrix liquid crystal display (AMLCD), and more particularly to a method for manufacturing an active matrix liquid crystal display device for reducing the process steps.
일반적으로 평판표시장치(Flat Panel Display)의 일종인 LCD(Liquid Crystal Display)는 액체의 유동성과 결정의 광학적 성질을 겸비하는 액정에 전계를 인가하여 광학적 이방성을 변화시켜 얻어지는 명암의 차이로 화상을 얻는 장치이다. In general, liquid crystal displays (LCDs), which are a type of flat panel display, obtain an image with a difference in contrast obtained by changing an optical anisotropy by applying an electric field to a liquid crystal having both liquidity and optical properties of a crystal. Device.
그리고 사용되는 액정의 종류에 따라 TN(Twisted Nematic), STN(Super TN), 강유전성(Ferro electric) LCD 등으로 나누어지고, 화소의 스위칭 소자인 TFT를 각 화소마다 내장하는 TFT LCD 등이 사용되고 있다.According to the type of liquid crystal used, TN (Twisted Nematic), STN (Super TN), Ferroelectric (LCD), etc. are divided into TFT LCDs, etc., in which TFTs, which are switching elements of pixels, are incorporated for each pixel.
또한, 화면을 수만에서 수십만개로 분할하여 각 화소에 구동소자를 제작하고 스위칭 특성을 이용하여 화소의 동작을 제어하는 방식의 AMLCD 등이 사용되고 있다.In addition, AMLCD and the like are used in which a driving device is manufactured for each pixel by dividing the screen into tens of thousands and hundreds of thousands, and the operation of the pixel is controlled using switching characteristics.
이러한 LCD는 종래 음극선관(Cathode Ray Tube)에 비해 소비전력이 낮고, 경박단소화가 용이하며 칼라화, 대형화 및 고정세화가 가능하여 차츰 사용 범위가 넓어지고 있으며, 최근에는 액정의 응답속도가 빠르고 고화질화에 유리한 TFT-LCD가 주목받고 있다.These LCDs have lower power consumption, easier light weight and shorter size than conventional cathode ray tubes, and can be used in color, large size, and high resolution, and are gradually expanding their range of use. Advantageous TFT-LCDs have attracted attention.
이하, 첨부된 도면을 참조하여 종래의 액정표시소자의 제조방법에 대하여 설명하기로 한다.Hereinafter, a manufacturing method of a conventional liquid crystal display device will be described with reference to the accompanying drawings.
도 1a 내지 도 1d는 종래의 액정표시소자의 제조방법을 나타낸 공정 단면도이다.1A to 1D are cross-sectional views illustrating a conventional method for manufacturing a liquid crystal display device.
도 1a에 도시한 바와 같이 절연기판 즉, 유리기판(11)상에 게이트용 금속막을 증착하고, 제 1 마스크를 이용한 식각 공정으로 상기 게이트용 금속막을 패터닝하여 게이트 전극(12)을 형성한다.As shown in FIG. 1A, a gate metal film is deposited on an insulating substrate, that is, a glass substrate 11, and the gate metal film is patterned by an etching process using a first mask to form a gate electrode 12.
이어, 상기 게이트 전극(12)을 포함한 기판(11) 전면에 게이트 절연막(13)을 형성한다.Subsequently, a gate insulating layer 13 is formed on the entire surface of the substrate 11 including the gate electrode 12.
도 1b에 도시한 바와 같이 상기 게이트 절연막(13)상에 도핑되지 않는 비정질 실리콘(이하, a-Si층이라 칭함)을 증착하고, 제 2 마스크를 이용한 식각 공정으로 상기 a-Si층을 선택적으로 식각하여 활성층(14)을 형성한다.As shown in FIG. 1B, undoped amorphous silicon (hereinafter, referred to as an a-Si layer) is deposited on the gate insulating layer 13, and the a-Si layer is selectively selected by an etching process using a second mask. Etching is performed to form the active layer 14.
도 1c에 도시한 바와 같이 상기 활성층(14)을 포함한 게이트 절연막(13)상에 채널층을 형성하기 위한 도핑된 비정질실리콘층(이하, n+ a-Si층이라 칭함)과, 소오스/드레인 전극을 형성하기 위한 금속막을 차례로 형성하고, 제 3 마스크를 이용하여 상기 금속막과 n+ a-Si층을 연속적으로 식각하여 소오스/드레인 전극(16) 및 채널층(15)을 형성한다.As shown in FIG. 1C, a doped amorphous silicon layer (hereinafter referred to as an n + a-Si layer) and a source / drain electrode for forming a channel layer on the gate insulating layer 13 including the active layer 14. The metal film for forming the metal film is sequentially formed, and the source / drain electrode 16 and the channel layer 15 are formed by successively etching the metal film and the n + a-Si layer using a third mask.
도 1d에 도시한 바와 같이 상기 소오스/드레인 전극(16)상을 포함한 기판(11) 전면에 보호막(17)을 형성하고, 제 4 마스크를 이용하여 상기 소오스/드레인 전극(16)중 어느 하나가 노출되도록 콘택홀을 형성한다.As shown in FIG. 1D, the passivation layer 17 is formed on the entire surface of the substrate 11 including the source / drain electrodes 16, and any one of the source / drain electrodes 16 is formed using a fourth mask. A contact hole is formed to be exposed.
그리고 상기 보호막(17)상에 투명 금속막 예컨대, ITO 금속막을 증착하고 제 5 마스크를 이용하여 상기 ITO 금속막을 선택적으로 제거하여 상기 소오스/드레인 전극(16)중 어느 하나와 콘택되는 화소전극(18)을 형성한다.In addition, a pixel electrode 18 in contact with any one of the source / drain electrodes 16 is formed by depositing a transparent metal film, for example, an ITO metal film on the passivation layer 17 and selectively removing the ITO metal film using a fifth mask. ).
그러나 상기와 같은 종래의 액정표시소자의 제조방법에 있어서는 다음과 같은 문제점이 있었다. However, the above-described conventional manufacturing method of the liquid crystal display device has the following problems.
게이트 전극, 활성층, 소오스/드레인 전극, 화소전극 그리고 소오스/드레인 전극과 화소전극을 접속시키기 위한 콘택을 형성하기 위해 적어도 5개의 마스크를 가지고 5번의 사진 식각 공정을 진행하여야 한다.Five photolithography processes must be performed with at least five masks to form a gate electrode, an active layer, a source / drain electrode, a pixel electrode, and a contact for connecting the source / drain electrode and the pixel electrode.
이때, 패턴을 형성하기 위하여 설계된 마스크는 매우 고가이어서 공정에 적용되는 마스크 수가 증대되면 액정표시소자를 제조하는 비용이 이에 비례하여 상승한다.In this case, the mask designed to form the pattern is very expensive, and as the number of masks applied to the process increases, the cost of manufacturing the liquid crystal display device increases in proportion thereto.
그리고 5개의 마스크를 가지고 5번의 사진 식각 공정이 진행되므로 장비간 잦은 이동에 의한 공정시간 증가 등으로 공정이 매우 복잡하다.In addition, since five photo etching processes are performed using five masks, the process is very complicated due to an increase in processing time due to frequent movement between equipment.
본 발명은 상기와 같은 문제점을 해결하기 위하여 안출한 것으로 그레이-톤 마스크(Gray-Tone Mask)를 이용하여 4번의 식각 공정을 진행하므로 공정을 단순화하고, 비용을 절감시킬 수 있는 액티브 매트릭스형 액정표시소자의 제조방법을 제공하는데 그 목적이 있다.The present invention has been made in order to solve the above problems, the active matrix type liquid crystal display that can simplify the process and reduce the cost because the etching process is performed four times using a gray-tone mask (Gray-Tone Mask) Its purpose is to provide a method for manufacturing a device.
상기와 같은 목적을 달성하기 위한 본 발명의 액티브 매트릭스형 액정표시소자의 제조방법은 절연 기판 상에 게이트용 금속층을 증착하는 단계; 게이트용 금속층 상에 제 1 마스크를 형성하고, 상기 제 1마스크를 이용하여 상기 게이트용 금속층을 식각하여 게이트 전극을 형성하는 단계와; 게이트 전극을 포함한 전면에 게이트 절연막, 활성층, 소오스/드레인 전극용 금속층을 차례로 증착하는 단계; 소오스/드레인 전극용 금속층 상에 선택적으로 제 2마스크를 형성하는 단계; 제 2마스크를 이용하여 상기 게이트절연막이 노출되도록 상기 소오스/드레인 전극용 금속층, 활성층을 1차 건식식각하는 단계; 1차 식각된 소오스/드레인 전극용 금속층을 선택적으로 노출시키도록 상기 제 2마스크를 건식을 이용한 에싱공정을 실시하는 단계; 에싱된 제 2 마스크를 이용하여 상기 활성층이 노출되도록 상기 1차 식각된 소오스/드레인 전극용 금속층을 2차 건식식각하여 소오스/드레인 전극을 형성하는 단계; 제 2마스크를 제거하는 단계; 소오스/드레인 전극이 형성된 결과물 상에 보호막을 형성하는 단계; 보호막 상에 상기 소오스/드레인 전극 중 어느 한 부분과 대응되는 부위를 노출시키는 제 3 마스크를 형성하는 단계; 제 3마스크를 이용하여 상기 보호막을 식각하여 콘택홀을 형성하는 단계; 제 3마스크를 제거하는 단계; 잔류된 보호막 상에 화소전극용 금속막을 증착하는 단계; 화소전극용 금속막 상에 제 4마스크를 형성하고, 상기 제 4마스크를 이용하여 상기 화소전극용 금속막을 식각하여 상기 콘택홀을 통해 소오스/드레인 전극용 금속층과 연결되는 화소전극을 형성하는 단계; 및 제 4마스크를 제거하는 단계를 포함하고,상기 1차 건식식각하는 단계, 상기 건식을 이용한 에싱처리하는 단계 및 상기 2차 건식식각하는 단계는 동일 RIE타입의 장비 내에서 연속적으로 진행하는 것을 특징으로 한다.Method of manufacturing an active matrix liquid crystal display device of the present invention for achieving the above object comprises the steps of depositing a gate metal layer on an insulating substrate; Forming a first mask on the gate metal layer, and etching the gate metal layer using the first mask to form a gate electrode; Sequentially depositing a gate insulating film, an active layer, and a metal layer for source / drain electrodes on the entire surface including the gate electrode; Selectively forming a second mask on the metal layer for the source / drain electrodes; Firstly etching the source / drain electrode metal layer and the active layer to expose the gate insulating layer using a second mask; Performing an ashing process using a dry mask on the second mask so as to selectively expose the first etched source / drain electrode metal layer; Forming a source / drain electrode by performing secondary dry etching on the first etched source / drain electrode metal layer to expose the active layer using an ashed second mask; Removing the second mask; Forming a protective film on the resultant formed source / drain electrodes; Forming a third mask on the passivation layer to expose a portion corresponding to any one of the source / drain electrodes; Etching the passivation layer using a third mask to form a contact hole; Removing the third mask; Depositing a metal film for the pixel electrode on the remaining protective film; Forming a fourth mask on the pixel electrode metal film, and etching the pixel electrode metal film using the fourth mask to form a pixel electrode connected to the source / drain electrode metal layer through the contact hole; And removing a fourth mask, wherein the primary dry etching, the ashing process using the dry process, and the secondary dry etching process are performed continuously in the equipment of the same RIE type. It is done.
본 발명의 액티브 매트릭스형 액정표시소자의 제조방법은 상기 활성층, 소오스/드레인 전극용 금속층 식각은 건식식각 공정을 이용하고, 식각 가스 SF6+O2+He 또는 SF6+HCl+O2를 이용하는 것이 바람직하다.In the method of manufacturing an active matrix liquid crystal display device of the present invention, the active layer and the metal layer for source / drain electrodes are etched using a dry etching process, and the etching gas SF 6 + O 2 + He or SF 6 + HCl + O 2 is used. It is preferable.
또한, 상기 활성층, 소오스/드레인 전극용 금속층 식각은 PE(Plasma Etching) 타입의 장비로 이루어지는 것이 바람직하다.In addition, the active layer, the metal layer etching for source / drain electrodes is preferably made of PE (Plasma Etching) type equipment.
또한, 상기 제 2마스크 에싱 공정은 RIE(Reactive Ion Etching) 타입의 장비로 진행하는 것이 바람직하다.In addition, the second mask ashing process is preferably to proceed to the RIE (Reactive Ion Etching) type of equipment.
또한, 상기 제 2 마스크 에싱 공정 가스는 O2, CF4, CHF6을 이용하는 것이 바람직하다.In addition, the second mask ashing process gas is preferably O 2 , CF 4 , CHF 6 .
또한, 상기 게이트 절연막이 노출되도록 소오스/드레인 전극용 금속층 식각은 습식식각 및 건식식각 공정을 이용하는 것이 바람직하다.In addition, the metal layer etching for the source / drain electrodes may be wet etching and dry etching to expose the gate insulating layer.
또한, 상기 소오스/드레인 전극용 금속층은 MO, Al, MoTa, α-Ta, Ti, ITO을 사용하고, 두께는 1000∼3000Å인 것이 바람직하다.The source / drain electrode metal layer is preferably MO, Al, MoTa, α-Ta, Ti, ITO, and has a thickness of 1000 to 3000 Pa.
또한, 상기 RIE 장비 이용시 상기 활성층, 소오스/드레인 전극용 금속층 식각 가스 SF6+O2+He, SF6+HCl+O2를 사용하고, RF 파워는 300이상, 전극 갭은 500mm 그리고 압력은 50mTorr이상이며, 상기 제 2 마스크 에싱 공정은 SF6를 사용함 없이 O2 가스, 다른 온도 그리고 파워를 조절하는 것이 바람직하다.In addition, when the RIE equipment is used, the active layer and the metal layer etching gas SF 6 + O 2 + He and SF 6 + HCl + O 2 for the source / drain electrodes are used, the RF power is 300 or more, the electrode gap is 500 mm, and the pressure is 50 mTorr. As described above, it is preferable that the second mask ashing process adjusts O 2 gas, other temperature, and power without using SF 6 .
이하, 첨부된 도면을 참조하여 본 발명의 액티브 매트릭스형 액정표시소자의 제조방법에 대하여 보다 상세히 설명하기로 한다.Hereinafter, a method of manufacturing an active matrix liquid crystal display device of the present invention will be described in detail with reference to the accompanying drawings.
도 2a 내지 도 2e는 본 발명의 일실시예에 따른 액티브 매트릭스형 액정표시소자의 제조방법을 나타낸 공정 단면도이다.2A through 2E are cross-sectional views illustrating a method of manufacturing an active matrix liquid crystal display device according to an exemplary embodiment of the present invention.
도 2a에 도시한 바와 같이 절연기판 예컨대 유리기판 상에 게이트용 금속막을 증착하고, 상기 게이트용 금속막에 제 1 마스크을 이용한 식각 공정으로 상기 유리기판 상에 게이트 전극(22)을 형성한다.As shown in FIG. 2A, a gate metal film is deposited on an insulating substrate such as a glass substrate, and a gate electrode 22 is formed on the glass substrate by an etching process using a first mask on the gate metal film.
이어, 상기 게이트 전극(22)을 포함한 기판 전면에 게이트 절연막(23)을 형성하고, 상기 게이트 절연막(23) 상에 도핑되지 않는 비정질 실리콘 재질의 활성층(24), 도핑된 비정질 실리콘 재질의 n+ 채널층(25) 그리고 소오스/드레인 전극용 금속층(26)을 차례로 증착한다. 이때, 상기 소오스/드레인 전극용 금속층(26)은 Mo, Al, MoW, MoTa, α-Ta, Ti, ITO 등의 단일 또는 합금을 사용하고, 두께는 1000∼3000Å 혹은 그 이상으로 한다.Subsequently, a gate insulating film 23 is formed on the entire surface of the substrate including the gate electrode 22, and an undoped amorphous silicon material active layer 24 and a doped amorphous silicon material are n +. The channel layer 25 and the metal layer 26 for source / drain electrodes are sequentially deposited. At this time, the source / drain electrode metal layer 26 uses a single or alloy such as Mo, Al, MoW, MoTa, α-Ta, Ti, ITO, and the like and has a thickness of 1000 to 3000 GPa or more.
그리고 상기 소오스/드레인 전극용 금속층(26)상에 그레이-톤 포토레지스트(27)를 증착하고 노광 및 현상공정을 실시하여 그레이-톤 포토레지스트(27)를 패터닝한다.The gray-tone photoresist 27 is deposited on the source / drain electrode metal layer 26 and subjected to an exposure and development process to pattern the gray-tone photoresist 27.
도 2b에 도시한 바와 같이 상기 패터닝된 그레이-톤 포토레지스트(27)를 제 2 마스크로 이용하여 건식식각 공정을 통해 상기 활성층(24)과 n+ 채널층(25) 그리고 소오스/드레인 전극용 금속층(26)을 차례로 식각한다.As shown in FIG. 2B, the active layer 24 and the n + channel layer 25 and the metal layer for source / drain electrodes are subjected to a dry etching process using the patterned gray-tone photoresist 27 as a second mask. Etch (26) sequentially.
도 2c에 도시한 바와 같이 상기 소오스/드레인 전극용 금속층(26)이 노출되도록 상기 패터닝된 그레이-톤 포토레지스트(27)에 건식을 이용한 에싱(Ashing) 공정을 실시한다. 이때, 상기 에싱 가스는 O2, CF4, SH6, CHF6을 이용한다.As shown in FIG. 2C, a dry ashing process is performed on the patterned gray-tone photoresist 27 so that the source / drain electrode metal layer 26 is exposed. At this time, the ashing gas is used O 2 , CF 4 , SH 6 , CHF 6 .
여기서, 상기 식각 공정과 에싱 공정을 동일 장비인 RIE 타입의 장비에서 연속적으로 진행할 경우, 상기 활성층(24), n+ 채널층(25) 그리고 소오스/드레인 전극용 금속층(26)의 식각 가스는 SF6+O2+He 또는 SF6+HCl+O2를 이용하고, RF 파워는 300 이상, 전극간 갭은 50mm 이상으로 한다.In this case, when the etching process and the ashing process are continuously performed in the same equipment as the RIE type equipment, the etching gas of the active layer 24, the n + channel layer 25 and the metal layer 26 for the source / drain electrodes is SF. 6 + O 2 + He or SF 6 + HCl + O 2 is used, and the RF power is 300 or more and the inter-electrode gap is 50 mm or more.
한편, 상기 식각 공정을 PE 타입의 장비로 진행할 경우 상기 활성층(24), n+ 채널층(25) 그리고 소오스/드레인 전극용 금속층(26)은 연속 진행되고, 상기 그레이-톤 포토레지스트(27)의 에싱은 RIE 타입의 장비로 진행한다.On the other hand, when the etching process is a PE type equipment, the active layer 24, the n + channel layer 25 and the source / drain electrode metal layer 26 proceeds continuously, the gray-tone photoresist 27 Ashing of the proceeds to the RIE type equipment.
도 2d에 도시한 바와 같이 상기 에싱된 그레이-톤 포토레지스트(27)를 마스크로 이용하여 상기 소오스/드레인 전극용 금속층(26)을 식각한 후, n+ 채널층(25)을 식각한다. 이때, 상기 소오스/드레인 전극용 금속층(26) 식각은 습식식각 또는 건식식각을 이용한다.As illustrated in FIG. 2D, the source / drain electrode metal layer 26 is etched using the ashed gray-tone photoresist 27 as a mask, and then the n + channel layer 25 is etched. In this case, the source / drain electrode metal layer 26 may be etched using wet etching or dry etching.
도 2e에 도시한 바와 같이 상기 에칭된 그레이-톤 포토레지스트(27)를 제거한 후, 상기 소오스/드레인 전극용 금속층(26)을 포함한 기판 전면에 보호막(28)을 형성하고, 제 3 마스크를 이용하여 상기 보호막(28)을 식각하여 상기 소오스/드레인 전극용 금속층(26)중 어느 한측이 노출되도록 콘택홀을 형성한다.After removing the etched gray-tone photoresist 27 as shown in FIG. 2E, a protective film 28 is formed on the entire surface of the substrate including the metal layer 26 for the source / drain electrodes, and a third mask is used. The protective layer 28 is etched to form a contact hole so that any one side of the source / drain electrode metal layer 26 is exposed.
그리고 상기 콘택홀을 포함한 보호막(28)상에 ITO 물질을 증착하고, 제 4 마스크를 이용하여 상기 콘택홀을 통하여 소오스/드레인 전극용 금속층(26)과 접촉되는 화소전극(29a)을 형성한다.In addition, an ITO material is deposited on the passivation layer 28 including the contact hole, and a pixel electrode 29a is formed to contact the metal layer 26 for source / drain electrodes through the contact hole using a fourth mask.
이상에서 설명한 바와 같이 본 발명의 액티브 매트릭스형 액정표시소자의 제조방법에 의하면, 4개의 마스크를 이용하여 식각 공정을 진행하므로 종래와 비교하여 제작비용이 감소하고, 공정을 단순화할 수 있다.As described above, according to the method of manufacturing the active matrix liquid crystal display device of the present invention, since the etching process is performed using four masks, the manufacturing cost is reduced and the process can be simplified as compared with the conventional method.
또한, 동일 장비에서 공정을 연속적으로 진행하므로 공정이 매우 단순화되고, 안정화되며 공정시간을 줄일 수 있다.In addition, the process is continuously carried out in the same equipment, the process is very simplified, stabilized and can reduce the process time.
그리고 단일 데이터 배선을 건식식각 공정을 이용하여 식각하므로 CD 바이어스의 과다방지로 데이터 오픈을 최소화할 수 있다.The single data wiring is etched using a dry etching process, thereby minimizing data open by avoiding excessive CD bias.
도 1a 내지 도 1d는 종래의 액정표시소자의 제조방법을 나타낸 공정 단면도1A to 1D are cross-sectional views illustrating a method of manufacturing a conventional liquid crystal display device.
도 2a 내지 도 2e는 본 발명의 일실시예에 따른 액티브 매트릭스형 액정표시소자의 제조방법을 나타낸 공정 단면도2A through 2E are cross-sectional views illustrating a method of manufacturing an active matrix liquid crystal display device according to an exemplary embodiment of the present invention.
<도면의 주요 부분에 대한 부호의 설명><Explanation of symbols for the main parts of the drawings>
21 : 유리기판 22 : 게이트 전극21 glass substrate 22 gate electrode
23 : 게이트 절연막 24 : 활성층23 gate insulating film 24 active layer
25 : 채널층 26 : 소오스/드레인 전극25 channel layer 26 source / drain electrodes
27 : 그레이-톤 포토레지스트 28 : 보호막27: gray-tone photoresist 28: protective film
29a : 화소전극29a: pixel electrode
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KR20010060586A (en) * | 1999-12-27 | 2001-07-07 | 구본준, 론 위라하디락사 | method for fabricating array substrate for liquid crystal display device |
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2001
- 2001-05-07 KR KR10-2001-0024640A patent/KR100482471B1/en not_active Expired - Lifetime
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH07199227A (en) * | 1993-11-22 | 1995-08-04 | Luder Ernst | Method for manufacturing a matrix comprising thin film transistors |
JP2000162646A (en) * | 1998-11-26 | 2000-06-16 | Samsung Electronics Co Ltd | Method of manufacturing thin film transistor substrate for liquid crystal display device |
KR20010026624A (en) * | 1999-09-08 | 2001-04-06 | 구본준 | The method for fabricating liquid crystal display using four masks and the liquid crystal display thereof |
KR20010060586A (en) * | 1999-12-27 | 2001-07-07 | 구본준, 론 위라하디락사 | method for fabricating array substrate for liquid crystal display device |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11380753B2 (en) | 2019-07-09 | 2022-07-05 | Samsung Display Co., Ltd. | Display device |
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KR20020085236A (en) | 2002-11-16 |
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