KR100472371B1 - Method For Driving Plasma Display Panel - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel, and more particularly to a method of driving a plasma display panel that enables high speed addressing.

A driving method of a plasma display panel according to the present invention is a driving method of a plasma display panel including scan electrode lines, sustain electrode lines, and address electrode lines, wherein a scan is simultaneously performed on a pair of scan electrode lines among the scan electrode lines. Supplying a signal to discharge the address; driving the first scan electrode lines of the pair of scan electrode lines by a selective writing method; and driving the second scan electrode lines by a selective erasing method. It is characterized by.

According to this configuration, the driving method of the PDP according to the present invention scans a pair of scan lines at the same time, and one scan line is driven by the selective write method and the other scan line is driven by the selective erase method. The address time can be cut in half. As a result, the driving method of the PDP according to the present invention enables high-speed addressing driving and increases the driving margin by widening the data pulse width in the remaining time. In addition, when the number of subfields is increased, the deterioration of image quality due to the video implementation may be reduced.

Description

Driving Method for Plasma Display Panel {Method For Driving Plasma Display Panel}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel, and more particularly to a method of driving a plasma display panel that enables high speed addressing.

Plasma Display Panel (hereinafter referred to as "PDP") is used to excite and emit phosphors by using ultraviolet rays generated when an inert mixed gas such as He + Xe, Ne + Xe, He + Xe + Ne is discharged. Will be displayed. Such PDPs are not only thin and large in size, but also have improved in image quality due to recent technology development.

Referring to FIG. 1, a discharge cell of a conventional three-electrode AC surface discharge type PDP has a scan electrode (Y) and a sustain electrode (Z), and an address electrode (X) orthogonal to the scan electrode (Y) and the sustain electrode (Z). It is provided.

At the intersection of the scan electrode Y, the sustain electrode Z and the address electrode X, a cell 1 for displaying any one of red, green and blue is formed. The scan electrode Y and the sustain electrode Z are formed on an upper substrate (not shown). On the upper substrate, a dielectric layer and an MgO protective layer (not shown) are stacked. The address electrode X is formed on the lower substrate (not shown). On the lower substrate, partition walls are formed to prevent optical and electrical interference between horizontally adjacent cells. Phosphors are excited on the lower substrate and the partition walls to be excited by vacuum ultraviolet rays and emit visible light. An inert mixed gas such as He + Xe, Ne + Xe, He + Xe + Ne is injected into the discharge space between the upper substrate and the lower substrate.

The PDP is time-divisionally driven by dividing one frame into several subfields having different number of emission times in order to implement grayscale of an image. Each subfield is divided into an initialization period for initializing the full screen, an address period for selecting a scan line and selecting a cell in the selected scan line, and a sustain period for implementing gray levels according to the number of discharges. For example, when the image is to be displayed with 256 gray levels, as shown in FIG. 2, the frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields SF1 to SF8. As described above, each of the eight subfields SF1 to SF8 is divided into an initialization period, an address period, and a sustain period. The initialization period and the address period of each subfield are the same for each subfield, while the sustain period and the number of sustain pulses allocated thereto are 2 ⁿ (n = 0,1,2,3,4,5,6) in each subfield. , 7).

3 is a view showing a drive waveform for driving a conventional PDP.

Referring to FIG. 3, the PDP is driven by being divided into an initialization period for initializing the full screen, an address period for selecting a cell, and a sustain period for maintaining discharge of the selected cell.

In the initialization period, the rising ramp waveform Ramp-up is simultaneously applied to all the scan electrodes Y in the setup period SU. This rising ramp waveform (Ramp-up) causes a discharge in the cells of the full screen. By this setup discharge, positive wall charges are accumulated on the address electrode X and the sustain electrode Z, and negative wall charges are accumulated on the scan electrode Y. After the rising ramp waveform Ramp-up is supplied in the set-down period SD, the falling ramp waveform Ramp-down falling at the positive voltage lower than the peak voltage of the rising ramp waveform Ramp-up is applied to the scan electrodes ( Is simultaneously applied to Y). Ramp ramp down) causes a slight erase discharge in the cells, thereby partially erasing the excessively formed wall charge. This set-down discharge causes the wall charges to be uniformly retained in the cells so that the address discharge can be stably generated.

In the address period, the negative scan pulse scan is sequentially applied to the scan electrodes Y, and the positive data pulse data is applied to the address electrodes X in synchronization with the scan pulse scan. As the voltage difference between the scan pulse and the data pulse and the wall voltage generated during the initialization period are added, an address discharge is generated in the cell to which the data pulse is applied. In the cells selected by the address discharge, wall charges are formed such that a discharge can occur when a sustain voltage is applied.

The sustain electrode Z is supplied with a positive DC voltage Zdc during the set down period and the address period.

In the sustain period, sustain pulses sus are alternately applied to the scan electrodes Y and the sustain electrodes Z. FIG. The cell selected by the address discharge has a sustain discharge, that is, a display discharge between the scan electrode Y and the sustain electrode Z whenever the sustain pulse sus is applied as the wall voltage and the sustain pulse sus are added. This will happen. The sustain pulse sus has a pulse width of about 2 to 3 ㎲ so that the discharge can be stabilized. It is discharged within approximately 0.5 to 1 시점 after the time when the sustain pulse (sus) is generated, but the sustain pulse (sus) after the discharge occurs to form a wall charge to the extent that can cause the next discharge, This is because the sustain voltage (Vs) should be maintained at about 2 to 3 mA.

After the sustain discharge is completed, ramp waveforms having a small pulse width and a low voltage level are supplied to the sustain electrode Z to erase wall charges remaining in the cells of the full screen.

In the PDP according to the related art as described above, the address period takes the longest during one frame, and the addressing driving time becomes longer as the number of lines increases. For this reason, the driving method of the PDP according to the related art has a disadvantage in that the number of subfields is limited during one frame, which causes a deterioration in image quality.

Accordingly, an object of the present invention is to provide a method of driving a plasma display panel that can scan two scan lines at the same time to reduce the address time.

Another object of the present invention is to provide a method of driving a plasma display panel in which the odd and even scan lines are driven by a selective write method and a selective erase method, respectively.

Another object of the present invention is to provide a method of driving a plasma display panel which can improve image quality by increasing the number of subfields according to a reduction in address time.

In order to achieve the above object, a method of driving a plasma display panel according to an embodiment of the present invention is a plasma display panel including first and second scan electrode lines, sustain electrode lines, and address electrode lines that are alternately arranged. The method of driving the power supply into the reset period, the address period and the sustain period, wherein the rising ramp waveform and the falling ramp waveform are applied to the first scan electrode lines during the reset period, and a first ramp is applied to the sustain electrode lines. Applying a voltage, applying a rising ramp waveform and sustain voltage to the second scan electrode lines, and applying a second voltage to the sustain electrode lines; First scan electrode lines by selectively applying one of long width, high potential-short width, low potential-long width, and 0V Driven in the selective writing mode, and the is characterized in that it comprises the step of driving the second scan electrode line to the selective erasing mode.

In the selective writing method of the present invention, the high potential-long width, the high potential-short width, and the low potential on the address electrode line simultaneously with the first scan pulse applied to the first scan electrode lines during the address period. Address discharge by applying a data pulse having one of a long width and 0V, and a first sustain electrode line positioned in the same discharge cell as the first scan electrode lines and the first scan electrode lines during the sustain period; And supplying sustain pulses alternately to the cells, thereby sustaining and discharging the cells turned on by the address discharge.

According to the present invention, the method may further include applying a first positive DC voltage to the first sustain electrode lines in the reset period and the address period.

In the selective erasing method of the present invention, one of a high potential-long width and a high potential-end width is applied to an address electrode line simultaneously with a second scan pulse applied to the second scan electrode lines during the address period. And discharging the address pulse by applying a data pulse, and alternately applying sustain pulses to the second scan electrode lines positioned in the same discharge cell as the second scan electrode lines and the second scan electrode lines during the sustain period. And supplying to the sustain discharge cells for the cells that are not turned on by the address discharge.

The method may further include applying a second positive DC voltage to the second sustain electrode lines in the reset period and the address period.

In the present invention, the step of supplying a scan signal to a pair of scan electrode lines of the scan lines at the same time address discharge, selecting all of the discharge cells included in the first and second scan electrode lines; Selecting only the discharge cells included in the first scan electrode lines, selecting only the discharge cells included in the second scan electrode lines, and discharges included in the first and second scan electrode lines. And not selecting all the cells.

The first scan pulse in the present invention is characterized in having a wider width than the second scan pulse.

In the present invention, selecting all of the discharge cells included in the first and second scan lines may include applying first and second scan pulses to the first and second scan lines, and the address. And applying a high potential-long width corresponding to the first scan pulse to the electrode lines.

In the present disclosure, selecting only the discharge cells included in the first scan electrode lines may include applying first and second scan pulses to the first and second scan lines, and the address electrode lines. And applying a low potential-long width corresponding to the first scan pulse.

In the present disclosure, selecting only the discharge cells included in the second scan electrode lines may include applying first and second scan pulses to the first and second scan lines, and the address electrode lines. And applying a high potential-short width corresponding to the second scan pulse.

The step of not selecting all of the discharge cells included in the first and second scan electrode lines in the present invention may include applying first and second scan pulses to the first and second scan lines; And applying a base voltage to the address electrode lines.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 4 to 6.

4 is a view schematically showing an electrode arrangement of a PDP according to an embodiment of the present invention.

Referring to FIG. 4, the discharge cells of the PDP according to the embodiment of the present invention are the scan electrode (Y) and the sustain electrode (Z), and the address electrode (X) orthogonal to the scan electrode (Y) and the sustain electrode (Z). It is provided.

At the intersection of the scan electrode Y, the sustain electrode Z and the address electrode X, a cell 41 for displaying any one of red, green and blue is formed. Scan electrode (Y) and sus The tain electrode Z is formed on an upper substrate (not shown). On the upper substrate, a dielectric layer and an MgO protective layer (not shown) are stacked. The address electrode X is formed on the lower substrate (not shown). On the lower substrate, partition walls are formed to prevent optical and electrical interference between horizontally adjacent cells. Phosphors are excited on the lower substrate and the partition walls to be excited by vacuum ultraviolet rays and emit visible light. An inert mixed gas such as He + Xe, Ne + Xe, He + Xe + Ne is injected into the discharge space between the upper substrate and the lower substrate.

At this time, the sustain electrode Z is divided into odd-numbered sustain electrodes Z2n-1 and even-numbered sustain electrodes Z2n, and each odd-numbered and even-numbered sustain electrodes Z2n-1 and Z2n It is connected to and driven by different sustain drivers (not shown).

The PDP is time-divisionally driven by dividing one frame into several subfields having different number of emission times in order to implement grayscale of an image. Each subfield has an initialization period for initializing the full screen, that is, a reset period (RPD), an address period (APD) for selecting a scan line and selecting a cell from the selected scan line, and a gray level according to the number of discharges. It is divided into a sustain period SPD and an erase period EPD for removing wall charges in the discharge cell. For example, when the image is to be displayed with 256 gray levels, as shown in FIG. 2, the frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields SF1 to SF8. However, in the case of the present invention, the number of subfields can be increased because the address time is reduced.

5 is a diagram illustrating in detail a data pulse applied to address electrodes when the plasma display panel is driven according to an exemplary embodiment of the present invention.

First, the PDP according to the present invention is characterized in that two scan lines Y2n-1 and Y2n are simultaneously selected. In this case, in order for two scan lines (Y2n-1, Y2n) to be scanned at the same time, four states must be made. That is, both scan lines (Y2n-1, Y2n) are off, only the odd scan line (Y2n-1) is on, only the even scan line (Y2n) is on, and two scans are on. A state in which all of the lines Y2n-1 and Y2n are On exists. To make each of these states, four data pulses (DP) are required. In this case, the above four states cannot be created when the voltage levels of the data pulses DP are four. This is because only one cell selected from the high scan voltage cannot be selected because one of the two scan lines, that is, the selective writing method, is selected at a low scan voltage.

To this end, the PDP according to the present invention simultaneously applies a selective write method and a selective erase method. Here, the selective writing method is a method in which the discharge cells in which the address discharge has occurred emit light in the sustain period, and the selective erasing method is a method in which cells in which the address discharge has not occurred emit light in the sustain period. The data pulse DP required by the selective write method is considerably longer than the data pulse DP required by the selective erase method. This is because in the selective erasing method, an address discharge is necessary to disturb the wall charges formed in the reset period RPD, whereas in the selective writing method, sufficient wall charges for causing sustain discharge must be formed in the discharge cell.

First, in FIG. 5, the first scan line Y1, that is, the odd-numbered scan electrode line Y2n-1, is driven by a selective writing method, and the second scan line Y2, that is, even-numbered The scan electrode line Y2n is driven by the selective erasing method.

V1> V2

Here, V1 represents the first data voltage and V2 represents the second data voltage.

The first scan line Y1 accumulates a lot of wall charges in the reset period to cause address discharge even at a data driving voltage lower than the second scan line Y2 driven by the selective erase method. That is, the first scan line Y1 causes address discharge at the first data voltage V1 having the high voltage level and the second data voltage V2 having the low voltage level.

The second scan line Y2 forms a relatively small wall charge in the reset period so that only the first data voltage V1 having a high voltage level occurs and the scan voltage is relatively small. In addition, the width of the data pulse DP and the width of the scan pulse SP are adjusted to select only the second scan line Y2.

As described above, since the selective writing method requires a wider data pulse DP than the selective erasing method, the second scan line Y2 driven by the selective erasing method has the first and second pulse widths T1 and T2. ), But the first scan line Y1 driven by the selective write method generates sufficient sustain discharge only in the case of the second pulse width T2 to form a wall charge necessary for the discharge. . Accordingly, the first and second scan lines Y1 and Y2 may be arbitrarily selected by adjusting the voltage size and width of the data pulse DP, so that both scan lines may be simultaneously scanned.

Referring to this through the data pulse DP shown in FIGS. 5A to 5D, first, FIG. 5A includes a first scan line Y1 and a second scan line Y2. The discharge cells are all selected in the address period. To this end, the data pulse DP is applied with a first data voltage V1 having a high voltage size with a wider width T1 than the conventional scan pulse SP. As a result, the first scan line Y1 driven by the selective write method selects the discharge cell in the address period and sustains the discharge in the sustain period, thereby turning on the discharge cell and driving the selective erase method. In the second scan line Y2, the discharge cells are selected in the address period to turn off the selected discharge cells.

FIG. 5B shows a state in which the discharge cells including the first scan line Y1 are not selected in the address period and the discharge cells including the second scan line Y2 are selected. To this end, the first data voltage V1 is applied to the data pulse DP with a width smaller than T1 so that only the second scan line Y2 is selected. As a result, in the first scan line Y1 driven by the selective write method, the discharge cell is turned off in the sustain period because no discharge cell is selected in the address period, and the second scan line Y2 driven by the selective erase method. In the address period, the discharge cells are selected to turn off the selected discharge cells.

5C illustrates a state in which a discharge cell including the first scan line Y1 is selected and a discharge cell including the second scan line Y2 is not selected in the address period. To this end, the second data voltage V2 having a low voltage level is applied to the data pulse DP so that the second scan line Y2 is not selected, and FIG. 5A is applied to the first scan line Y1. Applied at the same width as. As a result, the first scan line Y1 driven by the selective writing method. The discharge cell is selected in the address period, sustain discharge is performed in the sustain period, the discharge cell is turned on, and the second scan line Y2 driven by the selective erasing method is sustained because the discharge cell is not selected in the address period. In the period, the discharge cells are turned on by sustain discharge.

FIG. 5D illustrates a state in which the discharge cells including the first scan line Y1 are not selected and the discharge cells including the second scan line Y2 are not selected in the address period. To this end, 0 V is applied to the address electrode X with the data pulse DP. As a result, the first scan line Y1 driven by the selective write method does not select a discharge cell in the address period, and thus the discharge cell is turned off in the sustain period, and the second scan line Y1 is driven by the selective erase method. The scan line Y2 turns on the discharge cells by sustain discharge in the sustain period because no discharge cells are selected in the address period.

FIG. 6 is a diagram illustrating an example of a driving waveform of the PDP shown in FIG. 4, in which the odd-numbered scan line Y2n-1 is driven by a selective write method and the even-numbered scan line Y2n is driven by a selective erase method. do.

Referring to FIG. 6, first, in the reset period RPD, the rising ramp waveform RP is simultaneously applied to all the scan electrodes Y in the setup period. This rising ramp waveform RP causes discharge to occur in the cells on the full screen. By this setup discharge, positive wall charges are accumulated on the address electrode X and the sustain electrode Z, and negative wall charges are accumulated on the scan electrode Y. After the rising ramp waveform RP is supplied in the set-down period, the positive scan voltage Y2n-1 is applied to the positive voltage lower than the peak voltage of the rising ramp waveform RP. The falling ramp waveform (-RP) is applied simultaneously and maintains a voltage lower than the peak voltage of the rising ramp waveform (RP) to the even-numbered scan electrodes (Y2n) at a predetermined width. The first DC voltage Zdc1 having the same voltage as the sustain voltage is applied to the odd sustain electrode Z2n-1 to be synchronized with the falling ramp waveform (-RP), and the relatively low wall charge is applied to the even-numbered sustain electrode Z2n. In order to form a second DC voltage Zdc2 of low voltage magnitude is applied. The falling ramp waveform applied to the odd scan electrodes Y2n-1 causes a slight erase discharge in the cells, thereby partially erasing the overcharged wall charge. This set-down discharge causes the wall charges to be uniformly retained in the cells so that the address discharge can be stably generated.

In the address period APD, the negative scan pulse SP is sequentially applied to the odd and even scan lines Y2n-1 and Y2n simultaneously and simultaneously corresponding to the scan pulse SP. Is applied to the positive data pulse DP. As the voltage difference between the scan pulse SP and the data pulse DP and the wall voltage generated during the reset period are added, an address discharge is generated in the cell to which the data pulse DP is applied. At this time, the data pulse DP applied to the address electrode X is applied at a voltage and pulse width determined according to the on / off of the discharge cell as described with reference to FIG. 5. In the cells selected by the address discharge, wall charges are formed such that a discharge can occur when a sustain voltage is applied. Further, the first positive DC voltage Zdc1 and the second positive DC voltage Zdc2 are respectively supplied to the odd and even sustain electrodes Z during the address period.

In the sustain period, sustain pulses SUSPy and SUSPz are alternately applied to the scan electrodes Y and the sustain electrodes Z. FIG. In the odd-numbered discharge cell line selected by the address discharge, the scan electrode Y and the sustain electrode Z are applied whenever the sustain pulses SUSPy and SUSPz are applied as the wall voltage and the sustain pulses SUSPy and SUSPz in the cell are added. Sustain discharge, that is, display discharge, occurs between them. The even-numbered discharge cell lines not selected by the address discharge sustain sustain discharge to cause display discharge.

After the sustain discharge is completed, an erase pulse EP, which is a ramp waveform having a small pulse width and a low voltage level, is supplied to the sustain electrode Z to erase wall charge remaining in the cells of the full screen.

As described above, the driving method of the PDP according to the present invention simultaneously scans a pair of scan lines, and one scan line is driven by a selective write method and the other scan line is driven by a selective erase method. The address time can be cut in half. As a result, the driving method of the PDP according to the present invention enables high-speed addressing driving and increases the driving margin by widening the data pulse width in the remaining time. In addition, when the number of subfields is increased, the deterioration of image quality due to the video implementation may be reduced.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Thus, seen foot The technical scope of the name should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

1 is a plan view schematically showing an electrode arrangement of a conventional three-electrode AC surface discharge type plasma display panel.

2 is a diagram illustrating a frame configuration of an 8-bit default code for implementing 256 gray levels.

3 is a view showing a drive waveform for driving a conventional PDP.

4 is a diagram schematically illustrating an electrode arrangement of a plasma display panel according to an exemplary embodiment of the present invention.

5 is a diagram illustrating in detail a data pulse applied to address electrodes when the plasma display panel is driven according to an exemplary embodiment of the present invention.

FIG. 6 is a diagram illustrating an example of a driving waveform of the PDP shown in FIG. 4.

Claims (12)

A method of driving a plasma display panel including alternating first and second scan electrode lines, sustain electrode lines, and address electrode lines in a reset period, an address period, and a sustain period, the method comprising: The rising ramp waveform and the falling ramp waveform are applied to the first scan electrode lines and the first voltage is applied to the sustain electrode lines during the reset period, and the ramp is rising to the second scan electrode lines. Applying a second voltage to the sustain electrode lines as well as applying a waveform and a sustain voltage; By selectively applying one of high potential-long width, high potential-short width, low potential-long width, and 0V to all address electrodes during the address period, the first scan electrode lines are driven in a selective writing manner, and the second scan electrode lines are driven. And driving in a selective erasing method. The method of claim 1, The selective writing method may include: A data pulse having one of high potential-long width, high potential-short width, low potential-long width, and 0V is applied to the address electrode line simultaneously with the first scan pulse applied to the first scan electrode lines during the address period. Discharging, During the sustain period, sustain pulses are alternately supplied to the first scan electrode lines and the first sustain electrode lines positioned in the same discharge cell as the first scan electrode lines, thereby turning on the cells turned on by the address discharge. And a sustain discharge method. The method of claim 2, And applying a first positive DC voltage to the first sustain electrode lines during the reset period and the address period. In the third, In the selective erasing method, Address discharge by applying a data pulse having one of high potential-long width and high potential-end width to an address electrode line simultaneously with a second scan pulse applied to the second scan electrode lines during the address period; During the sustain period, sustain pulses are alternately supplied to the second scan electrode lines and the second sustain electrode lines positioned in the same discharge cell as the second scan electrode lines to the cells that are not turned on by the address discharge. And sustaining and discharging the plasma display panel. The method of claim 4, wherein And applying a second positive DC voltage to the second sustain electrode lines in the reset period and the address period. The method of claim 4, wherein In the step of supplying first and second scan pulses to the first and second scan electrode lines at the same time to discharge the address, Selecting all of the discharge cells included in the first and second scan electrode lines; Selecting only the discharge cells included in the first scan electrode lines; Selecting only discharge cells included in the second scan electrode lines; And not selecting all of the discharge cells included in the first and second scan electrode lines. The method of claim 6, The first scan pulse has a wider width than the second scan pulse, And wherein the first data voltage has a voltage size higher than that of the second data voltage. The method of claim 7, wherein And wherein the first scan pulse has a pulse width approximately twice that of the second scan pulse. The method of claim 8, Selecting all of the discharge cells included in the first and second scan electrode lines, Applying the first and second scan pulses to the first and second scan electrode lines; And applying a high potential-long width corresponding to the first scan pulse to the address electrode lines. The method of claim 8, Selecting only the discharge cells included in the first scan electrode lines, Applying the first and second scan pulses to the first and second scan electrode lines; And applying a low potential-long width corresponding to the first scan pulse to the address electrode lines. The method of claim 8, Selecting only the discharge cells included in the second scan electrode lines, Applying the first and second scan pulses to the first and second scan electrode lines; And applying a high potential-short width corresponding to the second scan pulse to the address electrode lines. The method of claim 8, In the step of not selecting all of the discharge cells included in the first and second scan electrode lines, Applying the first and second scan pulses to the first and second scan electrode lines; And applying a base voltage to the address electrode lines.