KR100388219B1 - Flash memory embeded one-chip micro controller unit - Google Patents

Abstract

The present invention relates to a one-chip microcontroller unit with a built-in flash memory, and implements the microcontroller unit and the flash memory on a single chip, and puts a register instead of a state machine in the flash memory so that erase and programming can be performed. have. One-chip microcontroller unit according to the present invention for this purpose, the microcontroller unit and the ROM, flash memory, peripheral circuit, flash memory interface is formed on one chip. The microcontroller unit performs control and arithmetic functions. The ROM stores the commands executed in the microcontroller unit and the commands and data required for system booting. The flash memory is programmed with the instructions and data of the microcontroller unit. Peripheral circuitry is for interfacing the microcontroller unit with an externally connected host. The flash memory interface selectively removes a data transfer path between the flash memory and an external ROM writer and selectively controls the data transfer path between the flash memory and the microcontroller unit.

Description

Flash memory embeded one-chip micro controller unit

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a microcontroller unit (MCU), and more particularly to a one-chip microcontroller in which components necessary for a control operation of a microcontroller are integrally formed on one chip.

In general, the one-chip microcontroller is formed by organically connecting the central processing unit, program memory, data memory, and input / output ports with data buses and address buses. One-chip microcontroller units are often mounted on a printed circuit board together with a separate memory chip to store separate data and instructions. 1 is a block diagram illustrating a case where such a conventional microcontroller unit and a flash memory are independently mounted on a single printed circuit board.

As shown in FIG. 1, a microcontroller unit 104 and a flash memory 106 formed of independent chips are mounted on a single printed circuit board 102 and connected to each other by a data bus and an address bus. Configure the system.

In this case, there is a problem in designing for mounting two independent chips on a printed circuit board, and the area occupied by the printed circuit board becomes large.

One-chip microcontroller unit according to the present invention is to implement the microcontroller unit and the flash memory on one chip, and to place the register in the flash memory instead of the state machine to perform the erase and programming.

According to the present invention, a microcontroller unit, a ROM, a flash memory, a peripheral circuit, and a flash memory interface are formed on a single chip. The microcontroller unit performs control and arithmetic functions. The ROM stores the commands executed in the microcontroller unit and the commands and data required for system booting. The flash memory is programmed with the instructions and data of the microcontroller unit. Peripheral circuitry is for interfacing the microcontroller unit with an externally connected host. The flash memory interface selectively removes a data transfer path between the flash memory and an external ROM writer and selectively controls the data transfer path between the flash memory and the microcontroller unit.

1 is a block diagram showing a case where a conventional microcontroller unit and a flash memory are independently mounted on a single printed circuit board.

2 is a block diagram of a one-chip microcontroller unit incorporating a flash memory according to the present invention.

Figure 3 is a block diagram showing the configuration of a flash memory embedded in the one-chip microcontroller unit according to the present invention.

4 is a block diagram for explaining on-chip mode of a one-chip microcontroller unit according to the present invention;

5 is a block diagram illustrating an on-board mode of a one-chip microcontroller unit in accordance with the present invention.

Explanation of symbols on the main parts of the drawings

102: printed circuit board 104, 204: microcontroller unit

106, 210: flash memory 202: one-chip microcontroller unit

206: Romans 208: Sram

212: peripheral circuit 214: flash memory interface

302: flash memory cell array 304: X-decoder

306: Y-decoder 308: sense amplifier

310: address transition detector 312: high voltage generator

316: register 402: ROM writer

502: host

The one-chip microcontroller unit according to the present invention will be described with reference to FIGS. 2 to 5. 2 is a block diagram of a one-chip microcontroller unit incorporating a flash memory according to the present invention.

As shown in FIG. 2, the one-chip microcontroller unit 202 includes a microcontroller unit 204, a ROM 206, an SRAM 208, a flash memory 210, and a peripheral circuit. 212, flash memory interface 214 is organically connected via a data bus.

The microcontroller unit 204 performs control and arithmetic functions.

The ROM 206 stores instructions for the microcontroller unit 204 to perform. The flash memory 210 also stores instructions for the microcontroller unit 204 to execute. The ROM 206 includes relatively small instructions necessary for performing serial / parallel communication with an external host at system boot. The stored point is different from the flash memory 210.

The SRAM 208 stores temporary data for operation or receives a simple command serially from an external device.

The flash memory 210 is a type of EEPROM (Electrically Erasable and Programmable ROM), and stores instructions, parameter data, and the like of the microcontroller unit 204.

Peripheral circuitry 212 is for interfacing the microcontroller unit 204 with an external host, including a watch-dog timer, serial and parallel input / output interfaces, and analog-to-digital converters. ADC), phase locked loop circuit (PLL), and the like.

The flash memory interface 214 may be a microcontroller or a data transfer path between an external ROM writer and the flash memory 210 when the flash memory 210 operates in an on-chip mode. The data transfer path between the unit 204 and the flash memory 210 is selectively controlled.

3 is a block diagram showing the configuration of a flash memory embedded in a one-chip microcontroller unit according to the present invention. As shown in FIG. 3, the flash memory according to the present invention includes a flash memory cell array 302, an X-decoder 304 and a Y-decoder 306, a sense amplifier 308, an address transition detector 310, and a high voltage. It includes a generator 312, the register 316.

The flash memory cell array 302 is programmed. X-decoder 304 and Y-decoder 306 decode the row address and column address so that the corresponding memory cell is selected in flash memory cell array 302. The sense amplifier 308 senses and amplifies data of the selected memory cell. The address transition detection unit 310 detects a change in the address and enables the sense amplifier 308 at each time. The high voltage generator 312 generates a high voltage required when programming each cell of the flash memory cell array 302. The high voltage generator 312 includes a charge pump circuit and a voltage regulator.

The register section 316 is configured as follows. An address register stores the address of cells to be programmed. Programming is performed when the data stored in the address register is logical zero. Programming is not performed when the logic one is logical. The data register stores the data to be programmed. The control register includes control values of program pulses and erase pulses, control values of the charge pump circuit of the high voltage generator 312, and programming and erase verify control values. And so on. An erase block selection register stores control values for selecting each erase block that is divided in the flash memory cell array 302. In other words, when data of the flash memory cell array 302 is erased, the data of the corresponding block may be erased by selecting a specific block by referring to the value of the erase block selection register. The power register stores values for determining the voltage level of the high voltage generator 312. The test register stores control values necessary for the reliability test of the flash memory cell array 302, the threshold voltage measurement of each memory cell, and the programming of the reference cell. The input / output signal of the flash memory 210 includes an address signal ADD, a chip select bar signal CEB, a write enable bar signal WEB, a reset bar signal RSTB, a register selection signal R_SEL, and an input data signal ( DIN), an output data signal DOUT, and the like.

The one-chip microcontroller unit according to the present invention has two operation modes, an on-chip mode and an on-board mode, which will be described with reference to FIGS. 4 and 5. 4 is a block diagram illustrating an on-chip mode of a one-chip microcontroller unit according to the present invention. As shown in FIG. 4, in the on-chip mode, the mode control signal MODE is converted to an external ROM writer through the flash memory interface 214 when the one-chip microcontroller unit 202 is switched to the on-chip mode. 402 is programmed into the flash memory 210 directly.

FIG. 5 is a block diagram illustrating an on-board mode of a one-chip microcontroller unit according to the present invention. As shown in FIG. 5, when the mode control signal MODE switches the one-chip microcontroller unit 202 to the on-board mode in the on-board mode, the data to be programmed is transferred from the external host 502 to the peripheral circuit ( The input / output interface of 212 and the microcontroller unit 204 are transmitted and stored in the SRAM 208, where the instructions for programming and erasing are also stored in the SRAM 208. The microcontroller unit 204 programs the data in the flash memory 210 using the transferred data and instructions stored in the SRAM 208.

The order in which the external host or the internal microcontroller unit 204 programs the flash memory cell array 302 using the values of the register unit 316 is as follows. The host or microcontroller unit 204 writes the data and associated addresses to be programmed into the data register and the address register, respectively, and the voltage level to be programmed into the power register. Next, programming is done by enabling the programming enable bit in the control register. When programming is complete, disable the programming enable bit. Next, the program check bit in the control register is selected to read the programmed data to verify that the programming was successful. If the programming is not successful, the programming is repeated until the programming succeeds within a limited number of times. If the programming does not succeed during the limited number of programming, a programming fail signal is generated.

The external host or the internal microcontroller unit 204 erases the flash memory cell array 302 using the values of the register unit 316 as follows. Select the block to be erased from the erase block select register. Write the voltage level required for erasing to the power register. Enable the erase enable bit in the control register to generate an erase pulse. As the erase pulse is generated, sufficient timing for erasing is ensured. The erase operation is terminated by disabling the erase enable bit of the control register. Enable the erase confirmation bit to verify that the data has been erased securely. If the erasure is not made surely, the above erasing process is repeatedly performed within a limited number of times.

The control algorithm in the case where the programming operation and the erasing operation described above are performed in the on-chip mode is coded in the machine language of the control system of the ROM writer 402, and the control algorithm in the on-board mode is stored in the microcontroller unit 204. Coded in machine language and stored in SRAM 208.

The one-chip microcontroller unit according to the present invention can be easily designed and manufactured by implementing the one-chip microcontroller unit and the flash memory on one chip, and by programming and erasing by placing a register in place of the state machine in the flash memory. The area of the circuit, i.e. the chip size, is reduced.

Claims (4)

delete delete A method of programming the flash memory in a semiconductor circuit in which a microcontroller unit, a flash memory, an SRAM, a boot ROM, and an input / output unit are implemented as a single semiconductor chip, Executing, by the microcontroller unit, an instruction stored in the boot ROM, and receiving the algorithm and data for programming the flash memory through the input / output unit in series and storing the data in the SRAM; Programming the flash memory by the microcontroller unit writing and reading data to and from the flash memory using an algorithm stored in the SRAM, The flash memory has an address register, a data register, a power register, a control register, a sensing circuit, and a high voltage generation circuit. The programming of the flash memory A first process of writing the address and data of cells to be programmed by the microcontroller unit into the address register and the data register, respectively; Writing a voltage value sufficient to be programmed by the microcontroller unit into the power register; A third process of applying, by the microcontroller unit, a program pulse to cells of an address stored in the address register using the control register; A fourth step of the microcontroller unit reading data of the memory cell at the address and comparing the data with the data to be programmed; If the two data values are the same through the comparison process, the program is terminated. If not, the fifth process moves to the first process. A method of programming a flash memory, characterized in that performed. delete